1 /** 2 ********************************************************************************* 3 * 4 * @file ald_acmp.h 5 * @brief Header file of ACMP module driver. 6 * 7 * @version V1.0 8 * @date 26 Jun 2019 9 * @author AE Team 10 * @note 11 * Change Logs: 12 * Date Author Notes 13 * 26 Jun 2019 AE Team The first version 14 * 15 * Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved. 16 * 17 * SPDX-License-Identifier: Apache-2.0 18 * 19 * Licensed under the Apache License, Version 2.0 (the License); you may 20 * not use this file except in compliance with the License. 21 * You may obtain a copy of the License at 22 * 23 * www.apache.org/licenses/LICENSE-2.0 24 * 25 * Unless required by applicable law or agreed to in writing, software 26 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 27 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 28 * See the License for the specific language governing permissions and 29 * limitations under the License. 30 ********************************************************************************** 31 */ 32 33 #ifndef __ALD_ACMP_H__ 34 #define __ALD_ACMP_H__ 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif 39 40 #include "utils.h" 41 42 /** @addtogroup ES32FXXX_ALD 43 * @{ 44 */ 45 46 /** @addtogroup ACMP 47 * @{ 48 */ 49 50 /** @defgroup ACMP_Public_Types ACMP Public Types 51 * @{ 52 */ 53 54 /** 55 * @brief ACMP interrupt 56 */ 57 typedef enum { 58 ACMP_IT_EDGE = (1U << 0), /**< Edge interrupt bit */ 59 ACMP_IT_WARMUP = (1U << 1), /**< Warm up interrupt bit */ 60 } acmp_it_t; 61 62 /** 63 * @brief ACMP interrupt flag 64 */ 65 typedef enum { 66 ACMP_FLAG_EDGE = (1U << 0), /**< Edge interrupt flag */ 67 ACMP_FLAG_WARMUP = (1U << 1), /**< Warm up interrupt flag */ 68 } acmp_flag_t; 69 70 /** 71 * @brief ACMP status flag 72 */ 73 typedef enum { 74 ACMP_STATUS_ACT = (1U << 0), /**< Edge status flag */ 75 ACMP_STATUS_OUT = (1U << 1), /**< Warm up status flag */ 76 } acmp_status_t; 77 78 /** 79 * @brief ACMP positive input 80 */ 81 typedef enum { 82 ACMP_POS_CH0 = 0x0U, /**< Channel 0 as positive input */ 83 ACMP_POS_CH1 = 0x1U, /**< Channel 1 as positive input */ 84 ACMP_POS_CH2 = 0x2U, /**< Channel 2 as positive input */ 85 ACMP_POS_CH3 = 0x3U, /**< Channel 3 as positive input */ 86 ACMP_POS_CH4 = 0x4U, /**< Channel 4 as positive input */ 87 ACMP_POS_CH5 = 0x5U, /**< Channel 5 as positive input */ 88 ACMP_POS_CH6 = 0x6U, /**< Channel 6 as positive input */ 89 ACMP_POS_CH7 = 0x7U, /**< Channel 7 as positive input */ 90 } acmp_pos_input_t; 91 92 /** 93 * @brief ACMP negative input 94 */ 95 typedef enum { 96 ACMP_NEG_CH0 = 0x0U, /**< Channel 0 as negative input */ 97 ACMP_NEG_CH1 = 0x1U, /**< Channel 1 as negative input */ 98 ACMP_NEG_CH2 = 0x2U, /**< Channel 2 as negative input */ 99 ACMP_NEG_CH3 = 0x3U, /**< Channel 3 as negative input */ 100 ACMP_NEG_CH4 = 0x4U, /**< Channel 4 as negative input */ 101 ACMP_NEG_CH5 = 0x5U, /**< Channel 5 as negative input */ 102 ACMP_NEG_CH6 = 0x6U, /**< Channel 6 as negative input */ 103 ACMP_NEG_CH7 = 0x7U, /**< Channel 7 as negative input */ 104 ACMP_NEG_1V25 = 0x8U, /**< 1.25v as negative input */ 105 ACMP_NEG_2V5 = 0x9U, /**< 2.5v as negative input */ 106 ACMP_NEG_VDD = 0xAU, /**< VDD as negative input */ 107 } acmp_neg_input_t; 108 109 /** 110 * @brief ACMP mode 111 */ 112 typedef enum { 113 ACMP_ULTRA_LOW_POWER = 0x0U, /**< Ultra low power mode */ 114 ACMP_LOW_POWER = 0x1U, /**< Low power mode */ 115 ACMP_MIDDLE_POWER = 0x2U, /**< Middle power mode */ 116 ACMP_HIGH_POWER = 0x3U, /**< High power mode */ 117 } acmp_mode_t; 118 119 /** 120 * @brief ACMP warm-up time 121 */ 122 typedef enum { 123 ACMP_4_PCLK = 0x0U, /**< 4 hfperclk cycles */ 124 ACMP_8_PCLK = 0x1U, /**< 4 hfperclk cycles */ 125 ACMP_16_PCLK = 0x2U, /**< 4 hfperclk cycles */ 126 ACMP_32_PCLK = 0x3U, /**< 4 hfperclk cycles */ 127 ACMP_64_PCLK = 0x4U, /**< 4 hfperclk cycles */ 128 ACMP_128_PCLK = 0x5U, /**< 4 hfperclk cycles */ 129 ACMP_256_PCLK = 0x6U, /**< 4 hfperclk cycles */ 130 ACMP_512_PCLK = 0x7U, /**< 4 hfperclk cycles */ 131 } acmp_warm_time_t; 132 133 /** 134 * @brief ACMP hysteresis level 135 */ 136 typedef enum { 137 ACMP_HYST_0 = 0x0U, /**< No hysteresis */ 138 ACMP_HYST_15 = 0x1U, /**< 15mV hysteresis */ 139 ACMP_HYST_22 = 0x2U, /**< 22mV hysteresis */ 140 ACMP_HYST_29 = 0x3U, /**< 29mV hysteresis */ 141 ACMP_HYST_36 = 0x4U, /**< 36mV hysteresis */ 142 ACMP_HYST_43 = 0x5U, /**< 43mV hysteresis */ 143 ACMP_HYST_50 = 0x6U, /**< 50mV hysteresis */ 144 ACMP_HYST_57 = 0x7U, /**< 57mV hysteresis */ 145 } acmp_hystsel_t; 146 147 /** 148 * @brief ACMP inactive state 149 */ 150 typedef enum { 151 ACMP_INACTVAL_LOW = 0x0U, /**< The inactive value is 0 */ 152 ACMP_INACTVAL_HIGH = 0x1U, /**< The inactive value is 1 */ 153 } acmp_inactval_t; 154 155 /** 156 * @brief which edges set up interrupt 157 */ 158 typedef enum { 159 ACMP_EDGE_NONE = 0x0U, /**< Disable EDGE interrupt */ 160 ACMP_EDGE_FALL = 0x1U, /**< Falling edges set EDGE interrupt */ 161 ACMP_EDGE_RISE = 0x2U, /**< rise edges set EDGE interrupt */ 162 ACMP_EDGE_ALL = 0x3U, /**< Falling edges and rise edges set EDGE interrupt */ 163 } acmp_edge_t; 164 165 /** 166 * @brief ACMP output function 167 */ 168 typedef enum { 169 ACMP_OUT_DISABLE = 0x0U, /**< Disable acmp output */ 170 ACMP_OUT_ENABLE = 0x1U, /**< Enable acmp output */ 171 } acmp_out_func_t; 172 173 /** 174 * @brief ACMP init structure definition 175 */ 176 typedef struct { 177 acmp_mode_t mode; /**< ACMP operation mode */ 178 acmp_warm_time_t warm_time; /**< ACMP warm up time */ 179 acmp_hystsel_t hystsel; /**< ACMP hysteresis level */ 180 acmp_pos_input_t p_port; /**< ACMP positive port select */ 181 acmp_neg_input_t n_port; /**< ACMP negative port select */ 182 acmp_inactval_t inactval; /**< ACMP inavtive output value */ 183 type_func_t out_inv; /**< ACMP output inverse */ 184 acmp_edge_t edge; /**< Select edges to set interrupt flag */ 185 uint8_t vdd_level; /**< Select scaling factor for CDD reference level, MAX is 63 */ 186 } acmp_init_t; 187 188 /** 189 * @brief ACMP Handle Structure definition 190 */ 191 typedef struct acmp_handle_s { 192 ACMP_TypeDef *perh; /**< Register base address */ 193 acmp_init_t init; /**< ACMP required parameters */ 194 lock_state_t lock; /**< Locking object */ 195 196 void (*acmp_warmup_cplt_cbk)(struct acmp_handle_s *arg); /**< ACMP warm-up complete callback */ 197 void (*acmp_edge_cplt_cbk)(struct acmp_handle_s *arg); /**< ACMP edge trigger callback */ 198 } acmp_handle_t; 199 /** 200 * @} 201 */ 202 203 /** @defgroup ACMP_Public_Macros ACMP Public Macros 204 * @{ 205 */ 206 #define ACMP_ENABLE(handle) (SET_BIT((handle)->perh->CON, ACMP_CON_EN_MSK)) 207 #define ACMP_DISABLE(handle) (CLEAR_BIT((handle)->perh->CON, ACMP_CON_EN_MSK)) 208 /** 209 * @} 210 */ 211 212 /** @defgroup ACMP_Private_Macros ACMP Private Macros 213 * @{ 214 */ 215 #define IS_ACMP_TYPE(x) (((x) == ACMP0) || \ 216 ((x) == ACMP1) || \ 217 ((x) == ACMP2)) 218 #define IS_ACMP_MODE_TYPE(x) (((x) == ACMP_ULTRA_LOW_POWER) || \ 219 ((x) == ACMP_LOW_POWER) || \ 220 ((x) == ACMP_MIDDLE_POWER) || \ 221 ((x) == ACMP_HIGH_POWER)) 222 #define IS_ACMP_IT_TYPE(x) (((x) == ACMP_IT_EDGE) || \ 223 ((x) == ACMP_IT_WARMUP)) 224 #define IS_ACMP_FLAG_TYPE(x) (((x) == ACMP_FLAG_EDGE) || \ 225 ((x) == ACMP_FLAG_WARMUP)) 226 #define IS_ACMP_STATUS_TYPE(x) (((x) == ACMP_STATUS_ACT) || \ 227 ((x) == ACMP_STATUS_OUT)) 228 #define IS_ACMP_POS_INPUT_TYPE(x) (((x) == ACMP_POS_CH0) || \ 229 ((x) == ACMP_POS_CH1) || \ 230 ((x) == ACMP_POS_CH2) || \ 231 ((x) == ACMP_POS_CH3) || \ 232 ((x) == ACMP_POS_CH4) || \ 233 ((x) == ACMP_POS_CH5) || \ 234 ((x) == ACMP_POS_CH6) || \ 235 ((x) == ACMP_POS_CH7)) 236 #define IS_ACMP_NEG_INPUT_TYPE(x) (((x) == ACMP_NEG_CH0) || \ 237 ((x) == ACMP_NEG_CH1) || \ 238 ((x) == ACMP_NEG_CH2) || \ 239 ((x) == ACMP_NEG_CH3) || \ 240 ((x) == ACMP_NEG_CH4) || \ 241 ((x) == ACMP_NEG_CH5) || \ 242 ((x) == ACMP_NEG_CH6) || \ 243 ((x) == ACMP_NEG_CH7) || \ 244 ((x) == ACMP_NEG_1V25) || \ 245 ((x) == ACMP_NEG_2V5) || \ 246 ((x) == ACMP_NEG_VDD)) 247 #define IS_ACMP_WARM_UP_TIME_TYPE(x) (((x) == ACMP_4_PCLK) || \ 248 ((x) == ACMP_8_PCLK) || \ 249 ((x) == ACMP_16_PCLK) || \ 250 ((x) == ACMP_32_PCLK) || \ 251 ((x) == ACMP_64_PCLK) || \ 252 ((x) == ACMP_128_PCLK) || \ 253 ((x) == ACMP_256_PCLK) || \ 254 ((x) == ACMP_512_PCLK)) 255 #define IS_ACMP_HYSTSEL_TYPE(x) (((x) == ACMP_HYST_0) || \ 256 ((x) == ACMP_HYST_15) || \ 257 ((x) == ACMP_HYST_22) || \ 258 ((x) == ACMP_HYST_29) || \ 259 ((x) == ACMP_HYST_36) || \ 260 ((x) == ACMP_HYST_43) || \ 261 ((x) == ACMP_HYST_50) || \ 262 ((x) == ACMP_HYST_57)) 263 #define IS_ACMP_INACTVAL_TYPE(x) (((x) == ACMP_INACTVAL_LOW) || \ 264 ((x) == ACMP_INACTVAL_HIGH)) 265 #define IS_ACMP_EDGE_TYPE(x) (((x) == ACMP_EDGE_NONE) || \ 266 ((x) == ACMP_EDGE_FALL) || \ 267 ((x) == ACMP_EDGE_RISE) || \ 268 ((x) == ACMP_EDGE_ALL)) 269 /** 270 * @} 271 */ 272 273 /** @addtogroup ACMP_Public_Functions 274 * @{ 275 */ 276 277 /** @addtogroup ACMP_Public_Functions_Group1 278 * @{ 279 */ 280 ald_status_t ald_acmp_init(acmp_handle_t *hperh); 281 /** 282 * @} 283 */ 284 /** @addtogroup ACMP_Public_Functions_Group2 285 * @{ 286 */ 287 void ald_acmp_interrupt_config(acmp_handle_t *hperh, acmp_it_t it, type_func_t state); 288 it_status_t ald_acmp_get_it_status(acmp_handle_t *hperh, acmp_it_t it); 289 flag_status_t ald_acmp_get_flag_status(acmp_handle_t *hperh, acmp_flag_t flag); 290 flag_status_t ald_acmp_get_mask_flag_status(acmp_handle_t *hperh, acmp_flag_t flag); 291 void ald_acmp_clear_flag_status(acmp_handle_t *hperh, acmp_flag_t flag); 292 /** 293 * @} 294 */ 295 /** @addtogroup ACMP_Public_Functions_Group3 296 * @{ 297 */ 298 void ald_acmp_irq_handler(acmp_handle_t *hperh); 299 void ald_acmp_out_config(acmp_handle_t *hperh, type_func_t state); 300 uint8_t ald_acmp_out_result(acmp_handle_t *hperh); 301 flag_status_t ald_acmp_get_status(acmp_handle_t *hperh, acmp_status_t status); 302 /** 303 * @} 304 */ 305 /** 306 * @} 307 */ 308 /** 309 * @} 310 */ 311 /** 312 * @} 313 */ 314 #ifdef __cplusplus 315 extern "C" } 316 #endif 317 #endif 318