1 /** 2 ****************************************************************************** 3 * @file ald_can.h 4 * @brief Header file of CAN Module driver. 5 * 6 * @version V1.0 7 * @date 16 Apr 2019 8 * @author AE Team 9 * @note 10 * Change Logs: 11 * Date Author Notes 12 * 16 Apr 2019 AE Team The first version 13 * 14 * Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved. 15 * 16 * SPDX-License-Identifier: Apache-2.0 17 * 18 * Licensed under the Apache License, Version 2.0 (the License); you may 19 * not use this file except in compliance with the License. 20 * You may obtain a copy of the License at 21 * 22 * www.apache.org/licenses/LICENSE-2.0 23 * 24 * Unless required by applicable law or agreed to in writing, software 25 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 26 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 27 * See the License for the specific language governing permissions and 28 * limitations under the License. 29 ********************************************************************************** 30 */ 31 32 #ifndef __ALD_CAN_H 33 #define __ALD_CAN_H 34 35 #ifdef __cplusplus 36 extern "C" { 37 #endif 38 39 #include "utils.h" 40 41 /** @addtogroup ES32FXXX_ALD 42 * @{ 43 */ 44 45 /** @addtogroup CAN 46 * @{ 47 */ 48 49 /** @defgroup CAN_Public_Types CAN Public Types 50 * @{ 51 */ 52 /** 53 * @brief ALD State structures definition 54 */ 55 typedef enum { 56 CAN_STATE_RESET = 0x00U, /**< CAN not yet initialized or disabled */ 57 CAN_STATE_READY = 0x01U, /**< CAN initialized and ready for use */ 58 CAN_STATE_BUSY = 0x02U, /**< CAN process is ongoing */ 59 CAN_STATE_BUSY_TX = 0x11U, /**< CAN process is ongoing */ 60 CAN_STATE_BUSY_RX0 = 0x21U, /**< CAN process is ongoing */ 61 CAN_STATE_BUSY_RX1 = 0x41U, /**< CAN process is ongoing */ 62 CAN_STATE_BUSY_TX_RX0 = 0x31U, /**< CAN process is ongoing */ 63 CAN_STATE_BUSY_TX_RX1 = 0x51U, /**< CAN process is ongoing */ 64 CAN_STATE_BUSY_RX0_RX1 = 0x61U, /**< CAN process is ongoing */ 65 CAN_STATE_BUSY_TX_RX0_RX1 = 0x71U, /**< CAN process is ongoing */ 66 CAN_STATE_TIMEOUT = 0x04U, /**< CAN in Timeout state */ 67 CAN_STATE_ERROR = 0x08U, /**< CAN error state */ 68 } can_state_t; 69 70 /** 71 * @brief CAN Error Code 72 */ 73 typedef enum { 74 CAN_ERROR_NONE = 0x00U, /**< No error */ 75 CAN_ERROR_EWG = 0x01U, /**< EWG error */ 76 CAN_ERROR_EPV = 0x02U, /**< EPV error */ 77 CAN_ERROR_BOF = 0x04U, /**< BOF error */ 78 CAN_ERROR_STF = 0x08U, /**< Stuff error */ 79 CAN_ERROR_FOR = 0x10U, /**< Form error */ 80 CAN_ERROR_ACK = 0x20U, /**< Acknowledgment error */ 81 CAN_ERROR_BR = 0x40U, /**< Bit recessive */ 82 CAN_ERROR_BD = 0x80U, /**< LEC dominant */ 83 CAN_ERROR_CRC = 0x100U, /**< LEC transfer error */ 84 CAN_ERROR_UNK = 0x200U, /**< Unknown error */ 85 } can_error_t; 86 87 /** 88 * @brief CAN Operating Mode 89 */ 90 typedef enum { 91 CAN_MODE_NORMAL = 0x00U, /**< Normal mode */ 92 CAN_MODE_LOOPBACK = 0x01U, /**< Loopback mode */ 93 CAN_MODE_SILENT = 0x02U, /**< Silent mode */ 94 CAN_MODE_SILENT_LOOPBACK = 0x03U, /**< Loopback combined with silent mode */ 95 } can_operate_mode_t; 96 97 /** 98 * @brief CAN Synchronization Jump Width 99 */ 100 typedef enum { 101 CAN_SJW_1 = 0x0U, /**< 1 time quantum */ 102 CAN_SJW_2 = 0x1U, /**< 2 time quantum */ 103 CAN_SJW_3 = 0x2U, /**< 3 time quantum */ 104 CAN_SJW_4 = 0x3U, /**< 4 time quantum */ 105 } can_sjw_t; 106 107 /** 108 * @brief CAN Time Quantum in Bit Segment 1 109 */ 110 typedef enum { 111 CAN_SEG1_1 = 0x0U, /**< 1 time quantum */ 112 CAN_SEG1_2 = 0x1U, /**< 2 time quantum */ 113 CAN_SEG1_3 = 0x2U, /**< 3 time quantum */ 114 CAN_SEG1_4 = 0x3U, /**< 4 time quantum */ 115 CAN_SEG1_5 = 0x4U, /**< 5 time quantum */ 116 CAN_SEG1_6 = 0x5U, /**< 6 time quantum */ 117 CAN_SEG1_7 = 0x6U, /**< 7 time quantum */ 118 CAN_SEG1_8 = 0x7U, /**< 8 time quantum */ 119 CAN_SEG1_9 = 0x8U, /**< 9 time quantum */ 120 CAN_SEG1_10 = 0x9U, /**< 10 time quantum */ 121 CAN_SEG1_11 = 0xAU, /**< 11 time quantum */ 122 CAN_SEG1_12 = 0xBU, /**< 12 time quantum */ 123 CAN_SEG1_13 = 0xCU, /**< 13 time quantum */ 124 CAN_SEG1_14 = 0xDU, /**< 14 time quantum */ 125 CAN_SEG1_15 = 0xEU, /**< 15 time quantum */ 126 CAN_SEG1_16 = 0xFU, /**< 16 time quantum */ 127 } can_seg1_t; 128 129 /** 130 * @brief CAN Time Quantum in Bit Segment 2 131 */ 132 typedef enum { 133 CAN_SEG2_1 = 0x0U, /**< 1 time quantum */ 134 CAN_SEG2_2 = 0x1U, /**< 2 time quantum */ 135 CAN_SEG2_3 = 0x2U, /**< 3 time quantum */ 136 CAN_SEG2_4 = 0x3U, /**< 4 time quantum */ 137 CAN_SEG2_5 = 0x4U, /**< 5 time quantum */ 138 CAN_SEG2_6 = 0x5U, /**< 6 time quantum */ 139 CAN_SEG2_7 = 0x6U, /**< 7 time quantum */ 140 CAN_SEG2_8 = 0x7U, /**< 8 time quantum */ 141 } can_seg2_t; 142 143 /** 144 * @brief CAN Filter Mode 145 */ 146 typedef enum { 147 CAN_FILTER_MODE_MASK = 0x0U, /**< Identifier mask mode */ 148 CAN_FILTER_MODE_LIST = 0x1U, /**< Identifier list mode */ 149 } can_filter_mode_t; 150 151 /** 152 * @brief CAN Filter Scale 153 */ 154 typedef enum { 155 CAN_FILTER_SCALE_16 = 0x0U, /**< Two 16-bit filters */ 156 CAN_FILTER_SCALE_32 = 0x1U, /**< One 32-bit filter */ 157 } can_filter_scale_t; 158 159 /** 160 * @brief CAN Filter fifo 161 */ 162 typedef enum { 163 CAN_FILTER_FIFO0 = 0x0U, /**< FIFO 0 assignment for filter */ 164 CAN_FILTER_FIFO1 = 0x1U, /**< FIFO 1 assignment for filter */ 165 } can_filter_fifo_t; 166 167 /** 168 * @brief CAN Identifier Type 169 */ 170 typedef enum { 171 CAN_ID_STD = 0x0U, /**< Standard Id */ 172 CAN_ID_EXT = 0x1U, /**< Extended Id */ 173 } can_id_type_t; 174 175 /** 176 * @brief CAN Remote Transmission Request 177 */ 178 typedef enum { 179 CAN_RTR_DATA = 0x0U, /**< Data frame */ 180 CAN_RTR_REMOTE = 0x1U, /**< Remote frame */ 181 } can_remote_req_t; 182 183 /** 184 * @brief CAN Transmit Constants 185 */ 186 typedef enum { 187 CAN_TX_MAILBOX_0 = 0x0U, /**< TX mailbox index 0 */ 188 CAN_TX_MAILBOX_1 = 0x1U, /**< TX mailbox index 1 */ 189 CAN_TX_MAILBOX_2 = 0x2U, /**< TX mailbox index 2 */ 190 CAN_TX_MAILBOX_NONE = 0x3U, /**< MailBox can't be used */ 191 } can_tx_mailbox_t; 192 193 /** 194 * @brief CAN Receive fifo Number 195 */ 196 typedef enum { 197 CAN_RX_FIFO0 = 0x0U, /**< CAN fifo 0 used to receive */ 198 CAN_RX_FIFO1 = 0x1U, /**< CAN fifo 1 used to receive */ 199 } can_rx_fifo_t; 200 201 /** 202 * @brief CAN Flags 203 */ 204 typedef enum { 205 CAN_FLAG_SLPS = (1U << 1), /**< Sleep acknowledge flag */ 206 CAN_FLAG_ERR = (1U << 2), /**< Error flag*/ 207 CAN_FLAG_WK = (1U << 3), /**< Wake up flag */ 208 CAN_FLAG_SLP = (1U << 4), /**< Sleep acknowledge flag */ 209 CAN_FLAG_M0REQC = (1U << 20) | (1U << 0), /**< Request MailBox0 flag */ 210 CAN_FLAG_M0TXC = (1U << 20) | (1U << 1), /**< Transmission OK MailBox0 flag */ 211 CAN_FLAG_M1REQC = (1U << 20) | (1U << 8), /**< Request MailBox1 flag */ 212 CAN_FLAG_M1TXC = (1U << 20) | (1U << 9), /**< Transmission OK MailBox1 flag */ 213 CAN_FLAG_M2REQC = (1U << 20) | (1U << 16), /**< Request MailBox2 flag */ 214 CAN_FLAG_M2TXC = (1U << 20) | (1U << 17), /**< Transmission OK MailBox2 flag */ 215 CAN_FLAG_TXM0 = (1U << 20) | (1U << 26), /**< Transmit mailbox 0 empty flag */ 216 CAN_FLAG_TXM1 = (1U << 20) | (1U << 27), /**< Transmit mailbox 1 empty flag */ 217 CAN_FLAG_TXM2 = (1U << 20) | (1U << 28), /**< Transmit mailbox 2 empty flag */ 218 CAN_FLAG_FF0 = (2U << 20) | (1U << 3), /**< FIFO 0 Full flag */ 219 CAN_FLAG_FOV0 = (2U << 20) | (1U << 4), /**< FIFO 0 Overrun flag */ 220 CAN_FLAG_FF1 = (3U << 20) | (1U << 3), /**< FIFO 1 Full flag */ 221 CAN_FLAG_FOV1 = (3U << 20) | (1U << 4), /**< FIFO 1 Overrun flag */ 222 CAN_FLAG_WARN = (4U << 20) | (1U << 0), /**< Error warning flag */ 223 CAN_FLAG_PERR = (4U << 20) | (1U << 1), /**< Error passive flag */ 224 CAN_FLAG_BOF = (4U << 20) | (1U << 2), /**< Bus-Off flag */ 225 } can_flag_t; 226 227 /** 228 * @brief CAN Interrupts 229 */ 230 typedef enum { 231 CAN_IT_TXM = (1U << 0), /**< Transmit mailbox empty interrupt bit */ 232 CAN_IT_FP0 = (1U << 1), /**< FIFO0 message pending interrupt bit */ 233 CAN_IT_FF0 = (1U << 2), /**< FIFO0 full interrupt bit */ 234 CAN_IT_FOV0 = (1U << 3), /**< FIFO0 overrun interrupt bit */ 235 CAN_IT_FP1 = (1U << 4), /**< FIFO1 message pending interrupt bit */ 236 CAN_IT_FF1 = (1U << 5), /**< FIFO1 full interrupt bit */ 237 CAN_IT_FOV1 = (1U << 6), /**< FIFO1 overrun interrupt bit */ 238 CAN_IT_WARN = (1U << 8), /**< Error warning interrupt bit */ 239 CAN_IT_PERR = (1U << 9), /**< Error passive interrupt bit */ 240 CAN_IT_BOF = (1U << 10), /**< Bus-off interrupt bit */ 241 CAN_IT_PRERR = (1U << 11), /**< Last error code interrupt bit */ 242 CAN_IT_ERR = (1U << 15), /**< Error interrupt bit */ 243 CAN_IT_WK = (1U << 16), /**< wake-up interrupt bit */ 244 CAN_IT_SLP = (1U << 17), /**< sleep interrupt bit */ 245 } can_it_t; 246 247 /** 248 * @brief CAN filter configuration structure definition 249 */ 250 typedef struct { 251 uint32_t id_high; /**< Specifies the filter identification number */ 252 uint32_t id_low; /**< Specifies the filter identification number */ 253 uint32_t mask_id_high; /**< Specifies the filter mask number or identification number */ 254 uint32_t mask_id_low; /**< Specifies the filter mask number or identification number */ 255 can_filter_fifo_t fifo; /**< Specifies the fifo (0 or 1) which will be assigned to the filter. */ 256 uint32_t number; /**< Specifies the filter which will be initialized. */ 257 can_filter_mode_t mode; /**< Specifies the filter mode to be initialized. */ 258 can_filter_scale_t scale; /**< Specifies the filter scale. */ 259 type_func_t active; /**< Enable or disable the filter. */ 260 } can_filter_t; 261 262 /** 263 * @brief CAN init structure definition 264 */ 265 typedef struct { 266 uint32_t psc; /**< Specifies the length of a time quantum. */ 267 can_operate_mode_t mode; /**< Specifies the CAN operating mode. */ 268 can_sjw_t sjw; /**< Specifies the maximum number of time quanta the CAN hardware is 269 allowed to lengthen or shorten a bit to perform resynchronization. */ 270 can_seg1_t seg1; /**< Specifies the number of time quanta in Bit Segment 1. */ 271 can_seg2_t seg2; /**< Specifies the number of time quanta in Bit Segment 2. */ 272 type_func_t ttcm; /**< Enable or disable the time triggered communication mode. */ 273 type_func_t abom; /**< Enable or disable the automatic bus-off management. */ 274 type_func_t awk; /**< Enable or disable the automatic wake-up mode. */ 275 type_func_t artx; /**< Enable or disable the non-automatic retransmission mode. */ 276 type_func_t rfom; /**< Enable or disable the Receive fifo Locked mode. */ 277 type_func_t txmp; /**< Enable or disable the transmit fifo priority. */ 278 } can_init_t; 279 280 /** 281 * @brief CAN Tx message structure definition 282 */ 283 typedef struct { 284 uint32_t std; /**< Specifies the standard identifier. */ 285 uint32_t ext; /**< Specifies the extended identifier. */ 286 can_id_type_t type; /**< Specifies the type of identifier for the message that will be transmitted. */ 287 can_remote_req_t rtr; /**< Specifies the type of frame for the message that will be transmitted. */ 288 uint32_t len; /**< Specifies the length of the frame that will be transmitted. */ 289 uint8_t data[8]; /**< Contains the data to be transmitted. */ 290 } can_tx_msg_t; 291 292 /** 293 * @brief CAN Rx message structure definition 294 */ 295 typedef struct { 296 uint32_t std; /**< Specifies the standard identifier. */ 297 uint32_t ext; /**< Specifies the extended identifier. */ 298 can_id_type_t type; /**< Specifies the type of identifier for the message that will be received. */ 299 can_remote_req_t rtr; /**< Specifies the type of frame for the received message. */ 300 uint32_t len; /**< Specifies the length of the frame that will be received. */ 301 uint8_t data[8]; /**< Contains the data to be received. */ 302 uint32_t fmi; /**< Specifies the index of the filter the message stored in the mailbox passes through. */ 303 can_rx_fifo_t num; /**< Specifies the receive fifo number. */ 304 } can_rx_msg_t; 305 306 /** 307 * @brief CAN handle Structure definition 308 */ 309 typedef struct can_handle_s { 310 CAN_TypeDef *perh; /**< Register base address */ 311 can_init_t init; /**< CAN required parameters */ 312 can_rx_msg_t *rx0_msg; /**< Pointer to receive message from FIFO0 */ 313 can_rx_msg_t *rx1_msg; /**< Pointer to receive message from FIFO1 */ 314 lock_state_t lock; /**< CAN locking object */ 315 can_state_t state; /**< CAN communication state */ 316 can_error_t err; /**< CAN Error code */ 317 318 void (*tx_cplt_cbk)(struct can_handle_s *arg); /**< Tx completed callback */ 319 void (*rx_cplt_cbk)(struct can_handle_s *arg, can_rx_fifo_t num); /**< Rx completed callback */ 320 void (*error_cbk)(struct can_handle_s *arg); /**< error callback */ 321 } can_handle_t; 322 /** 323 * @} 324 */ 325 326 /** @defgroup CAN_Public_Macro CAN Public Macros 327 * @{ 328 */ 329 #define CAN_RESET_HANDLE_STATE(x) ((x)->state = CAN_STATE_RESET) 330 #define CAN_RX_MSG_PENDING(x, y) (((y) == CAN_RX_FIFO0) ? \ 331 (READ_BIT((x)->perh->RXF0, CAN_RXF0_PEND_MSK)) : (READ_BIT((x)->perh->RXF1, CAN_RXF1_PEND_MSK))) 332 #define CAN_DBG_FREEZE(x, y) (MODIFY_REG((x)->perh->CON, CAN_CON_DBGSTP_MSK, (y) << CAN_CON_DBGSTP_POS)) 333 #define CAN_TX_STAMP_ENABLE(x, y) (SET_BIT((x)->perh->TxMailBox[(y)].TXFCON, CAN_TXFCON0_TXGT_MSK)) 334 #define CAN_TX_STAMP_DISABLE(x, y) (CLEAR_BIT((x)->perh->TxMailBox[(y)].TXFCON, CAN_TXFCON0_TXGT_MSK)) 335 /** 336 * @} 337 */ 338 339 /** @defgroup CAN_Private_Macros CAN Private Macros 340 * @{ 341 */ 342 #define IS_CAN_ALL(x) ((x) == CAN0) 343 #define IS_CAN_FILTER_NUMBER(x) ((x) <= 13) 344 #define IS_CAN_MODE(x) (((x) == CAN_MODE_NORMAL) || \ 345 ((x) == CAN_MODE_LOOPBACK) || \ 346 ((x) == CAN_MODE_SILENT) || \ 347 ((x) == CAN_MODE_SILENT_LOOPBACK)) 348 #define IS_CAN_SJW(x) (((x) == CAN_SJW_1) || \ 349 ((x) == CAN_SJW_2) || \ 350 ((x) == CAN_SJW_3) || \ 351 ((x) == CAN_SJW_4)) 352 #define IS_CAN_BS1(x) ((x) <= CAN_SEG1_16) 353 #define IS_CAN_BS2(x) ((x) <= CAN_SEG2_8) 354 #define IS_CAN_FILTER_MODE(x) (((x) == CAN_FILTER_MODE_MASK) || \ 355 ((x) == CAN_FILTER_MODE_LIST)) 356 #define IS_CAN_FILTER_SCALE(x) (((x) == CAN_FILTER_SCALE_16) || \ 357 ((x) == CAN_FILTER_SCALE_32)) 358 #define IS_CAN_FILTER_FIFO(x) (((x) == CAN_FILTER_FIFO0) || \ 359 ((x) == CAN_FILTER_FIFO1)) 360 #define IS_CAN_IDTYPE(x) (((x) == CAN_ID_STD) || \ 361 ((x) == CAN_ID_EXT)) 362 #define IS_CAN_RTR(x) (((x) == CAN_RTR_DATA) || ((x) == CAN_RTR_REMOTE)) 363 #define IS_CAN_FIFO(x) (((x) == CAN_RX_FIFO0) || ((x) == CAN_RX_FIFO1)) 364 #define IS_CAN_TX_MAILBOX(x) ((x) <= CAN_TX_MAILBOX_NONE) 365 #define IS_CAN_STDID(x) ((x) <= ((uint32_t)0x7FF)) 366 #define IS_CAN_EXTID(x) ((x) <= ((uint32_t)0x1FFFFFFF)) 367 #define IS_CAN_DATA_LEN(x) ((x) <= ((uint8_t)0x08)) 368 #define IS_CAN_PRESCALER(x) (((x) >= 1) && ((x) <= 1024)) 369 #define IS_CAN_GET_FLAG(x) (((x) == CAN_FLAG_SLPS) || \ 370 ((x) == CAN_FLAG_ERR) || \ 371 ((x) == CAN_FLAG_WK) || \ 372 ((x) == CAN_FLAG_SLP) || \ 373 ((x) == CAN_FLAG_M0REQC) || \ 374 ((x) == CAN_FLAG_M0TXC) || \ 375 ((x) == CAN_FLAG_M1REQC) || \ 376 ((x) == CAN_FLAG_M1TXC) || \ 377 ((x) == CAN_FLAG_M2REQC) || \ 378 ((x) == CAN_FLAG_M2TXC) || \ 379 ((x) == CAN_FLAG_TXM0) || \ 380 ((x) == CAN_FLAG_TXM1) || \ 381 ((x) == CAN_FLAG_TXM2) || \ 382 ((x) == CAN_FLAG_FF0) || \ 383 ((x) == CAN_FLAG_FOV0) || \ 384 ((x) == CAN_FLAG_FF1) || \ 385 ((x) == CAN_FLAG_FOV1) || \ 386 ((x) == CAN_FLAG_WARN) || \ 387 ((x) == CAN_FLAG_PERR) || \ 388 ((x) == CAN_FLAG_BOF)) 389 #define IS_CAN_CLEAR_FLAG(x) (((x) == CAN_FLAG_ERR) || \ 390 ((x) == CAN_FLAG_WK) || \ 391 ((x) == CAN_FLAG_SLP) || \ 392 ((x) == CAN_FLAG_M0REQC) || \ 393 ((x) == CAN_FLAG_M1REQC) || \ 394 ((x) == CAN_FLAG_M2REQC) || \ 395 ((x) == CAN_FLAG_FF0) || \ 396 ((x) == CAN_FLAG_FOV0) || \ 397 ((x) == CAN_FLAG_FF1) || \ 398 ((x) == CAN_FLAG_FOV1)) 399 #define IS_CAN_IT(x) (((x) == CAN_IT_TXM) || \ 400 ((x) == CAN_IT_FP0) || \ 401 ((x) == CAN_IT_FF0) || \ 402 ((x) == CAN_IT_FOV0) || \ 403 ((x) == CAN_IT_FP1) || \ 404 ((x) == CAN_IT_FF1) || \ 405 ((x) == CAN_IT_FOV1) || \ 406 ((x) == CAN_IT_WARN) || \ 407 ((x) == CAN_IT_PERR) || \ 408 ((x) == CAN_IT_BOF) || \ 409 ((x) == CAN_IT_PRERR) || \ 410 ((x) == CAN_IT_ERR) || \ 411 ((x) == CAN_IT_WK) || \ 412 ((x) == CAN_IT_SLP)) 413 #define CAN_TIMEOUT_VALUE 100 414 #define CAN_STATE_TX_MASK (1U << 4) 415 #define CAN_STATE_RX0_MASK (1U << 5) 416 #define CAN_STATE_RX1_MASK (1U << 6) 417 418 /** 419 * @} 420 */ 421 422 /** @addtogroup CAN_Public_Functions 423 * @{ 424 */ 425 426 /** @addtogroup CAN_Public_Functions_Group1 427 * @{ 428 */ 429 /* Initialization functions */ 430 void ald_can_reset(can_handle_t *hperh); 431 ald_status_t ald_can_init(can_handle_t *hperh); 432 ald_status_t ald_can_filter_config(can_handle_t *hperh, can_filter_t *config); 433 /** 434 * @} 435 */ 436 437 /** @addtogroup CAN_Public_Functions_Group2 438 * @{ 439 */ 440 /* IO operation functions */ 441 ald_status_t ald_can_send(can_handle_t *hperh, can_tx_msg_t *msg, uint32_t timeout); 442 ald_status_t ald_can_send_by_it(can_handle_t *hperh, can_tx_msg_t *msg); 443 ald_status_t ald_can_recv(can_handle_t *hperh, can_rx_fifo_t num, can_rx_msg_t *msg, uint32_t timeout); 444 ald_status_t ald_can_recv_by_it(can_handle_t *hperh, can_rx_fifo_t num, can_rx_msg_t *msg); 445 /** 446 * @} 447 */ 448 449 /** @addtogroup CAN_Public_Functions_Group3 450 * @{ 451 */ 452 /* Control function */ 453 ald_status_t ald_can_sleep(can_handle_t *hperh); 454 ald_status_t ald_can_wake_up(can_handle_t *hperh); 455 void ald_can_cancel_send(can_handle_t *hperh, can_tx_mailbox_t box); 456 void ald_can_irq_handler(can_handle_t *hperh); 457 type_bool_t ald_can_get_tx_status(can_handle_t *hperh, can_tx_mailbox_t box); 458 void ald_can_interrupt_config(can_handle_t *hperh, can_it_t it, type_func_t state); 459 it_status_t ald_can_get_it_status(can_handle_t *hperh, can_it_t it); 460 flag_status_t ald_can_get_flag_status(can_handle_t *hperh, can_flag_t flag); 461 void ald_can_clear_flag_status(can_handle_t *hperh, can_flag_t flag); 462 /** 463 * @} 464 */ 465 466 /** @addtogroup CAN_Public_Functions_Group4 467 * @{ 468 */ 469 /* State and Error functions */ 470 can_state_t ald_can_get_state(can_handle_t *hperh); 471 can_error_t ald_can_get_error(can_handle_t *hperh); 472 /** 473 * @} 474 */ 475 476 /** 477 * @} 478 */ 479 480 /** 481 * @} 482 */ 483 484 /** 485 * @} 486 */ 487 488 #ifdef __cplusplus 489 } 490 #endif 491 492 #endif /* __ALD_CAN_H */ 493