1 /**
2 *********************************************************************************
3 *
4 * @file ald_sram.c
5 * @brief SRAM module driver.
6 *
7 * @version V1.0
8 * @date 25 Dec 2019
9 * @author AE Team
10 * @note
11 * Change Logs:
12 * Date Author Notes
13 * 25 Dec 2019 AE Team The first version
14 *
15 * Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved.
16 *
17 * SPDX-License-Identifier: Apache-2.0
18 *
19 * Licensed under the Apache License, Version 2.0 (the License); you may
20 * not use this file except in compliance with the License.
21 * You may obtain a copy of the License at
22 *
23 * www.apache.org/licenses/LICENSE-2.0
24 *
25 * Unless required by applicable law or agreed to in writing, software
26 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
27 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
28 * See the License for the specific language governing permissions and
29 * limitations under the License.
30 **********************************************************************************
31 */
32 #include "ald_conf.h"
33
34 /** @addtogroup ES32FXXX_ALD
35 * @{
36 */
37
38 /** @defgroup SRAM SRAM
39 * @brief SRAM module driver
40 * @{
41 */
42
43 #ifdef ALD_SRAM
44
45 /** @defgroup SRAM_Public_Functions SRAM Public Functions
46 * @{
47 */
48 /** @defgroup SRAM_Public_Functions_Group1 Initialization functions
49 * @brief Initialization functions
50 * @{
51 */
52 /**
53 * @brief Performs the SRAM device initialization sequence
54 * @param hperh: pointer to a sram_handle_t structure
55 * @param timing: Pointer to SRAM control timing structure
56 * @param ext_timing: Pointer to SRAM extended mode timing structure
57 * @retval ald status
58 */
ald_sram_init(sram_handle_t * hperh,ald_ebi_nor_sram_timing_t * timing,ald_ebi_nor_sram_timing_t * ext_timing)59 ald_status_t ald_sram_init(sram_handle_t *hperh, ald_ebi_nor_sram_timing_t *timing, ald_ebi_nor_sram_timing_t *ext_timing)
60 {
61 if (hperh == NULL)
62 return ERROR;
63
64 if (hperh->state == ALD_SRAM_STATE_RESET)
65 hperh->lock = UNLOCK;
66
67 /* Initialize SRAM control Interface */
68 ald_ebi_nor_sram_init(hperh->instance, &(hperh->init));
69 /* Initialize SRAM timing Interface */
70 ald_ebi_nor_sram_timing_init(hperh->instance, timing, hperh->init.bank);
71 /* Initialize SRAM extended mode timing Interface */
72 ald_ebi_nor_sram_ext_timing_init(hperh->ext, ext_timing, hperh->init.bank, hperh->init.ext_mode);
73 /* Enable the NORSRAM device */
74 ald_ebi_nor_sram_enable(hperh->instance, hperh->init.bank);
75
76 return OK;
77 }
78
79 /**
80 * @brief Performs the SRAM device De-initialization sequence.
81 * @param hperh: pointer to a sram_handle_t structure
82 * @retval ald status
83 */
ald_sram_deinit(sram_handle_t * hperh)84 ald_status_t ald_sram_deinit(sram_handle_t *hperh)
85 {
86 ald_ebi_nor_sram_deinit(hperh->instance, hperh->ext, hperh->init.bank);
87 hperh->state = ALD_SRAM_STATE_RESET;
88 __UNLOCK(hperh);
89
90 return OK;
91 }
92 /**
93 * @}
94 */
95
96 /** @defgroup SRAM_Public_Functions_Group2 I/O operation functions
97 * @brief I/O operation functions
98 * @{
99 */
100 /**
101 * @brief Reads 8-bit buffer from SRAM memory.
102 * @param hperh: pointer to a sram_handle_t structure
103 * @param addr: Pointer to read start address
104 * @param buf: Pointer to destination buffer
105 * @param size: Size of the buffer to read from memory
106 * @retval ald status
107 */
ald_sram_read_8b(sram_handle_t * hperh,uint32_t * addr,uint8_t * buf,uint32_t size)108 ald_status_t ald_sram_read_8b(sram_handle_t *hperh, uint32_t *addr, uint8_t *buf, uint32_t size)
109 {
110 __IO uint8_t * psramaddr = (uint8_t *)addr;
111
112 __LOCK(hperh);
113 hperh->state = ALD_SRAM_STATE_BUSY;
114
115 /* Read data from memory */
116 for (; size != 0U; size--)
117 *buf++ = *(__IO uint8_t *)psramaddr++;
118
119 hperh->state = ALD_SRAM_STATE_READY;
120 __UNLOCK(hperh);
121
122 return OK;
123 }
124
125 /**
126 * @brief Writes 8-bit buffer to SRAM memory.
127 * @param hperh: pointer to a sram_handle_t structure
128 * @param addr: Pointer to write start address
129 * @param buf: Pointer to source buffer to write
130 * @param size: Size of the buffer to write to memory
131 * @retval ald status
132 */
ald_sram_write_8b(sram_handle_t * hperh,uint32_t * addr,uint8_t * buf,uint32_t size)133 ald_status_t ald_sram_write_8b(sram_handle_t *hperh, uint32_t *addr, uint8_t *buf, uint32_t size)
134 {
135 __IO uint8_t * psramaddr = (uint8_t *)addr;
136
137 if (hperh->state == ALD_SRAM_STATE_PROTECTED)
138 return ERROR;
139
140 __LOCK(hperh);
141 hperh->state = ALD_SRAM_STATE_BUSY;
142
143 /* Write data to memory */
144 for (; size != 0U; size--)
145 *(__IO uint8_t *)psramaddr++ = *buf++;
146
147 hperh->state = ALD_SRAM_STATE_READY;
148 __UNLOCK(hperh);
149
150 return OK;
151 }
152
153 /**
154 * @brief Reads 16-bit buffer from SRAM memory.
155 * @param hperh: pointer to a sram_handle_t structure that contains
156 * the configuration information for SRAM module.
157 * @param addr: Pointer to read start address
158 * @param buf: Pointer to destination buffer
159 * @param size: Size of the buffer to read from memory
160 * @retval ald status
161 */
ald_sram_read_16b(sram_handle_t * hperh,uint32_t * addr,uint16_t * buf,uint32_t size)162 ald_status_t ald_sram_read_16b(sram_handle_t *hperh, uint32_t *addr, uint16_t *buf, uint32_t size)
163 {
164 __IO uint16_t * psramaddr = (uint16_t *)addr;
165
166 __LOCK(hperh);
167 hperh->state = ALD_SRAM_STATE_BUSY;
168
169 /* Read data from memory */
170 for (; size != 0U; size--)
171 *buf++ = *(__IO uint16_t *)psramaddr++;
172
173 hperh->state = ALD_SRAM_STATE_READY;
174 __UNLOCK(hperh);
175
176 return OK;
177 }
178
179 /**
180 * @brief Writes 16-bit buffer to SRAM memory.
181 * @param hperh: pointer to a sram_handle_t structure that contains
182 * the configuration information for SRAM module.
183 * @param addr: Pointer to write start address
184 * @param buf: Pointer to source buffer to write
185 * @param size: Size of the buffer to write to memory
186 * @retval ald status
187 */
ald_sram_write_16b(sram_handle_t * hperh,uint32_t * addr,uint16_t * buf,uint32_t size)188 ald_status_t ald_sram_write_16b(sram_handle_t *hperh, uint32_t *addr, uint16_t *buf, uint32_t size)
189 {
190 __IO uint16_t * psramaddr = (uint16_t *)addr;
191
192 if (hperh->state == ALD_SRAM_STATE_PROTECTED)
193 return ERROR;
194
195 __LOCK(hperh);
196 hperh->state = ALD_SRAM_STATE_BUSY;
197
198 /* Write data to memory */
199 for (; size != 0U; size--)
200 *(__IO uint16_t *)psramaddr++ = *buf++;
201
202 hperh->state = ALD_SRAM_STATE_READY;
203 __UNLOCK(hperh);
204
205 return OK;
206 }
207
208 /**
209 * @brief Reads 32-bit buffer from SRAM memory.
210 * @param hperh: pointer to a sram_handle_t structure
211 * @param addr: Pointer to read start address
212 * @param buf: Pointer to destination buffer
213 * @param size: Size of the buffer to read from memory
214 * @retval ald status
215 */
ald_sram_read_32b(sram_handle_t * hperh,uint32_t * addr,uint32_t * buf,uint32_t size)216 ald_status_t ald_sram_read_32b(sram_handle_t *hperh, uint32_t *addr, uint32_t *buf, uint32_t size)
217 {
218 __LOCK(hperh);
219 hperh->state = ALD_SRAM_STATE_BUSY;
220
221 /* Read data from memory */
222 for (; size != 0U; size--)
223 *buf++ = *(__IO uint32_t *)addr++;
224
225 hperh->state = ALD_SRAM_STATE_READY;
226 __UNLOCK(hperh);
227
228 return OK;
229 }
230
231 /**
232 * @brief Writes 32-bit buffer to SRAM memory.
233 * @param hperh: pointer to a sram_handle_t structure that contains
234 * the configuration information for SRAM module.
235 * @param addr: Pointer to write start address
236 * @param buf: Pointer to source buffer to write
237 * @param size: Size of the buffer to write to memory
238 * @retval ald status
239 */
ald_sram_write_32b(sram_handle_t * hperh,uint32_t * addr,uint32_t * buf,uint32_t size)240 ald_status_t ald_sram_write_32b(sram_handle_t *hperh, uint32_t *addr, uint32_t *buf, uint32_t size)
241 {
242 if (hperh->state == ALD_SRAM_STATE_PROTECTED)
243 return ERROR;
244
245 __LOCK(hperh);
246 hperh->state = ALD_SRAM_STATE_BUSY;
247
248 /* Write data to memory */
249 for (; size != 0U; size--)
250 *(__IO uint32_t *)addr++ = *buf++;
251
252 hperh->state = ALD_SRAM_STATE_READY;
253 __UNLOCK(hperh);
254
255 return OK;
256 }
257
258 #ifdef ALD_DMA
259 /**
260 * @brief Reads a halfwords data from the SRAM memory using DMA transfer.
261 * @param hperh: pointer to a sram_handle_t structure that contains
262 * the configuration information for SRAM module.
263 * @param addr: Pointer to read start address
264 * @param buf: Pointer to destination buffer
265 * @param size: Size of the buffer to read from memory
266 * @param ch: Index of DMA channel
267 * @retval ald status
268 */
ald_sram_read_by_dma(sram_handle_t * hperh,uint16_t * addr,uint16_t * buf,uint16_t size,uint8_t ch)269 ald_status_t ald_sram_read_by_dma(sram_handle_t *hperh, uint16_t *addr, uint16_t *buf, uint16_t size, uint8_t ch)
270 {
271 if (buf == NULL)
272 return ERROR;
273
274 hperh->hdma.perh = DMA0;
275 hperh->hdma.cplt_cbk = hperh->cplt_cbk;
276 ald_dma_config_struct(&hperh->hdma.config);
277
278 hperh->hdma.config.data_width = DMA_DATA_SIZE_HALFWORD;
279 hperh->hdma.config.src = (void *)addr;
280 hperh->hdma.config.dst = (void *)buf;
281 hperh->hdma.config.size = size;
282 hperh->hdma.config.src_inc = DMA_DATA_INC_HALFWORD;
283 hperh->hdma.config.dst_inc = DMA_DATA_INC_HALFWORD;
284 hperh->hdma.config.msel = DMA_MSEL_NONE;
285 hperh->hdma.config.msigsel = DMA_MSIGSEL_NONE;
286 hperh->hdma.config.channel = ch;
287 hperh->hdma.config.R_power = DMA_R_POWER_4;
288 hperh->hdma.config.burst = ENABLE;
289
290 ald_dma_config_auto(&hperh->hdma);
291 return OK;
292 }
293
294 /**
295 * @brief Write a halfwords data to the SRAM memory using DMA transfer.
296 * @param hperh: pointer to a sram_handle_t structure that contains
297 * the configuration information for SRAM module.
298 * @param addr: Pointer to write start address
299 * @param buf: Pointer to destination buffer
300 * @param size: Size of the buffer to write from memory
301 * @param ch: Index of DMA channel
302 * @retval ald status
303 */
ald_sram_write_by_dma(sram_handle_t * hperh,uint16_t * addr,uint16_t * buf,uint16_t size,uint8_t ch)304 ald_status_t ald_sram_write_by_dma(sram_handle_t *hperh, uint16_t *addr, uint16_t *buf, uint16_t size, uint8_t ch)
305 {
306 if (buf == NULL)
307 return ERROR;
308 ;
309 hperh->hdma.perh = DMA0;
310 hperh->hdma.cplt_cbk = hperh->cplt_cbk;
311 ald_dma_config_struct(&hperh->hdma.config);
312
313 hperh->hdma.config.data_width = DMA_DATA_SIZE_HALFWORD;
314 hperh->hdma.config.src = (void *)buf;
315 hperh->hdma.config.dst = (void *)addr;
316 hperh->hdma.config.size = size;
317 hperh->hdma.config.src_inc = DMA_DATA_INC_HALFWORD;
318 hperh->hdma.config.dst_inc = DMA_DATA_INC_HALFWORD;
319 hperh->hdma.config.msel = DMA_MSEL_NONE;
320 hperh->hdma.config.msigsel = DMA_MSIGSEL_NONE;
321 hperh->hdma.config.channel = ch;
322 hperh->hdma.config.R_power = DMA_R_POWER_4;
323 hperh->hdma.config.burst = ENABLE;
324
325 ald_dma_config_auto(&hperh->hdma);
326 return OK;
327 }
328 #endif
329 /**
330 * @}
331 */
332
333 /** @defgroup SRAM_Public_Functions_Group3 Control functions
334 * @brief Control functions
335 * @{
336 */
337 /**
338 * @brief Enables dynamically SRAM write operation.
339 * @param hperh: pointer to a sram_handle_t structure
340 * @retval ald status
341 */
ald_sram_write_enable(sram_handle_t * hperh)342 ald_status_t ald_sram_write_enable(sram_handle_t *hperh)
343 {
344 __LOCK(hperh);
345 ald_ebi_nor_sram_write_enable(hperh->instance, hperh->init.bank);
346 hperh->state = ALD_SRAM_STATE_READY;
347 __UNLOCK(hperh);
348
349 return OK;
350 }
351
352 /**
353 * @brief Disables dynamically SRAM write operation.
354 * @param hperh: pointer to a sram_handle_t structure
355 * @retval ald status
356 */
ald_sram_write_disable(sram_handle_t * hperh)357 ald_status_t ald_sram_write_disable(sram_handle_t *hperh)
358 {
359 __LOCK(hperh);
360 hperh->state = ALD_SRAM_STATE_BUSY;
361 ald_ebi_nor_sram_write_disable(hperh->instance, hperh->init.bank);
362 hperh->state = ALD_SRAM_STATE_PROTECTED;
363 __UNLOCK(hperh);
364
365 return OK;
366 }
367 /**
368 * @}
369 */
370
371 /** @addtogroup SRAM_Public_Functions_Group4 State functions
372 * @brief State functions
373 * @{
374 */
375 /**
376 * @brief Returns the SRAM controller state
377 * @param hperh: pointer to a SRAM_HandleTypeDef structure
378 * @retval ald state
379 */
ald_sram_get_state(sram_handle_t * hperh)380 ald_sram_state_t ald_sram_get_state(sram_handle_t *hperh)
381 {
382 return hperh->state;
383 }
384 /**
385 * @}
386 */
387 /**
388 * @}
389 */
390 #endif /* ALD_SRAM */
391
392 /**
393 * @}
394 */
395 /**
396 * @}
397 */
398