1 /*
2 *
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Licensed under the Apache License, Version 2.0 (the License); you may
6 * not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
13 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 * Change Logs:
18 * Date Author Notes
19 * 2019-11-01 wangyq update libraries
20 * 2020-01-14 wangyq the first version
21 * 2021-04-20 liuhy the second version
22 */
23
24 #include <rthw.h>
25 #include <rtthread.h>
26 #include <rtdevice.h>
27 #include "board.h"
28 #include "drv_i2c.h"
29
30
31 #ifdef RT_USING_I2C
32
33 #define TIMEOUT 0x0FFF
34
35 /* I2C struct definition */
36 #ifdef BSP_USING_I2C0
37 static ald_i2c_handle_t _h_i2c0;
38 #endif
39
40 #ifdef BSP_USING_I2C1
41 static i2c_handle_t _h_i2c1;
42 #endif
43
_i2c_init(void)44 static void _i2c_init(void)
45 {
46 ald_gpio_init_t gpio_instruct;
47
48 /* Initialize I2C Pin */
49 gpio_instruct.mode = ALD_GPIO_MODE_OUTPUT;
50 gpio_instruct.od = ALD_GPIO_OPEN_DRAIN;
51 gpio_instruct.pupd = ALD_GPIO_PUSH_UP;
52 gpio_instruct.odrv = ALD_GPIO_OUT_DRIVE_NORMAL;
53 gpio_instruct.flt = ALD_GPIO_FILTER_DISABLE;
54 gpio_instruct.type = ALD_GPIO_TYPE_CMOS;
55
56
57 #ifdef BSP_USING_I2C0
58
59 #if defined(ES_I2C0_SCL_GPIO_FUNC)&&defined(ES_I2C0_SCL_GPIO_PORT)&&defined(ES_I2C0_SCL_GPIO_PIN)
60 gpio_instruct.func = ES_I2C0_SCL_GPIO_FUNC;
61 ald_gpio_init(ES_I2C0_SCL_GPIO_PORT, ES_I2C0_SCL_GPIO_PIN, &gpio_instruct);
62 #endif
63
64 #if defined(ES_I2C0_SDA_GPIO_FUNC)&&defined(ES_I2C0_SDA_GPIO_PORT)&&defined(ES_I2C0_SDA_GPIO_PIN)
65 gpio_instruct.func = ES_I2C0_SDA_GPIO_FUNC;
66 ald_gpio_init(ES_I2C0_SDA_GPIO_PORT, ES_I2C0_SDA_GPIO_PIN, &gpio_instruct);
67 #endif
68
69 /* Initialize I2C Function */
70 _h_i2c0.perh = I2C0;
71 _h_i2c0.init.module = ALD_I2C_MODULE_MASTER;
72 _h_i2c0.init.clk_speed = ES_I2C0_CLK_SPEED;
73 _h_i2c0.init.own_addr1 = ES_I2C0_OWN_ADDR1;
74 _h_i2c0.init.addr_mode = ES_I2C0_ADDR_MODE;
75 _h_i2c0.init.general_call = ES_I2C0_GENERAL_CALL;
76 _h_i2c0.init.no_stretch = ES_I2C0_STRETCH;
77
78 ald_i2c_reset(&_h_i2c0);
79 ald_i2c_init(&_h_i2c0);
80
81 #endif
82
83 #ifdef BSP_USING_I2C1
84
85 #if defined(ES_I2C1_SCL_GPIO_FUNC)&&defined(ES_I2C1_SCL_GPIO_PORT)&&defined(ES_I2C1_SCL_GPIO_PIN)
86 gpio_instruct.func = ES_I2C1_SCL_GPIO_FUNC;
87 ald_gpio_init(ES_I2C1_SCL_GPIO_PORT, ES_I2C1_SCL_GPIO_PIN, &gpio_instruct);
88 #endif
89
90 #if defined(ES_I2C1_SDA_GPIO_FUNC)&&defined(ES_I2C1_SDA_GPIO_PORT)&&defined(ES_I2C1_SDA_GPIO_PIN)
91 gpio_instruct.func = ES_I2C1_SDA_GPIO_FUNC;
92 ald_gpio_init(ES_I2C1_SDA_GPIO_PORT, ES_I2C1_SDA_GPIO_PIN, &gpio_instruct);
93 #endif
94
95 /* Initialize i2c function */
96 _h_i2c1.perh = I2C1;
97 _h_i2c1.init.module = I2C_MODULE_MASTER;
98 _h_i2c1.init.clk_speed = ES_I2C1_CLK_SPEED;
99 _h_i2c1.init.own_addr1 = ES_I2C1_OWN_ADDR1;
100 _h_i2c1.init.addr_mode = ES_I2C1_ADDR_MODE;
101 _h_i2c1.init.general_call = ES_I2C1_GENERAL_CALL;
102 _h_i2c1.init.no_stretch = ES_I2C1_STRETCH;
103
104 ald_i2c_reset(&_h_i2c1);
105 ald_i2c_init(&_h_i2c1);
106
107 #endif
108 }
109 #define _I2C_NO_START 0x1
110 #define _I2C_NO_STOP 0x2
_i2c_master_req(ald_i2c_handle_t * hperh,uint16_t dev_addr,uint32_t timeout,uint32_t req_write)111 int _i2c_master_req(ald_i2c_handle_t *hperh, uint16_t dev_addr, uint32_t timeout,uint32_t req_write)
112 {
113 if (hperh->init.addr_mode == ALD_I2C_ADDR_7BIT) {
114 CLEAR_BIT(hperh->perh->CON2, I2C_CON2_ADD10_MSK);
115 }
116 else {
117 SET_BIT(hperh->perh->CON2, I2C_CON2_ADD10_MSK);
118 }
119
120 MODIFY_REG(hperh->perh->CON2, I2C_CON2_SADD_MSK, dev_addr << I2C_CON2_SADD_POSS);
121 if (req_write)
122 CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RD_WRN_MSK);
123 else
124 SET_BIT(hperh->perh->CON2, I2C_CON2_RD_WRN_MSK);
125
126 return ALD_OK;
127 }
_i2c_wait_flag(ald_i2c_handle_t * hperh,uint32_t flag,flag_status_t status,uint32_t timeout)128 int _i2c_wait_flag(ald_i2c_handle_t *hperh, uint32_t flag, flag_status_t status, uint32_t timeout)
129 {
130 uint32_t tickstart = 0;
131
132 tickstart = ald_get_tick();
133 while (ALD_I2C_GET_FLAG(hperh, flag) == status) {
134 if ((timeout == 0) || ((ald_get_tick() - tickstart ) > timeout)) {
135 hperh->error_code |= ALD_I2C_ERROR_TIMEOUT;
136 return TIMEOUT;
137 }
138 }
139
140 return ALD_OK;
141 }
_i2c_wait_txe(ald_i2c_handle_t * hperh,uint32_t timeout)142 int _i2c_wait_txe(ald_i2c_handle_t *hperh, uint32_t timeout)
143 {
144 uint32_t tickstart = ald_get_tick();
145
146 while (ALD_I2C_GET_FLAG(hperh, ALD_I2C_STAT_TXE) == RESET) {
147 if (ALD_I2C_GET_IT_FLAG(hperh, ALD_I2C_IT_ARLO)) {
148 hperh->error_code |= ALD_I2C_ERROR_ARLO;
149 return ALD_ERROR;
150 }
151
152 if (ALD_I2C_GET_IT_FLAG(hperh, ALD_I2C_IT_NACK) == SET) {
153 hperh->error_code |= ALD_I2C_ERROR_AF;
154 return ALD_ERROR;
155 }
156
157 if ((timeout == 0) || ((ald_get_tick() - tickstart) > timeout)) {
158 hperh->error_code |= ALD_I2C_ERROR_TIMEOUT;
159 return ALD_ERROR;
160 }
161 }
162
163 return ALD_OK;
164 }
_i2c_master_send(ald_i2c_handle_t * hperh,uint16_t dev_addr,uint8_t * buf,uint32_t size,uint32_t timeout,uint32_t flag)165 int _i2c_master_send(ald_i2c_handle_t *hperh, uint16_t dev_addr, uint8_t *buf,
166 uint32_t size, uint32_t timeout,uint32_t flag)
167 {
168 if (hperh->state != ALD_I2C_STATE_READY)
169 return ALD_BUSY;
170
171 if ((buf == NULL) || (size == 0))
172 return ALD_ERROR;
173 if ((flag&_I2C_NO_START)==0x0) //NOSTART==0
174 {
175 if (_i2c_wait_flag(hperh, ALD_I2C_STAT_BUSY, SET, 100) != ALD_OK)
176 return ALD_BUSY;
177 _i2c_master_req(hperh, dev_addr, timeout,1);
178 }
179 assert_param(IS_I2C_TYPE(hperh->perh));
180 __LOCK(hperh);
181
182 hperh->state = ALD_I2C_STATE_BUSY_TX;
183 hperh->mode = ALD_I2C_MODE_MASTER;
184 hperh->error_code = ALD_I2C_ERROR_NONE;
185 hperh->p_buff = buf;
186 hperh->xfer_size = size;
187 hperh->xfer_count = 0;
188
189 if ((flag&_I2C_NO_STOP)!=0) //NOSTOP==1
190 SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
191 else
192 CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
193
194 if (size <= 0xFF) {
195 MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
196 }
197 else {
198 MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, 0xFF << I2C_CON2_NBYTES_POSS);
199 SET_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
200 }
201
202 if ((flag&_I2C_NO_START)==0x0)
203 SET_BIT(hperh->perh->CON2, I2C_CON2_START_MSK);
204
205 while (size > 0) {
206 hperh->perh->TXDATA = (*buf++);
207 size--;
208 hperh->xfer_count++;
209
210 if (_i2c_wait_txe(hperh, timeout) != ALD_OK)
211 goto ERROR;
212
213 if (((hperh->xfer_count % 0xFF) == 0) && (READ_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK))) {
214 if (_i2c_wait_flag(hperh, ALD_I2C_STAT_TCR, RESET, 10) == ALD_OK) {
215 if (size > 0xFF) {
216 MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, 0xFF << I2C_CON2_NBYTES_POSS);
217 }
218 else {
219 MODIFY_REG(hperh->perh->CON2, I2C_CON2_NBYTES_MSK, size << I2C_CON2_NBYTES_POSS);
220 if ((flag&_I2C_NO_STOP)==0)
221 CLEAR_BIT(hperh->perh->CON2, I2C_CON2_RELOAD_MSK);
222 }
223 }
224 else {
225 goto ERROR;
226 }
227 }
228 }
229
230 if (READ_BIT(hperh->perh->CON2, I2C_CON2_AUTOEND_MSK) == SET)
231 goto SUCCESS;
232
233 if ((flag&_I2C_NO_STOP)!=0&&_i2c_wait_flag(hperh, ALD_I2C_STAT_TCR, RESET, 10) == ALD_OK)
234 {
235 goto SUCCESS;
236 }
237
238 if (_i2c_wait_flag(hperh, ALD_I2C_STAT_TC, RESET, 10) == ALD_OK) {
239 if ((flag&_I2C_NO_STOP)==0x0)
240 SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
241 goto SUCCESS;
242 }
243 else {
244 goto ERROR;
245 }
246
247 ERROR:
248 SET_BIT(hperh->perh->CON2, I2C_CON2_STOP_MSK);
249 hperh->state = ALD_I2C_STATE_READY;
250 hperh->mode = ALD_I2C_MODE_NONE;
251 __UNLOCK(hperh);
252
253 return ALD_ERROR;
254
255 SUCCESS:
256 hperh->state = ALD_I2C_STATE_READY;
257 hperh->mode = ALD_I2C_MODE_NONE;
258 __UNLOCK(hperh);
259
260 return ALD_OK;
261 }
262
es32f3_master_xfer(struct rt_i2c_bus_device * bus,struct rt_i2c_msg msgs[],rt_uint32_t num)263 static rt_size_t es32f3_master_xfer(struct rt_i2c_bus_device *bus,
264 struct rt_i2c_msg msgs[],
265 rt_uint32_t num)
266 {
267 struct rt_i2c_msg *msg;
268 rt_uint32_t i;
269 rt_err_t ret = RT_ERROR;
270
271 for (i = 0; i < num; i++)
272 {
273 msg = &msgs[i];
274 if (msg->flags & RT_I2C_RD)
275 {
276 if (ald_i2c_master_recv(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT) != 0)
277 {
278 LOG_E("i2c bus write failed,i2c bus stop!\n");
279 goto out;
280 }
281 }
282 else
283 {
284 uint32_t f=((msg->flags&RT_I2C_NO_START)?0x1:0)|((msg->flags&RT_I2C_NO_STOP)?0x2:0);
285
286 if (_i2c_master_send(bus->priv, msg->addr << 1, msg->buf, msg->len, TIMEOUT,f) != 0)
287 {
288 LOG_E("i2c bus write failed,i2c bus stop!\n");
289 goto out;
290 }
291 }
292 }
293
294 ret = i;
295
296 out:
297 //LOG_E("send stop condition\n");
298
299 return ret;
300 }
301
302 const struct rt_i2c_bus_device_ops es32f3_i2c_ops =
303 {
304 es32f3_master_xfer,
305 RT_NULL,
306 RT_NULL,
307 };
308
rt_hw_i2c_init(void)309 int rt_hw_i2c_init(void)
310 {
311 int result = RT_EOK;
312
313 _i2c_init();
314
315 #ifdef BSP_USING_I2C0
316 /* define i2c Instance */
317 static struct rt_i2c_bus_device _i2c_device0;
318 rt_memset((void *)&_i2c_device0, 0, sizeof(struct rt_i2c_bus_device));
319
320 _i2c_device0.ops = &es32f3_i2c_ops;
321 _i2c_device0.priv = &_h_i2c0;
322 result = rt_i2c_bus_device_register(&_i2c_device0, ES_DEVICE_NAME_I2C0);
323 if (result != RT_EOK)
324 {
325 return result;
326 }
327 #endif
328
329 #ifdef BSP_USING_I2C1
330 /* define i2c Instance */
331 static struct rt_i2c_bus_device _i2c_device1;
332 rt_memset((void *)&_i2c_device1, 0, sizeof(struct rt_i2c_bus_device));
333
334 _i2c_device1.ops = &es32f3_i2c_ops;
335 _i2c_device1.priv = &_h_i2c1;
336 rt_i2c_bus_device_register(&_i2c_device1, ES_DEVICE_NAME_I2C1);
337 if (result != RT_EOK)
338 {
339 return result;
340 }
341 #endif
342
343 return RT_EOK;
344 }
345 INIT_DEVICE_EXPORT(rt_hw_i2c_init);
346
347 #endif
348