1 /*
2 * Copyright (C) 2022 Shanghai Eastsoft Microelectronics Co., Ltd.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 *
18 * Change Logs:
19 * Date Author Notes
20 * 2023-02-11 liuhy the first version
21 */
22
23 #include "drv_uart.h"
24
25 #ifdef RT_USING_SERIAL
26
27 #define UART_DMA_BUF_SECTIONS 4
28
29 /*
30 * To use UART DMA,
31 * 1. select 'DMA->DMA0'
32 * 2. select 'UART->UARTx->DMATX(or DMARX)'
33 * 3. add RT_DEVICE_FLAG_DMA_TX(or RT_DEVICE_FLAG_DMA_RX) flag when open serial device
34 */
35 #ifdef BSP_EUART0_TX_USING_DMA
36 #define EUART0_DMATX_CHANNEL ES_EUART0_DMATX_CHANNEL
37 #define EUART0_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX
38 #else
39 #define EUART0_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL
40 #define EUART0_DMATX_FLAG 0
41 #endif
42
43 #ifdef BSP_EUART0_RX_USING_DMA
44 #define EUART0_DMARX_CHANNEL ES_EUART0_DMARX_CHANNEL
45 #define EUART0_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX
46 #else
47 #define EUART0_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL
48 #define EUART0_DMARX_FLAG 0
49 #endif
50
51 #ifdef BSP_EUART1_TX_USING_DMA
52 #define EUART1_DMATX_CHANNEL ES_EUART1_DMATX_CHANNEL
53 #define EUART1_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX
54 #else
55 #define EUART1_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL
56 #define EUART1_DMATX_FLAG 0
57 #endif
58
59 #ifdef BSP_EUART1_RX_USING_DMA
60 #define EUART1_DMARX_CHANNEL ES_EUART1_DMARX_CHANNEL
61 #define EUART1_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX
62 #else
63 #define EUART1_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL
64 #define EUART1_DMARX_FLAG 0
65 #endif
66
67 #ifdef BSP_CUART0_TX_USING_DMA
68 #define CUART0_DMATX_CHANNEL ES_CUART0_DMATX_CHANNEL
69 #define CUART0_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX
70 #else
71 #define CUART0_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL
72 #define CUART0_DMATX_FLAG 0
73 #endif
74
75 #ifdef BSP_CUART0_RX_USING_DMA
76 #define CUART0_DMARX_CHANNEL ES_CUART0_DMARX_CHANNEL
77 #define CUART0_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX
78 #else
79 #define CUART0_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL
80 #define CUART0_DMARX_FLAG 0
81 #endif
82
83 #ifdef BSP_CUART1_TX_USING_DMA
84 #define CUART1_DMATX_CHANNEL ES_CUART1_DMATX_CHANNEL
85 #define CUART1_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX
86 #else
87 #define CUART1_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL
88 #define CUART1_DMATX_FLAG 0
89 #endif
90
91 #ifdef BSP_CUART1_RX_USING_DMA
92 #define CUART1_DMARX_CHANNEL ES_CUART1_DMARX_CHANNEL
93 #define CUART1_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX
94 #else
95 #define CUART1_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL
96 #define CUART1_DMARX_FLAG 0
97 #endif
98
99 #ifdef BSP_CUART2_TX_USING_DMA
100 #define CUART2_DMATX_CHANNEL ES_CUART2_DMATX_CHANNEL
101 #define CUART2_DMATX_FLAG RT_DEVICE_FLAG_DMA_TX
102 #else
103 #define CUART2_DMATX_CHANNEL ES_DMA_INVAILD_CHANNEL
104 #define CUART2_DMATX_FLAG 0
105 #endif
106
107 #ifdef BSP_CUART2_RX_USING_DMA
108 #define CUART2_DMARX_CHANNEL ES_CUART2_DMARX_CHANNEL
109 #define CUART2_DMARX_FLAG RT_DEVICE_FLAG_DMA_RX
110 #else
111 #define CUART2_DMARX_CHANNEL ES_DMA_INVAILD_CHANNEL
112 #define CUART2_DMARX_FLAG 0
113 #endif
114
115 #define UART_INVAILD_DMA_CHANNEL (ES_DMA_INVAILD_CHANNEL)
116
117 /* es32 uart driver */
118 struct es32_uart
119 {
120 ald_uart_handle_t huart;
121 struct rt_serial_device *serial;
122 IRQn_Type irq;
123 #ifdef RT_SERIAL_USING_DMA
124 uint16_t dma_tx_channel;
125 uint16_t dma_rx_channel;
126
127 uint32_t last_rx_count;
128 uint32_t buf_select;
129 #endif /* RT_SERIAL_USING_DMA */
130 };
131
132 #ifdef RT_SERIAL_USING_DMA
133 static void _dma_recv_timeout(struct es32_uart *uart, uint32_t dma_end);
134 #endif /* RT_SERIAL_USING_DMA */
135
uart_int_handler(struct es32_uart * uart)136 static void uart_int_handler(struct es32_uart*uart)
137 {
138 if ((ald_uart_get_mask_flag_status(&uart->huart, ALD_UART_IF_RFNEMPTY)) != RESET)
139 {
140 rt_hw_serial_isr(uart->serial, RT_SERIAL_EVENT_RX_IND);
141 ald_uart_clear_flag_status(&uart->huart, ALD_UART_IF_RFNEMPTY);
142 }
143 #ifdef RT_SERIAL_USING_DMA
144 if ((ald_uart_get_mask_flag_status(&uart->huart, ALD_UART_IF_RXTO)) != RESET)
145 {
146 ald_uart_clear_flag_status(&uart->huart, ALD_UART_IF_RXTO);
147 _dma_recv_timeout(uart, 0);
148 }
149
150 if ((ald_uart_get_mask_flag_status(&uart->huart, ALD_UART_IF_TBC)) != RESET)
151 {
152 uint32_t cnt = 1000;
153 ald_uart_clear_flag_status(&uart->huart, ALD_UART_IF_TBC);
154 ald_uart_interrupt_config(&uart->huart, ALD_UART_IT_TBC, DISABLE);
155 CLEAR_BIT(uart->huart.state, ALD_UART_STATE_TX_MASK);
156
157 while ((uart->huart.perh->STAT & ALD_UART_STATUS_TSBUSY) && (cnt--));
158
159 ald_uart_clear_flag_status(&uart->huart, ALD_UART_IF_TBC);
160
161 if (uart->huart.tx_cplt_cbk)
162 uart->huart.tx_cplt_cbk(&uart->huart);
163 }
164 #endif /* RT_SERIAL_USING_DMA */
165 }
166
167
168 #ifdef BSP_USING_EUART0
169
170 struct rt_serial_device serial0;
171 /* EUART0 device driver structure */
172 struct es32_uart uart0 =
173 {
174 {EUART0},
175 &serial0,
176 EUART0_IRQn,
177 #ifdef RT_SERIAL_USING_DMA
178 EUART0_DMATX_CHANNEL,
179 EUART0_DMARX_CHANNEL
180 #endif /* RT_SERIAL_USING_DMA */
181 };
EUART0_Handler(void)182 void __attribute__((interrupt)) EUART0_Handler(void)
183 {
184 /* enter interrupt */
185 rt_interrupt_enter();
186 uart_int_handler(&uart0);
187 /* leave interrupt */
188 rt_interrupt_leave();
189 }
190 #endif /* BSP_USING_EUART0 */
191
192 #ifdef BSP_USING_EUART1
193
194 struct rt_serial_device serial1;
195 /* EUART1 device driver structure */
196 struct es32_uart uart1 =
197 {
198 {EUART1},
199 &serial1,
200 EUART1_IRQn,
201 #ifdef RT_SERIAL_USING_DMA
202 EUART1_DMATX_CHANNEL,
203 EUART1_DMARX_CHANNEL
204 #endif /* RT_SERIAL_USING_DMA */
205 };
206
EUART1_Handler(void)207 void __attribute__((interrupt)) EUART1_Handler(void)
208 {
209 /* enter interrupt */
210 rt_interrupt_enter();
211 uart_int_handler(&uart1);
212 /* leave interrupt */
213 rt_interrupt_leave();
214 }
215 #endif /* BSP_USING_EUART1 */
216
217 #ifdef BSP_USING_CUART0
218
219 struct rt_serial_device serial2;
220 /* CUART0 device driver structure */
221 struct es32_uart uart2 =
222 {
223 {CUART0},
224 &serial2,
225 CUART0_IRQn,
226 #ifdef RT_SERIAL_USING_DMA
227 CUART0_DMATX_CHANNEL,
228 CUART0_DMARX_CHANNEL
229 #endif /* RT_SERIAL_USING_DMA */
230 };
231
CUART0_Handler(void)232 void __attribute__((interrupt)) CUART0_Handler(void)
233 {
234 /* enter interrupt */
235 rt_interrupt_enter();
236 uart_int_handler(&uart2);
237 /* leave interrupt */
238 rt_interrupt_leave();
239 }
240 #endif /* BSP_USING_CUART0 */
241
242 #ifdef BSP_USING_CUART1
243
244 struct rt_serial_device serial3;
245 /* CUART1 device driver structure */
246 struct es32_uart uart3 =
247 {
248 {CUART1},
249 &serial3,
250 CUART1_IRQn,
251 #ifdef RT_SERIAL_USING_DMA
252 CUART1_DMATX_CHANNEL,
253 CUART1_DMARX_CHANNEL
254 #endif /* RT_SERIAL_USING_DMA */
255 };
256
CUART1_Handler(void)257 void __attribute__((interrupt)) CUART1_Handler(void)
258 {
259 /* enter interrupt */
260 rt_interrupt_enter();
261 uart_int_handler(&uart3);
262 /* leave interrupt */
263 rt_interrupt_leave();
264 }
265 #endif /* BSP_USING_CUART1 */
266
267 #ifdef BSP_USING_CUART2
268
269 struct rt_serial_device serial4;
270 /* CUART2 device driver structure */
271 struct es32_uart uart4 =
272 {
273 {CUART2},
274 &serial4,
275 CUART2_IRQn,
276 #ifdef RT_SERIAL_USING_DMA
277 CUART2_DMATX_CHANNEL,
278 CUART2_DMARX_CHANNEL
279 #endif /* RT_SERIAL_USING_DMA */
280 };
281
CUART2_Handler(void)282 void __attribute__((interrupt)) CUART2_Handler(void)
283 {
284 /* enter interrupt */
285 rt_interrupt_enter();
286 uart_int_handler(&uart4);
287 /* leave interrupt */
288 rt_interrupt_leave();
289 }
290 #endif /* BSP_USING_CUART2 */
291
es32f3x_configure(struct rt_serial_device * serial,struct serial_configure * cfg)292 static rt_err_t es32f3x_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
293 {
294 ald_gpio_init_t gpio_initstructure;
295 struct es32_uart *uart;
296 RT_ASSERT(serial != RT_NULL);
297 RT_ASSERT(cfg != RT_NULL);
298 uart = (struct es32_uart *)serial->parent.user_data;
299
300 /* Initialize tx pin */
301 gpio_initstructure.mode = ALD_GPIO_MODE_OUTPUT;
302 gpio_initstructure.od = ALD_GPIO_PUSH_PULL;
303 gpio_initstructure.pupd = ALD_GPIO_PUSH_UP;
304 gpio_initstructure.odrv = ALD_GPIO_OUT_DRIVE_NORMAL;
305 gpio_initstructure.flt = ALD_GPIO_FILTER_DISABLE;
306 gpio_initstructure.type = ALD_GPIO_TYPE_CMOS;
307
308 #ifdef BSP_USING_EUART0
309
310 if (uart == (&uart0))
311 {
312 #if defined(ES_EUART0_TX_GPIO_FUNC)&&defined(ES_EUART0_TX_GPIO_PORT)&&defined(ES_EUART0_TX_GPIO_PIN)
313 gpio_initstructure.func = ES_EUART0_TX_GPIO_FUNC;
314 ald_gpio_init(ES_EUART0_TX_GPIO_PORT, ES_EUART0_TX_GPIO_PIN, &gpio_initstructure);
315 #endif
316
317 #if defined(ES_EUART0_RX_GPIO_FUNC)&&defined(ES_EUART0_RX_GPIO_PORT)&&defined(ES_EUART0_RX_GPIO_PIN)
318 /* Initialize rx pin ,the same as txpin except mode */
319 gpio_initstructure.mode = ALD_GPIO_MODE_INPUT;
320 gpio_initstructure.func = ES_EUART0_RX_GPIO_FUNC;
321 ald_gpio_init(ES_EUART0_RX_GPIO_PORT, ES_EUART0_RX_GPIO_PIN, &gpio_initstructure);
322 #endif
323 }
324
325 #endif /* uart0 gpio init */
326
327 #ifdef BSP_USING_EUART1
328
329 if (uart == (&uart1))
330 {
331 #if defined(ES_EUART1_TX_GPIO_FUNC)&&defined(ES_EUART1_TX_GPIO_PORT)&&defined(ES_EUART1_TX_GPIO_PIN)
332 gpio_initstructure.func = ES_EUART1_TX_GPIO_FUNC;
333 ald_gpio_init(ES_EUART1_TX_GPIO_PORT, ES_EUART1_TX_GPIO_PIN, &gpio_initstructure);
334 #endif
335
336 #if defined(ES_EUART1_RX_GPIO_FUNC)&&defined(ES_EUART1_RX_GPIO_PORT)&&defined(ES_EUART1_RX_GPIO_PIN)
337 /* Initialize rx pin ,the same as txpin except mode */
338 gpio_initstructure.mode = ALD_GPIO_MODE_INPUT;
339 gpio_initstructure.func = ES_EUART1_RX_GPIO_FUNC;
340 ald_gpio_init(ES_EUART1_RX_GPIO_PORT, ES_EUART1_RX_GPIO_PIN, &gpio_initstructure);
341 #endif
342 }
343
344 #endif /* uart1 gpio init */
345
346 #ifdef BSP_USING_CUART0
347
348 if (uart == (&uart2))
349 {
350 #if defined(ES_CUART0_TX_GPIO_FUNC)&&defined(ES_CUART0_TX_GPIO_PORT)&&defined(ES_CUART0_TX_GPIO_PIN)
351 gpio_initstructure.func = ES_CUART0_TX_GPIO_FUNC;
352 ald_gpio_init(ES_CUART0_TX_GPIO_PORT, ES_CUART0_TX_GPIO_PIN, &gpio_initstructure);
353 #endif
354
355 #if defined(ES_CUART0_RX_GPIO_FUNC)&&defined(ES_CUART0_RX_GPIO_PORT)&&defined(ES_CUART0_RX_GPIO_PIN)
356 /* Initialize rx pin ,the same as txpin except mode */
357 gpio_initstructure.mode = ALD_GPIO_MODE_INPUT;
358 gpio_initstructure.func = ES_CUART0_RX_GPIO_FUNC;
359 ald_gpio_init(ES_CUART0_RX_GPIO_PORT, ES_CUART0_RX_GPIO_PIN, &gpio_initstructure);
360 #endif
361 }
362
363 #endif /* uart2 gpio init */
364
365 #ifdef BSP_USING_CUART1
366
367 if (uart == (&uart3))
368 {
369 #if defined(ES_CUART1_TX_GPIO_FUNC)&&defined(ES_CUART1_TX_GPIO_PORT)&&defined(ES_CUART1_TX_GPIO_PIN)
370 gpio_initstructure.func = ES_CUART1_TX_GPIO_FUNC;
371 ald_gpio_init(ES_CUART1_TX_GPIO_PORT, ES_CUART1_TX_GPIO_PIN, &gpio_initstructure);
372 #endif
373
374 #if defined(ES_CUART1_RX_GPIO_FUNC)&&defined(ES_CUART1_RX_GPIO_PORT)&&defined(ES_CUART1_RX_GPIO_PIN)
375 /* Initialize rx pin ,the same as txpin except mode */
376 gpio_initstructure.mode = ALD_GPIO_MODE_INPUT;
377 gpio_initstructure.func = ES_CUART1_RX_GPIO_FUNC;
378 ald_gpio_init(ES_CUART1_RX_GPIO_PORT, ES_CUART1_RX_GPIO_PIN, &gpio_initstructure);
379 #endif
380 }
381
382 #endif /* uart3 gpio init */
383
384 #ifdef BSP_USING_CUART2
385
386 if (uart == (&uart4))
387 {
388 #if defined(ES_CUART2_TX_GPIO_FUNC)&&defined(ES_CUART2_TX_GPIO_PORT)&&defined(ES_CUART2_TX_GPIO_PIN)
389 gpio_initstructure.func = ES_CUART2_TX_GPIO_FUNC;
390 ald_gpio_init(ES_CUART2_TX_GPIO_PORT, ES_CUART2_TX_GPIO_PIN, &gpio_initstructure);
391 #endif
392
393 #if defined(ES_CUART2_RX_GPIO_FUNC)&&defined(ES_CUART2_RX_GPIO_PORT)&&defined(ES_CUART2_RX_GPIO_PIN)
394 /* Initialize rx pin ,the same as txpin except mode */
395 gpio_initstructure.mode = ALD_GPIO_MODE_INPUT;
396 gpio_initstructure.func = ES_CUART2_RX_GPIO_FUNC;
397 ald_gpio_init(ES_CUART2_RX_GPIO_PORT, ES_CUART2_RX_GPIO_PIN, &gpio_initstructure);
398 #endif
399 }
400
401 #endif /* uart4 gpio init */
402
403 uart->huart.init.mode = ALD_UART_MODE_UART;
404 uart->huart.init.baud = cfg->baud_rate;
405 uart->huart.init.word_length = (ald_uart_word_length_t)(8 - cfg->data_bits);
406 uart->huart.init.parity = (ald_uart_parity_t)(cfg->parity == PARITY_EVEN ? ALD_UART_PARITY_EVEN : cfg->parity);
407 uart->huart.init.fctl = ALD_UART_HW_FLOW_CTL_DISABLE;
408 uart->huart.init.stop_bits = ALD_UART_STOP_BITS_1;
409 ald_uart_init(&uart->huart);
410
411 if (cfg->bit_order == BIT_ORDER_MSB)
412 {
413 ALD_UART_MSB_FIRST_ENABLE(&uart->huart);
414 }
415 else
416 {
417 ALD_UART_MSB_FIRST_DISABLE(&uart->huart);
418 }
419
420 if (cfg->invert == NRZ_INVERTED)
421 {
422 ALD_UART_DATA_INV_ENABLE(&uart->huart);
423 }
424 else
425 {
426 ALD_UART_DATA_INV_DISABLE(&uart->huart);
427 }
428
429 return RT_EOK;
430 }
431
432
433
434 #ifdef RT_SERIAL_USING_DMA
435
_dma_recv_timeout(struct es32_uart * uart,uint32_t dma_end)436 static void _dma_recv_timeout(struct es32_uart *uart, uint32_t dma_end)
437 {
438 ald_dma_config_t *dma_cfg;
439 uint32_t rx_count_total;
440 uint32_t rx_count;
441 uint16_t dma_remain_transfer_num;
442
443 if (dma_end)
444 {
445 rx_count = dma_end - uart->last_rx_count;
446 uart->last_rx_count = 0;
447 }
448 else
449 {
450 dma_cfg = &uart->huart.hdmarx.config;
451 dma_remain_transfer_num = (uint16_t)((DMA->CHANNEL[dma_cfg->channel].NDT) >> 16);
452 rx_count_total = (dma_cfg->size) - dma_remain_transfer_num;
453
454 if (rx_count_total)
455 rx_count = rx_count_total - uart->last_rx_count;
456 else
457 return;
458
459 uart->last_rx_count = rx_count_total;
460 }
461
462 rt_hw_serial_isr(uart->serial, RT_SERIAL_EVENT_RX_DMADONE | (rx_count << 8));
463
464 }
465
466 /**
467 * DMA TX complete callback
468 */
_uart_tx_dma_cplt(ald_uart_handle_t * arg)469 static void _uart_tx_dma_cplt(ald_uart_handle_t *arg)
470 {
471 struct es32_uart *uart;
472 uart = rt_container_of(arg, struct es32_uart, huart);
473 rt_hw_serial_isr(uart->serial, RT_SERIAL_EVENT_TX_DMADONE);
474 }
475 /**
476 * DMA RX complete callback
477 */
_uart_rx_dma_cplt(ald_uart_handle_t * arg)478 static void _uart_rx_dma_cplt(ald_uart_handle_t *arg)
479 {
480 struct es32_uart *uart;
481 uart = rt_container_of(arg, struct es32_uart, huart);
482
483 if (uart->buf_select == UART_DMA_BUF_SECTIONS - 1)
484 {
485 arg->hdmarx.config.dst = (uint8_t *)arg->hdmarx.config.dst - arg->hdmarx.config.size * (UART_DMA_BUF_SECTIONS - 1);
486 uart->buf_select = 0;
487 }
488 else
489 {
490 arg->hdmarx.config.dst = (uint8_t *)arg->hdmarx.config.dst + arg->hdmarx.config.size;
491 uart->buf_select += 1;
492 }
493
494 ald_dma_config_basic(&(arg->hdmarx));
495 ald_uart_dma_req_config(arg, ALD_UART_DMA_REQ_RX, ENABLE);
496 _dma_recv_timeout(uart, arg->hdmarx.config.size);
497 }
498 /**
499 * Setup DMA
500 */
es32f3x_dma_config(struct rt_serial_device * serial,rt_ubase_t flag)501 static rt_err_t es32f3x_dma_config(struct rt_serial_device *serial, rt_ubase_t flag)
502 {
503 struct es32_uart *uart;
504 struct rt_serial_rx_fifo *rx_fifo;
505 extern ald_dma_call_back_t dma_cbk[];
506
507 RT_ASSERT(serial != RT_NULL);
508 uart = (struct es32_uart *)serial->parent.user_data;
509 rx_fifo = (struct rt_serial_rx_fifo *)serial->serial_rx;
510
511 if (serial->config.bufsz > 0xFFFF)
512 return -RT_ERROR;
513
514 if (RT_DEVICE_FLAG_DMA_RX == flag)
515 {
516 if (uart->dma_rx_channel >= UART_INVAILD_DMA_CHANNEL)
517 return -ALD_ERROR;
518
519 uart->huart.rx_cplt_cbk = _uart_rx_dma_cplt;
520 //dma_cbk[uart->dma_rx_channel].cplt_tc_cbk = _uart_rx_dma_cplt;
521
522 ALD_UART_SET_TIMEOUT_VALUE(&uart->huart, 0xFF);
523 ALD_UART_RX_TIMEOUT_ENABLE(&uart->huart);
524 ald_uart_interrupt_config(&uart->huart, ALD_UART_IT_RFNEMPTY, DISABLE);
525 ald_uart_interrupt_config(&uart->huart, ALD_UART_IT_RXTO, ENABLE);
526 uart->last_rx_count = 0;
527
528 if (serial->config.bufsz > 0)
529 {
530 ald_uart_recv_by_dma(&uart->huart, rx_fifo->buffer, serial->config.bufsz / UART_DMA_BUF_SECTIONS, uart->dma_rx_channel);;
531 }
532 }
533 else if (RT_DEVICE_FLAG_DMA_TX == flag)
534 {
535 if (uart->dma_tx_channel >= UART_INVAILD_DMA_CHANNEL)
536 return -ALD_ERROR;
537
538 uart->huart.tx_cplt_cbk = _uart_tx_dma_cplt;
539 dma_cbk[uart->dma_tx_channel].cplt_tc_cbk = _uart_tx_dma_cplt;
540 }
541
542 uart->huart.err_code = ALD_UART_ERROR_NONE;
543
544 csi_vic_enable_sirq(uart->irq);
545
546 return RT_EOK;
547 }
548 #endif /* RT_SERIAL_USING_DMA */
549
es32f3x_control(struct rt_serial_device * serial,int cmd,void * arg)550 static rt_err_t es32f3x_control(struct rt_serial_device *serial, int cmd, void *arg)
551 {
552 struct es32_uart *uart;
553 #ifdef RT_SERIAL_USING_DMA
554 rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
555 #endif
556
557 RT_ASSERT(serial != RT_NULL);
558
559 uart = (struct es32_uart *)serial->parent.user_data;
560
561 switch (cmd)
562 {
563 case RT_DEVICE_CTRL_CLR_INT:
564 /* disable rx irq */
565 csi_vic_disable_sirq(uart->irq);
566 /* disable interrupt */
567 ald_uart_interrupt_config(&uart->huart, ALD_UART_IT_RFNEMPTY, DISABLE);
568 #ifdef RT_SERIAL_USING_DMA
569
570 /* disable DMA */
571 if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX)
572 {
573 ald_uart_dma_req_config(&uart->huart, ALD_UART_DMA_REQ_RX, DISABLE);
574 }
575 else if (ctrl_arg == RT_DEVICE_FLAG_DMA_TX)
576 {
577 ald_uart_dma_req_config(&uart->huart, ALD_UART_DMA_REQ_TX, DISABLE);
578 }
579
580 #endif
581 break;
582
583 case RT_DEVICE_CTRL_SET_INT:
584 /* enable rx irq */
585 csi_vic_enable_sirq(uart->irq);
586 /* enable interrupt */
587 ald_uart_interrupt_config(&uart->huart, ALD_UART_IT_RFNEMPTY, ENABLE);
588 break;
589 #ifdef RT_SERIAL_USING_DMA
590
591 case RT_DEVICE_CTRL_CONFIG:
592 /* Setup DMA */
593 es32f3x_dma_config(serial, ctrl_arg);
594 break;
595 #endif
596
597 case RT_DEVICE_CTRL_CLOSE:
598 while (ald_uart_get_status(&uart->huart, (ALD_UART_STATUS_TSBUSY)));
599
600 #ifdef RT_SERIAL_USING_DMA
601 uart->huart.rx_cplt_cbk = NULL;
602 uart->huart.tx_cplt_cbk = NULL;
603 /* disable DMA */
604 ald_uart_dma_stop(&uart->huart);
605 #endif
606 ald_uart_reset(&uart->huart);
607 break;
608 }
609
610 return RT_EOK;
611 }
612
es32f3x_putc(struct rt_serial_device * serial,char c)613 static int es32f3x_putc(struct rt_serial_device *serial, char c)
614 {
615 struct es32_uart *uart;
616 RT_ASSERT(serial != RT_NULL);
617 uart = (struct es32_uart *)serial->parent.user_data;
618
619 while (ald_uart_get_status(&uart->huart, ALD_UART_STATUS_TFEMPTY) == RESET)
620 ;
621
622 WRITE_REG(uart->huart.perh->TXBUF, c);
623
624 return 1;
625 }
626
es32f3x_getc(struct rt_serial_device * serial)627 static int es32f3x_getc(struct rt_serial_device *serial)
628 {
629 int ch = -1;
630 struct es32_uart *uart;
631
632 RT_ASSERT(serial != RT_NULL);
633 uart = (struct es32_uart *)serial->parent.user_data;
634
635 if (ald_uart_get_status(&uart->huart, ALD_UART_STATUS_RFNEMPTY))
636 {
637 ch = (uint8_t)(uart->huart.perh->RXBUF & 0xFF);
638 }
639
640 return ch;
641 }
642
643 #ifdef RT_SERIAL_USING_DMA
644
645 /**
646 * DMA transmit
647 */
es32f3x_dma_transmit(struct rt_serial_device * serial,rt_uint8_t * buf,rt_size_t size,int direction)648 static rt_ssize_t es32f3x_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
649 {
650 struct es32_uart *uart;
651
652 RT_ASSERT(serial != RT_NULL);
653 uart = (struct es32_uart *)serial->parent.user_data;
654
655 if (direction == RT_SERIAL_DMA_TX)
656 {
657 if (uart->dma_tx_channel >= UART_INVAILD_DMA_CHANNEL)
658 return 0;
659
660 if (ALD_OK == ald_uart_send_by_dma(&uart->huart, buf, size, uart->dma_tx_channel))
661 {
662 return size;
663 }
664 else
665 {
666 return 0;
667 }
668 }
669 else if (direction == RT_SERIAL_DMA_RX)
670 {
671
672 if (uart->dma_rx_channel >= UART_INVAILD_DMA_CHANNEL)
673 return 0;
674
675 if (ALD_OK == ald_uart_recv_by_dma(&uart->huart, buf, size, uart->dma_rx_channel))
676 {
677 return size;
678 }
679 else
680 {
681 return 0;
682 }
683
684 }
685
686 return 0;
687 }
688 #endif
689 static const struct rt_uart_ops es32f3x_uart_ops =
690 {
691 es32f3x_configure,
692 es32f3x_control,
693 es32f3x_putc,
694 es32f3x_getc,
695 #ifdef RT_SERIAL_USING_DMA
696 es32f3x_dma_transmit
697 #else
698 NULL
699 #endif
700 };
701
rt_hw_uart_init(void)702 int rt_hw_uart_init(void)
703 {
704 struct es32_uart *uart;
705
706 #ifdef BSP_USING_EUART0
707 uart = &uart0;
708 serial0.ops = &es32f3x_uart_ops;
709 serial0.config = (struct serial_configure)ES_EUART0_CONFIG;
710
711 /* register EUART0 device */
712 rt_hw_serial_register(&serial0, ES_DEVICE_NAME_EUART0,
713 RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
714 EUART0_DMATX_FLAG | EUART0_DMARX_FLAG,
715 uart);
716 #endif /* BSP_USING_EUART0 */
717
718 #ifdef BSP_USING_EUART1
719 uart = &uart1;
720 serial1.ops = &es32f3x_uart_ops;
721 serial1.config = (struct serial_configure)ES_EUART1_CONFIG;
722
723 /* register EUART1 device */
724 rt_hw_serial_register(&serial1, ES_DEVICE_NAME_EUART1,
725 RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
726 EUART1_DMATX_FLAG | EUART1_DMARX_FLAG,
727 uart);
728 #endif /* BSP_USING_EUART1 */
729
730 #ifdef BSP_USING_CUART0
731 uart = &uart2;
732 serial2.ops = &es32f3x_uart_ops;
733 serial2.config = (struct serial_configure)ES_CUART0_CONFIG;
734
735 /* register CUART0 device */
736 rt_hw_serial_register(&serial2, ES_DEVICE_NAME_CUART0,
737 RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
738 CUART0_DMATX_FLAG | CUART0_DMARX_FLAG,
739 uart);
740 #endif /* BSP_USING_CUART0 */
741
742 #ifdef BSP_USING_CUART1
743 uart = &uart3;
744 serial3.ops = &es32f3x_uart_ops;
745 serial3.config = (struct serial_configure)ES_CUART1_CONFIG;
746
747 /* register CUART1 device */
748 rt_hw_serial_register(&serial3, ES_DEVICE_NAME_CUART1,
749 RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
750 CUART1_DMATX_FLAG | CUART1_DMARX_FLAG,
751 uart);
752 #endif /* BSP_USING_CUART1 */
753
754 #ifdef BSP_USING_CUART2
755 uart = &uart4;
756 serial4.ops = &es32f3x_uart_ops;
757 serial4.config = (struct serial_configure)ES_CUART2_CONFIG;
758
759 /* register CUART2 device */
760 rt_hw_serial_register(&serial4, ES_DEVICE_NAME_CUART2,
761 RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX |
762 CUART2_DMATX_FLAG | CUART2_DMARX_FLAG,
763 uart);
764 #endif /* BSP_USING_CUART2 */
765
766 return 0;
767 }
768 INIT_BOARD_EXPORT(rt_hw_uart_init);
769
770 #endif
771