1 /** 2 ********************************************************************************* 3 * 4 * @file ald_rmu.h 5 * @brief Header file of RMU module driver. 6 * 7 * @version V1.0 8 * @date 09 Mar. 2023 9 * @author AE Team 10 * @note 11 * Change Logs: 12 * Date Author Notes 13 * 09 Mar. 2023 Lisq The first version 14 * 15 * Copyright (C) Shanghai Eastsoft Microelectronics Co. Ltd. All rights reserved. 16 * 17 * SPDX-License-Identifier: Apache-2.0 18 * 19 * Licensed under the Apache License, Version 2.0 (the License); you may 20 * not use this file except in compliance with the License. 21 * You may obtain a copy of the License at 22 * 23 * www.apache.org/licenses/LICENSE-2.0 24 * 25 * Unless required by applicable law or agreed to in writing, software 26 * distributed under the License is distributed on an AS IS BASIS, WITHOUT 27 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 28 * See the License for the specific language governing permissions and 29 * limitations under the License. 30 ********************************************************************************** 31 */ 32 33 #ifndef __ALD_RMU_H__ 34 #define __ALD_RMU_H__ 35 36 #ifdef __cplusplus 37 extern "C" { 38 #endif /* __cplusplus */ 39 40 #include "ald_utils.h" 41 42 /** @addtogroup ES32VF2264_ALD 43 * @{ 44 */ 45 46 /** @addtogroup RMU 47 * @{ 48 */ 49 50 /** @defgroup RMU_Public_Types RMU Public Types 51 * @{ 52 */ 53 /** 54 * @brief RMU BOR fliter 55 */ 56 typedef enum { 57 ALD_RMU_BORFLT_1 = 0x1U, /**< 1 cycle */ 58 ALD_RMU_BORFLT_2 = 0x2U, /**< 2 cycles */ 59 ALD_RMU_BORFLT_3 = 0x3U, /**< 3 cycles */ 60 ALD_RMU_BORFLT_4 = 0x4U, /**< 4 cycles */ 61 ALD_RMU_BORFLT_5 = 0x5U, /**< 5 cycles */ 62 ALD_RMU_BORFLT_6 = 0x6U, /**< 6 cycles */ 63 ALD_RMU_BORFLT_7 = 0x7U, /**< 7 cycles */ 64 } ald_rmu_bor_filter_t; 65 66 /** 67 * @brief RMU reset status 68 */ 69 typedef enum { 70 ALD_RMU_RST_POR = (1U << 0), /**< POR */ 71 ALD_RMU_RST_WAKEUP = (1U << 1), /**< WAKEUP */ 72 ALD_RMU_RST_BOR = (1U << 2), /**< BOR */ 73 ALD_RMU_RST_NMRST = (1U << 3), /**< NMRST */ 74 ALD_RMU_RST_IWDT = (1U << 4), /**< IWDT */ 75 ALD_RMU_RST_WWDT = (1U << 5), /**< WWDT */ 76 ALD_RMU_RST_LOCKUP = (1U << 6), /**< LOCKUP */ 77 ALD_RMU_RST_CHIP = (1U << 7), /**< CHIP */ 78 ALD_RMU_RST_MCU = (1U << 8), /**< MCU */ 79 ALD_RMU_RST_CPU = (1U << 9), /**< CPU */ 80 ALD_RMU_RST_CFG = (1U << 10), /**< CFG */ 81 ALD_RMU_RST_CFGERR = (1U << 16), /**< CFG Error */ 82 ALD_RMU_RST_ALL = (0xFFFFFU), /**< ALL */ 83 } ald_rmu_state_t; 84 85 /** 86 * @brief RMU periperal select bit 87 */ 88 typedef enum { 89 ALD_RMU_PERH_GPIO = (1U << 0), /**< AHB1: GPIO */ 90 ALD_RMU_PERH_CRC = (1U << 1), /**< AHB1: CRC */ 91 ALD_RMU_PERH_DMA = (1U << 2), /**< AHB1: DMA */ 92 ALD_RMU_PERH_PIS = (1U << 5), /**< AHB1: PIS */ 93 ALD_RMU_PERH_USB = (1U << 6), /**< AHB1: USB */ 94 ALD_RMU_PERH_CSU = (1U << 7), /**< AHB1: CSU */ 95 96 ALD_RMU_PERH_CHIP = (1U << 0) | (1U << 27), /**< AHB2: CHIP */ 97 ALD_RMU_PERH_CPU = (1U << 1) | (1U << 27), /**< AHB2: CPU */ 98 99 ALD_RMU_PERH_AD16C4T = (1U << 0) | (1U << 28), /**< APB: AD16C4T */ 100 ALD_RMU_PERH_BS16T0 = (1U << 1) | (1U << 28), /**< APB: BS16T0 */ 101 ALD_RMU_PERH_GP16C4T0 = (1U << 2) | (1U << 28), /**< APB: GP16C4T0 */ 102 ALD_RMU_PERH_GP16C4T1 = (1U << 3) | (1U << 28), /**< APB: GP16C4T1 */ 103 ALD_RMU_PERH_GP16C4T2 = (1U << 4) | (1U << 28), /**< APB: GP16C4T2 */ 104 ALD_RMU_PERH_EUART0 = (1U << 8) | (1U << 28), /**< APB: EUART0 */ 105 ALD_RMU_PERH_EUART1 = (1U << 9) | (1U << 28), /**< APB: EUART1 */ 106 ALD_RMU_PERH_CUART0 = (1U << 12) | (1U << 28), /**< APB: CUART0 */ 107 ALD_RMU_PERH_CUART1 = (1U << 13) | (1U << 28), /**< APB: CUART1 */ 108 ALD_RMU_PERH_CUART2 = (1U << 14) | (1U << 28), /**< APB: CUART2 */ 109 ALD_RMU_PERH_SPI0 = (1U << 16) | (1U << 28), /**< APB: SPI0 */ 110 ALD_RMU_PERH_SPI1 = (1U << 17) | (1U << 28), /**< APB: SPI1 */ 111 ALD_RMU_PERH_I2C0 = (1U << 20) | (1U << 28), /**< APB: I2C0 */ 112 ALD_RMU_PERH_I2C1 = (1U << 21) | (1U << 28), /**< APB: I2C1 */ 113 ALD_RMU_PERH_WWDT = (1U << 22) | (1U << 28), /**< APB: WWDT */ 114 ALD_RMU_PERH_IWDT = (1U << 23) | (1U << 28), /**< APB: IWDT */ 115 ALD_RMU_PERH_DBGCON = (1U << 24) | (1U << 28), /**< APB: DBGCON */ 116 ALD_RMU_PERH_ADC = (1U << 25) | (1U << 28), /**< APB: ADC */ 117 } ald_rmu_peripheral_t; 118 /** 119 * @} 120 */ 121 122 /** 123 * @defgroup RMU_Private_Macros RMU Private Macros 124 * @{ 125 */ 126 #define IS_RMU_BORFLT(x) (((x) == ALD_RMU_BORFLT_1) || \ 127 ((x) == ALD_RMU_BORFLT_2) || \ 128 ((x) == ALD_RMU_BORFLT_3) || \ 129 ((x) == ALD_RMU_BORFLT_4) || \ 130 ((x) == ALD_RMU_BORFLT_5) || \ 131 ((x) == ALD_RMU_BORFLT_6) || \ 132 ((x) == ALD_RMU_BORFLT_7)) 133 #define IS_RMU_STATE(x) (((x) == ALD_RMU_RST_POR) || \ 134 ((x) == ALD_RMU_RST_WAKEUP) || \ 135 ((x) == ALD_RMU_RST_BOR) || \ 136 ((x) == ALD_RMU_RST_NMRST) || \ 137 ((x) == ALD_RMU_RST_IWDT) || \ 138 ((x) == ALD_RMU_RST_WWDT) || \ 139 ((x) == ALD_RMU_RST_LOCKUP) || \ 140 ((x) == ALD_RMU_RST_CHIP) || \ 141 ((x) == ALD_RMU_RST_MCU) || \ 142 ((x) == ALD_RMU_RST_CPU) || \ 143 ((x) == ALD_RMU_RST_CFG) || \ 144 ((x) == ALD_RMU_RST_CFGERR) || \ 145 ((x) == ALD_RMU_RST_ALL)) 146 #define IS_RMU_STATE_CLEAR(x) (((x) == ALD_RMU_RST_POR) || \ 147 ((x) == ALD_RMU_RST_WAKEUP) || \ 148 ((x) == ALD_RMU_RST_BOR) || \ 149 ((x) == ALD_RMU_RST_NMRST) || \ 150 ((x) == ALD_RMU_RST_IWDT) || \ 151 ((x) == ALD_RMU_RST_WWDT) || \ 152 ((x) == ALD_RMU_RST_LOCKUP) || \ 153 ((x) == ALD_RMU_RST_CHIP) || \ 154 ((x) == ALD_RMU_RST_MCU) || \ 155 ((x) == ALD_RMU_RST_CPU) || \ 156 ((x) == ALD_RMU_RST_CFG) || \ 157 ((x) == ALD_RMU_RST_ALL)) 158 #define IS_RMU_PERH(x) (((x) == ALD_RMU_PERH_GPIO) || \ 159 ((x) == ALD_RMU_PERH_CRC) || \ 160 ((x) == ALD_RMU_PERH_DMA) || \ 161 ((x) == ALD_RMU_PERH_PIS) || \ 162 ((x) == ALD_RMU_PERH_USB) || \ 163 ((x) == ALD_RMU_PERH_CSU) || \ 164 ((x) == ALD_RMU_PERH_CHIP) || \ 165 ((x) == ALD_RMU_PERH_CPU) || \ 166 ((x) == ALD_RMU_PERH_AD16C4T) || \ 167 ((x) == ALD_RMU_PERH_BS16T0) || \ 168 ((x) == ALD_RMU_PERH_GP16C4T0) || \ 169 ((x) == ALD_RMU_PERH_GP16C4T1) || \ 170 ((x) == ALD_RMU_PERH_GP16C4T2) || \ 171 ((x) == ALD_RMU_PERH_EUART0) || \ 172 ((x) == ALD_RMU_PERH_EUART1) || \ 173 ((x) == ALD_RMU_PERH_CUART0) || \ 174 ((x) == ALD_RMU_PERH_CUART1) || \ 175 ((x) == ALD_RMU_PERH_CUART2) || \ 176 ((x) == ALD_RMU_PERH_SPI0) || \ 177 ((x) == ALD_RMU_PERH_SPI1) || \ 178 ((x) == ALD_RMU_PERH_I2C0) || \ 179 ((x) == ALD_RMU_PERH_I2C1) || \ 180 ((x) == ALD_RMU_PERH_WWDT) || \ 181 ((x) == ALD_RMU_PERH_IWDT) || \ 182 ((x) == ALD_RMU_PERH_DBGCON) || \ 183 ((x) == ALD_RMU_PERH_ADC)) 184 /** 185 * @} 186 */ 187 188 /** @addtogroup RMU_Public_Functions 189 * @{ 190 */ 191 void ald_rmu_bor_config(ald_rmu_bor_filter_t flt); 192 uint32_t ald_rmu_get_reset_status(ald_rmu_state_t state); 193 void ald_rmu_clear_reset_status(ald_rmu_state_t state); 194 void ald_rmu_reset_periperal(ald_rmu_peripheral_t perh); 195 void ald_rmu_reset_system(void); 196 /** 197 * @} 198 */ 199 200 /** 201 * @} 202 */ 203 204 /** 205 * @} 206 */ 207 #ifdef __cplusplus 208 } 209 #endif /* __cplusplus */ 210 211 #endif /* __ALD_RMU_H__ */ 212