1 /**
2 *******************************************************************************************************
3 * @file fm33lc0xx_fl_rmu.h
4 * @author FMSH Application Team
5 * @brief Head file of RMU FL Module
6 *******************************************************************************************************
7 * @attention
8 *
9 * Copyright (c) [2021] [Fudan Microelectronics]
10 * THIS SOFTWARE is licensed under Mulan PSL v2.
11 * You can use this software according to the terms and conditions of the Mulan PSL v2.
12 * You may obtain a copy of Mulan PSL v2 at:
13 * http://license.coscl.org.cn/MulanPSL2
14 * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
15 * EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
16 * MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
17 * See the Mulan PSL v2 for more details.
18 *
19 *******************************************************************************************************
20 */
21
22
23 /* Define to prevent recursive inclusion---------------------------------------------------------------*/
24 #ifndef __FM33LC0XX_FL_RMU_H
25 #define __FM33LC0XX_FL_RMU_H
26
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 /* Includes -------------------------------------------------------------------------------------------*/
31 #include "fm33lc0xx_fl_def.h"
32 /** @addtogroup FM33LC0XX_FL_Driver
33 * @{
34 */
35
36 /** @defgroup RMU RMU
37 * @brief RMU FL driver
38 * @{
39 */
40
41 /* Exported types -------------------------------------------------------------------------------------*/
42 /** @defgroup RMU_FL_ES_INIT RMU Exported Init structures
43 * @{
44 */
45
46 /**
47 * @}
48 */
49 /* Exported constants ---------------------------------------------------------------------------------*/
50 /** @defgroup RMU_FL_Exported_Constants RMU Exported Constants
51 * @{
52 */
53
54 #define RMU_PDRCR_CFG_Pos (1U)
55 #define RMU_PDRCR_CFG_Msk (0x3U << RMU_PDRCR_CFG_Pos)
56 #define RMU_PDRCR_CFG RMU_PDRCR_CFG_Msk
57
58 #define RMU_PDRCR_EN_Pos (0U)
59 #define RMU_PDRCR_EN_Msk (0x1U << RMU_PDRCR_EN_Pos)
60 #define RMU_PDRCR_EN RMU_PDRCR_EN_Msk
61
62 #define RMU_BORCR_CFG_Pos (2U)
63 #define RMU_BORCR_CFG_Msk (0x3U << RMU_BORCR_CFG_Pos)
64 #define RMU_BORCR_CFG RMU_BORCR_CFG_Msk
65
66 #define RMU_BORCR_OFF_BOR_1P2_Pos (0U)
67 #define RMU_BORCR_OFF_BOR_1P2_Msk (0x1U << RMU_BORCR_OFF_BOR_1P2_Pos)
68 #define RMU_BORCR_OFF_BOR_1P2 RMU_BORCR_OFF_BOR_1P2_Msk
69
70 #define RMU_BORCR_OFF_BOR_1P0_Pos (1U)
71 #define RMU_BORCR_OFF_BOR_1P0_Msk (0x1U << RMU_BORCR_OFF_BOR_1P0_Pos)
72 #define RMU_BORCR_OFF_BOR_1P0 RMU_BORCR_OFF_BOR_1P0_Msk
73
74
75
76
77
78
79 #define FL_RMU_PDR_THRESHOLD_1P5V (0x0U << RMU_PDRCR_CFG_Pos)
80 #define FL_RMU_PDR_THRESHOLD_1P25V (0x1U << RMU_PDRCR_CFG_Pos)
81 #define FL_RMU_PDR_THRESHOLD_1P35V (0x2U << RMU_PDRCR_CFG_Pos)
82 #define FL_RMU_PDR_THRESHOLD_1P4V (0x3U << RMU_PDRCR_CFG_Pos)
83
84
85 #define FL_RMU_BOR_THRESHOLD_1P7V (0x0U << RMU_BORCR_CFG_Pos)
86 #define FL_RMU_BOR_THRESHOLD_1P6V (0x1U << RMU_BORCR_CFG_Pos)
87 #define FL_RMU_BOR_THRESHOLD_1P65V (0x2U << RMU_BORCR_CFG_Pos)
88 #define FL_RMU_BOR_THRESHOLD_1P75V (0x3U << RMU_BORCR_CFG_Pos)
89
90
91 /**
92 * @}
93 */
94 /* Exported functions ---------------------------------------------------------------------------------*/
95 /** @defgroup RMU_FL_Exported_Functions RMU Exported Functions
96 * @{
97 */
98
99 /**
100 * @brief Set PDR Power Down Reset Voltage
101 * @rmtoll PDRCR CFG FL_RMU_PDR_SetThreshold
102 * @param RMUx RMU instance
103 * @param threshold This parameter can be one of the following values:
104 * @arg @ref FL_RMU_PDR_THRESHOLD_1P5V
105 * @arg @ref FL_RMU_PDR_THRESHOLD_1P25V
106 * @arg @ref FL_RMU_PDR_THRESHOLD_1P35V
107 * @arg @ref FL_RMU_PDR_THRESHOLD_1P4V
108 * @retval None
109 */
FL_RMU_PDR_SetThreshold(RMU_Type * RMUx,uint32_t threshold)110 __STATIC_INLINE void FL_RMU_PDR_SetThreshold(RMU_Type *RMUx, uint32_t threshold)
111 {
112 MODIFY_REG(RMUx->PDRCR, RMU_PDRCR_CFG_Msk, threshold);
113 }
114
115 /**
116 * @brief Get PDR Power Down Reset Voltage Setting
117 * @rmtoll PDRCR CFG FL_RMU_PDR_GetThreshold
118 * @param RMUx RMU instance
119 * @retval Returned value can be one of the following values:
120 * @arg @ref FL_RMU_PDR_THRESHOLD_1P5V
121 * @arg @ref FL_RMU_PDR_THRESHOLD_1P25V
122 * @arg @ref FL_RMU_PDR_THRESHOLD_1P35V
123 * @arg @ref FL_RMU_PDR_THRESHOLD_1P4V
124 */
FL_RMU_PDR_GetThreshold(RMU_Type * RMUx)125 __STATIC_INLINE uint32_t FL_RMU_PDR_GetThreshold(RMU_Type *RMUx)
126 {
127 return (uint32_t)(READ_BIT(RMUx->PDRCR, RMU_PDRCR_CFG_Msk));
128 }
129
130 /**
131 * @brief Get PDR Power Down Reset Enable Status
132 * @rmtoll PDRCR EN FL_RMU_PDR_IsEnabled
133 * @param RMUx RMU instance
134 * @retval State of bit (1 or 0).
135 */
FL_RMU_PDR_IsEnabled(RMU_Type * RMUx)136 __STATIC_INLINE uint32_t FL_RMU_PDR_IsEnabled(RMU_Type *RMUx)
137 {
138 return (uint32_t)(READ_BIT(RMUx->PDRCR, RMU_PDRCR_EN_Msk) == RMU_PDRCR_EN_Msk);
139 }
140
141 /**
142 * @brief Disable PDR Power Down Reset
143 * @rmtoll PDRCR EN FL_RMU_PDR_Disable
144 * @param RMUx RMU instance
145 * @retval None
146 */
FL_RMU_PDR_Disable(RMU_Type * RMUx)147 __STATIC_INLINE void FL_RMU_PDR_Disable(RMU_Type *RMUx)
148 {
149 CLEAR_BIT(RMUx->PDRCR, RMU_PDRCR_EN_Msk);
150 }
151
152 /**
153 * @brief Enable PDR Power Down Reset
154 * @rmtoll PDRCR EN FL_RMU_PDR_Enable
155 * @param RMUx RMU instance
156 * @retval None
157 */
FL_RMU_PDR_Enable(RMU_Type * RMUx)158 __STATIC_INLINE void FL_RMU_PDR_Enable(RMU_Type *RMUx)
159 {
160 SET_BIT(RMUx->PDRCR, RMU_PDRCR_EN_Msk);
161 }
162
163 /**
164 * @brief Set BOR Power Down Reset Voltage
165 * @rmtoll BORCR CFG FL_RMU_BOR_SetThreshold
166 * @param RMUx RMU instance
167 * @param threshold This parameter can be one of the following values:
168 * @arg @ref FL_RMU_BOR_THRESHOLD_1P7V
169 * @arg @ref FL_RMU_BOR_THRESHOLD_1P6V
170 * @arg @ref FL_RMU_BOR_THRESHOLD_1P65V
171 * @arg @ref FL_RMU_BOR_THRESHOLD_1P75V
172 * @retval None
173 */
FL_RMU_BOR_SetThreshold(RMU_Type * RMUx,uint32_t threshold)174 __STATIC_INLINE void FL_RMU_BOR_SetThreshold(RMU_Type *RMUx, uint32_t threshold)
175 {
176 MODIFY_REG(RMUx->BORCR, RMU_BORCR_CFG_Msk, threshold);
177 }
178
179 /**
180 * @brief Get BOR Power Down Reset Voltage Setting
181 * @rmtoll BORCR CFG FL_RMU_BOR_GetThreshold
182 * @param RMUx RMU instance
183 * @retval Returned value can be one of the following values:
184 * @arg @ref FL_RMU_BOR_THRESHOLD_1P7V
185 * @arg @ref FL_RMU_BOR_THRESHOLD_1P6V
186 * @arg @ref FL_RMU_BOR_THRESHOLD_1P65V
187 * @arg @ref FL_RMU_BOR_THRESHOLD_1P75V
188 */
FL_RMU_BOR_GetThreshold(RMU_Type * RMUx)189 __STATIC_INLINE uint32_t FL_RMU_BOR_GetThreshold(RMU_Type *RMUx)
190 {
191 return (uint32_t)(READ_BIT(RMUx->BORCR, RMU_BORCR_CFG_Msk));
192 }
193
194 /**
195 * @brief Get BOR Power Down Reset Enable Status
196 * @rmtoll BORCR OFF_BOR_1P2 FL_RMU_BORPowerDown_IsEnabled
197 * @param RMUx RMU instance
198 * @retval State of bit (1 or 0).
199 */
FL_RMU_BORPowerDown_IsEnabled(RMU_Type * RMUx)200 __STATIC_INLINE uint32_t FL_RMU_BORPowerDown_IsEnabled(RMU_Type *RMUx)
201 {
202 return (uint32_t)!(READ_BIT(RMUx->BORCR, RMU_BORCR_OFF_BOR_1P2_Msk) == RMU_BORCR_OFF_BOR_1P2_Msk);
203 }
204
205 /**
206 * @brief Disable BOR Power Down Reset
207 * @rmtoll BORCR OFF_BOR_1P2 FL_RMU_BORPowerDown_Disable
208 * @param RMUx RMU instance
209 * @retval None
210 */
FL_RMU_BORPowerDown_Disable(RMU_Type * RMUx)211 __STATIC_INLINE void FL_RMU_BORPowerDown_Disable(RMU_Type *RMUx)
212 {
213 SET_BIT(RMUx->BORCR, RMU_BORCR_OFF_BOR_1P2_Msk);
214 }
215
216 /**
217 * @brief Enable BOR Power Down Reset
218 * @rmtoll BORCR OFF_BOR_1P2 FL_RMU_BORPowerDown_Enable
219 * @param RMUx RMU instance
220 * @retval None
221 */
FL_RMU_BORPowerDown_Enable(RMU_Type * RMUx)222 __STATIC_INLINE void FL_RMU_BORPowerDown_Enable(RMU_Type *RMUx)
223 {
224 CLEAR_BIT(RMUx->BORCR, RMU_BORCR_OFF_BOR_1P2_Msk);
225 }
226
227 /**
228 * @brief Get BOR Power On Reset Enable Status
229 * @rmtoll BORCR OFF_BOR_1P0 FL_RMU_BORPowerUp_IsEnabled
230 * @param RMUx RMU instance
231 * @retval State of bit (1 or 0).
232 */
FL_RMU_BORPowerUp_IsEnabled(RMU_Type * RMUx)233 __STATIC_INLINE uint32_t FL_RMU_BORPowerUp_IsEnabled(RMU_Type *RMUx)
234 {
235 return (uint32_t)!(READ_BIT(RMUx->BORCR, RMU_BORCR_OFF_BOR_1P0_Msk) == RMU_BORCR_OFF_BOR_1P0_Msk);
236 }
237
238 /**
239 * @brief Disable BOR Power On Reset
240 * @rmtoll BORCR OFF_BOR_1P0 FL_RMU_BORPowerUp_Disable
241 * @param RMUx RMU instance
242 * @retval None
243 */
FL_RMU_BORPowerUp_Disable(RMU_Type * RMUx)244 __STATIC_INLINE void FL_RMU_BORPowerUp_Disable(RMU_Type *RMUx)
245 {
246 SET_BIT(RMUx->BORCR, RMU_BORCR_OFF_BOR_1P0_Msk);
247 }
248
249 /**
250 * @brief Enable BOR Power On Reset
251 * @rmtoll BORCR OFF_BOR_1P0 FL_RMU_BORPowerUp_Enable
252 * @param RMUx RMU instance
253 * @retval None
254 */
FL_RMU_BORPowerUp_Enable(RMU_Type * RMUx)255 __STATIC_INLINE void FL_RMU_BORPowerUp_Enable(RMU_Type *RMUx)
256 {
257 CLEAR_BIT(RMUx->BORCR, RMU_BORCR_OFF_BOR_1P0_Msk);
258 }
259
260 /**
261 * @}
262 */
263
264 /** @defgroup RMU_FL_EF_Init Initialization and de-initialization functions
265 * @{
266 */
267
268 /**
269 * @}
270 */
271
272 /**
273 * @}
274 */
275
276 /**
277 * @}
278 */
279
280 #ifdef __cplusplus
281 }
282 #endif
283
284 #endif /* __FM33LC0XX_FL_RMU_H*/
285
286 /*************************Py_Code_Generator Version: 0.1-0.11-0.2 @ 2020-09-23*************************/
287 /********************** (C) COPYRIGHT Fudan Microelectronics **** END OF FILE ***********************/
288