1 /* 2 * Copyright (c) 2006-2022, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2022-03-02 FMD-AE first version 9 */ 10 11 #ifndef __BOARD_H__ 12 #define __BOARD_H__ 13 14 #include <rtthread.h> 15 #include <ft32f0xx.h> 16 #include "drv_gpio.h" 17 #include <rthw.h> 18 #include <ft32f0xx_gpio.h> 19 #include <ft32f0xx_exti.h> 20 #include <ft32f0xx_usart.h> 21 #include <ft32f0xx_dma.h> 22 #include <ft32f0xx_rcc.h> 23 #include <ft32f0xx_syscfg.h> 24 #ifdef RT_USING_DEVICE 25 #include <rtdevice.h> 26 #endif 27 28 #ifdef __cplusplus 29 extern "C" { 30 #endif 31 32 #define FT32_FLASH_START_ADRESS ((uint32_t)0x08000000) 33 #define FT32_FLASH_SIZE (128 * 1024) 34 #define FT32_FLASH_END_ADDRESS ((uint32_t)(FT32_FLASH_START_ADRESS + FT32_FLASH_SIZE)) 35 36 /* Internal SRAM memory size[Kbytes] <8-64>, Default: 64*/ 37 #define FT32_SRAM_SIZE 24 38 #define FT32_SRAM_END (0x20000000 + FT32_SRAM_SIZE * 1024) 39 40 #if defined(__ARMCC_VERSION) 41 extern int Image$$RW_IRAM1$$ZI$$Limit; 42 #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit) 43 #elif __ICCARM__ 44 #pragma section="CSTACK" 45 #define HEAP_BEGIN (__segment_end("CSTACK")) 46 #else 47 extern int __bss_end; 48 #define HEAP_BEGIN ((void *)&__bss_end) 49 #endif 50 51 #define HEAP_END FT32_SRAM_END 52 53 #ifdef __cplusplus 54 } 55 #endif 56 57 #endif /* __BOARD_H__ */ 58