1 /* 2 * Copyright (c) 2006-2022, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2022-03-02 FMD-AE first version 9 */ 10 11 #ifndef __DMA_CONFIG_H__ 12 #define __DMA_CONFIG_H__ 13 14 #include <rtthread.h> 15 16 #ifdef __cplusplus 17 extern "C" { 18 #endif 19 20 /* DMA1 channel1 */ 21 22 /* DMA1 channel2-3 DMA2 channel1-2 */ 23 #if defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE) 24 #define UART1_DMA_RX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler 25 #define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN 26 #define UART1_RX_DMA_INSTANCE DMA1_Channel3 27 #define UART1_RX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn 28 #elif defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE) 29 #define SPI1_DMA_RX_TX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler 30 #define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN 31 #define SPI1_RX_DMA_INSTANCE DMA1_Channel2 32 #define SPI1_RX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn 33 #endif 34 35 #if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE) 36 #define SPI1_DMA_RX_TX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler 37 #define SPI1_TX_DMA_RCC RCC_AHBENR_DMA1EN 38 #define SPI1_TX_DMA_INSTANCE DMA1_Channel3 39 #define SPI1_TX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn 40 #endif 41 /* DMA1 channel2-3 DMA2 channel1-2 */ 42 43 /* DMA1 channel4-7 DMA2 channel3-5 */ 44 #if defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE) 45 #define UART2_DMA_RX_IRQHandler DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler 46 #define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN 47 #define UART2_RX_DMA_INSTANCE DMA1_Channel5 48 #define UART2_RX_DMA_IRQ DMA1_Ch4_7_DMA2_Ch3_5_IRQn 49 #endif 50 /* DMA1 channel4-7 DMA2 channel3-5 */ 51 52 #ifdef __cplusplus 53 } 54 #endif 55 56 #endif /* __DMA_CONFIG_H__ */ 57