1 /**
2   ******************************************************************************
3   * @file               ft32f0xx_crs.h
4   * @author             FMD AE
5   * @brief              This file contains all the functions prototypes for the CRS firmware
6   *                     library.
7   * @version            V1.0.0
8   * @data                   2021-07-01
9   ******************************************************************************
10   */
11 
12 /* Define to prevent recursive inclusion -------------------------------------*/
13 #ifndef __FT32F0XX_CRS_H
14 #define __FT32F0XX_CRS_H
15 
16 #ifdef __cplusplus
17  extern "C" {
18 #endif
19 
20 /*!< Includes ----------------------------------------------------------------*/
21 #include "ft32f0xx.h"
22 
23 
24 /** @addtogroup CRS
25   * @{
26   */
27 
28 /* Exported types ------------------------------------------------------------*/
29 /* Exported constants --------------------------------------------------------*/
30 
31 /** @defgroup CRS_Interrupt_Sources
32   * @{
33   */
34 #define CRS_IT_SYNCOK             CRS_ISR_SYNCOKF    /*!< SYNC event OK */
35 #define CRS_IT_SYNCWARN           CRS_ISR_SYNCWARNF  /*!< SYNC warning */
36 #define CRS_IT_ERR                CRS_ISR_ERRF       /*!< error */
37 #define CRS_IT_ESYNC              CRS_ISR_ESYNCF     /*!< Expected SYNC */
38 #define CRS_IT_TRIMOVF            CRS_ISR_TRIMOVF    /*!< Trimming overflow or underflow */
39 #define CRS_IT_SYNCERR            CRS_ISR_SYNCERR    /*!< SYNC error */
40 #define CRS_IT_SYNCMISS           CRS_ISR_SYNCMISS    /*!< SYNC missed*/
41 
42 #define IS_CRS_IT(IT) (((IT) == CRS_IT_SYNCOK) || ((IT) == CRS_IT_SYNCWARN) || \
43                        ((IT) == CRS_IT_ERR)  || ((IT) == CRS_IT_ESYNC))
44 
45 #define IS_CRS_GET_IT(IT) (((IT) == CRS_IT_SYNCOK) || ((IT) == CRS_IT_SYNCWARN) || \
46                            ((IT) == CRS_IT_ERR) || ((IT) == CRS_IT_ESYNC) || \
47                            ((IT) == CRS_IT_TRIMOVF) || ((IT) == CRS_IT_SYNCERR) || \
48                            ((IT) == CRS_IT_SYNCMISS))
49 
50 #define IS_CRS_CLEAR_IT(IT) ((IT) != 0x00)
51 
52 /**
53   * @}
54   */
55 
56 /** @defgroup CRS_Flags
57   * @{
58   */
59 #define CRS_FLAG_SYNCOK             CRS_ISR_SYNCOKF    /*!< SYNC event OK */
60 #define CRS_FLAG_SYNCWARN           CRS_ISR_SYNCWARNF  /*!< SYNC warning */
61 #define CRS_FLAG_ERR                CRS_ISR_ERRF       /*!< error */
62 #define CRS_FLAG_ESYNC              CRS_ISR_ESYNCF     /*!< Expected SYNC */
63 #define CRS_FLAG_TRIMOVF            CRS_ISR_TRIMOVF    /*!< Trimming overflow or underflow */
64 #define CRS_FLAG_SYNCERR            CRS_ISR_SYNCERR    /*!< SYNC error */
65 #define CRS_FLAG_SYNCMISS           CRS_ISR_SYNCMISS    /*!< SYNC missed*/
66 
67 #define IS_CRS_FLAG(FLAG) (((FLAG) == CRS_FLAG_SYNCOK) || ((FLAG) == CRS_FLAG_SYNCWARN) || \
68                            ((FLAG) == CRS_FLAG_ERR) || ((FLAG) == CRS_FLAG_ESYNC) || \
69                            ((FLAG) == CRS_FLAG_TRIMOVF) || ((FLAG) == CRS_FLAG_SYNCERR) || \
70                            ((FLAG) == CRS_FLAG_SYNCMISS))
71 
72 /**
73   * @}
74   */
75 
76 /** @defgroup CRS_Synchro_Source
77   * @{
78   */
79 #define CRS_SYNCSource_GPIO       ((uint32_t)0x00)        /*!< Synchro Signal soucre GPIO */
80 #define CRS_SYNCSource_LSE        CRS_CFGR_SYNCSRC_0      /*!< Synchro Signal source LSE */
81 #define CRS_SYNCSource_USB        CRS_CFGR_SYNCSRC_1      /*!< Synchro Signal source USB SOF */
82 
83 #define IS_CRS_SYNC_SOURCE(SOURCE) (((SOURCE) == CRS_SYNCSource_GPIO) || \
84                                     ((SOURCE) == CRS_SYNCSource_LSE) ||\
85                                     ((SOURCE) == CRS_SYNCSource_USB))
86 /**
87   * @}
88   */
89 
90 /** @defgroup CRS_SynchroDivider
91   * @{
92   */
93 #define CRS_SYNC_Div1        ((uint32_t)0x00)                          /*!< Synchro Signal not divided */
94 #define CRS_SYNC_Div2        CRS_CFGR_SYNCDIV_0                        /*!< Synchro Signal divided by 2 */
95 #define CRS_SYNC_Div4        CRS_CFGR_SYNCDIV_1                        /*!< Synchro Signal divided by 4 */
96 #define CRS_SYNC_Div8        (CRS_CFGR_SYNCDIV_1 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 8 */
97 #define CRS_SYNC_Div16       CRS_CFGR_SYNCDIV_2                        /*!< Synchro Signal divided by 16 */
98 #define CRS_SYNC_Div32       (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_0) /*!< Synchro Signal divided by 32 */
99 #define CRS_SYNC_Div64       (CRS_CFGR_SYNCDIV_2 | CRS_CFGR_SYNCDIV_1) /*!< Synchro Signal divided by 64 */
100 #define CRS_SYNC_Div128      CRS_CFGR_SYNCDIV                          /*!< Synchro Signal divided by 128 */
101 
102 #define IS_CRS_SYNC_DIV(DIV) (((DIV) == CRS_SYNC_Div1) || ((DIV) == CRS_SYNC_Div2)   ||\
103                               ((DIV) == CRS_SYNC_Div4) || ((DIV) == CRS_SYNC_Div8)   || \
104                               ((DIV) == CRS_SYNC_Div16) || ((DIV) == CRS_SYNC_Div32) || \
105                               ((DIV) == CRS_SYNC_Div64) || ((DIV) == CRS_SYNC_Div128))
106 /**
107   * @}
108   */
109 
110 /** @defgroup CRS_SynchroPolarity
111   * @{
112   */
113 #define CRS_SYNCPolarity_Rising       ((uint32_t)0x00)      /*!< Synchro Active on rising edge */
114 #define CRS_SYNCPolarity_Falling      CRS_CFGR_SYNCPOL      /*!< Synchro Active on falling edge */
115 
116 #define IS_CRS_SYNC_POLARITY(POLARITY) (((POLARITY) == CRS_SYNCPolarity_Rising) || \
117                                     ((POLARITY) == CRS_SYNCPolarity_Falling))
118 /**
119   * @}
120   */
121 
122 
123 
124 /* Exported macro ------------------------------------------------------------*/
125 /* Exported functions ------------------------------------------------------- */
126 /* Configuration of the CRS **********************************/
127 void CRS_DeInit(void);
128 void CRS_AdjustHSI48CalibrationValue(uint8_t CRS_HSI48CalibrationValue);
129 void CRS_FrequencyErrorCounterCmd(FunctionalState NewState);
130 void CRS_AutomaticCalibrationCmd(FunctionalState NewState);
131 void CRS_SoftwareSynchronizationGenerate(void);
132 void CRS_FrequencyErrorCounterReload(uint32_t CRS_ReloadValue);
133 void CRS_FrequencyErrorLimitConfig(uint8_t CRS_ErrorLimitValue);
134 void CRS_SynchronizationPrescalerConfig(uint32_t CRS_Prescaler);
135 void CRS_SynchronizationSourceConfig(uint32_t CRS_Source);
136 void CRS_SynchronizationPolarityConfig(uint32_t CRS_Polarity);
137 uint32_t CRS_GetReloadValue(void);
138 uint32_t CRS_GetHSI48CalibrationValue(void);
139 uint32_t CRS_GetFrequencyErrorValue(void);
140 uint32_t CRS_GetFrequencyErrorDirection(void);
141 
142 /* Interrupts and flags management functions **********************************/
143 void CRS_ITConfig(uint32_t CRS_IT, FunctionalState NewState);
144 FlagStatus CRS_GetFlagStatus(uint32_t CRS_FLAG);
145 void CRS_ClearFlag(uint32_t CRS_FLAG);
146 ITStatus CRS_GetITStatus(uint32_t CRS_IT);
147 void CRS_ClearITPendingBit(uint32_t CRS_IT);
148 
149 #ifdef __cplusplus
150 }
151 #endif
152 
153 #endif /* __FT32F0XX_CRS_H */
154 
155 /**
156   * @}
157   */
158 
159 /**
160   * @}
161   */
162 
163 /************************ (C) COPYRIGHT FMD *****END OF FILE****/
164