1 /**
2 ******************************************************************************
3 * @file ft32f0xx_i2c.c
4 * @author FMD AE
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Inter-Integrated circuit (I2C):
7 * + Initialization and Configuration
8 * + Communications handling
9 * + SMBUS management
10 * + I2C registers management
11 * + Data transfers management
12 * + DMA transfers management
13 * + Interrupts and flags management
14 * @version V1.0.0
15 * @data 2021-07-01
16 ******************************************************************************
17 */
18
19 /* Includes ------------------------------------------------------------------*/
20 #include "ft32f0xx_i2c.h"
21 #include "ft32f0xx_rcc.h"
22
23
24
25 #define CR1_CLEAR_MASK ((uint32_t)0x00CFE0FF) /*<! I2C CR1 clear register Mask */
26 #define CR2_CLEAR_MASK ((uint32_t)0x07FF7FFF) /*<! I2C CR2 clear register Mask */
27 #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! I2C TIMING clear register Mask */
28 #define ERROR_IT_MASK ((uint32_t)0x00003F00) /*<! I2C Error interrupt register Mask */
29 #define TC_IT_MASK ((uint32_t)0x000000C0) /*<! I2C TC interrupt register Mask */
30
31
32
33 /**
34 * @brief Deinitializes the I2Cx peripheral registers to their default reset values.
35 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
36 * @retval None
37 */
I2C_DeInit(I2C_TypeDef * I2Cx)38 void I2C_DeInit(I2C_TypeDef* I2Cx)
39 {
40 /* Check the parameters */
41 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
42
43 if (I2Cx == I2C1)
44 {
45 /* Enable I2C1 reset state */
46 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, ENABLE);
47 /* Release I2C1 from reset state */
48 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C1, DISABLE);
49 }
50 else
51 {
52 /* Enable I2C2 reset state */
53 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, ENABLE);
54 /* Release I2C2 from reset state */
55 RCC_APB1PeriphResetCmd(RCC_APB1Periph_I2C2, DISABLE);
56 }
57 }
58
59 /**
60 * @brief Initializes the I2Cx peripheral according to the specified
61 * parameters in the I2C_InitStruct.
62 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
63 * @param I2C_InitStruct: pointer to a I2C_InitTypeDef structure that
64 * contains the configuration information for the specified I2C peripheral.
65 * @retval None
66 */
I2C_Init(I2C_TypeDef * I2Cx,I2C_InitTypeDef * I2C_InitStruct)67 void I2C_Init(I2C_TypeDef* I2Cx, I2C_InitTypeDef* I2C_InitStruct)
68 {
69 uint32_t tmpreg = 0;
70
71 /* Check the parameters */
72 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
73 assert_param(IS_I2C_ANALOG_FILTER(I2C_InitStruct->I2C_AnalogFilter));
74 assert_param(IS_I2C_DIGITAL_FILTER(I2C_InitStruct->I2C_DigitalFilter));
75 assert_param(IS_I2C_MODE(I2C_InitStruct->I2C_Mode));
76 assert_param(IS_I2C_OWN_ADDRESS1(I2C_InitStruct->I2C_OwnAddress1));
77 assert_param(IS_I2C_ACK(I2C_InitStruct->I2C_Ack));
78 assert_param(IS_I2C_ACKNOWLEDGE_ADDRESS(I2C_InitStruct->I2C_AcknowledgedAddress));
79
80 /* Disable I2Cx Peripheral */
81 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE);
82
83 /*---------------------------- I2Cx FILTERS Configuration ------------------*/
84 /* Get the I2Cx CR1 value */
85 tmpreg = I2Cx->CR1;
86 /* Clear I2Cx CR1 register */
87 tmpreg &= CR1_CLEAR_MASK;
88 /* Configure I2Cx: analog and digital filter */
89 /* Set ANFOFF bit according to I2C_AnalogFilter value */
90 /* Set DFN bits according to I2C_DigitalFilter value */
91 tmpreg |= (uint32_t)I2C_InitStruct->I2C_AnalogFilter |(I2C_InitStruct->I2C_DigitalFilter << 8);
92
93 /* Write to I2Cx CR1 */
94 I2Cx->CR1 = tmpreg;
95
96 /*---------------------------- I2Cx TIMING Configuration -------------------*/
97 /* Configure I2Cx: Timing */
98 /* Set TIMINGR bits according to I2C_Timing */
99 /* Write to I2Cx TIMING */
100 I2Cx->TIMINGR = I2C_InitStruct->I2C_Timing & TIMING_CLEAR_MASK;
101
102 /* Enable I2Cx Peripheral */
103 I2Cx->CR1 |= I2C_CR1_PE;
104
105 /*---------------------------- I2Cx OAR1 Configuration ---------------------*/
106 /* Clear tmpreg local variable */
107 tmpreg = 0;
108 /* Clear OAR1 register */
109 I2Cx->OAR1 = (uint32_t)tmpreg;
110 /* Clear OAR2 register */
111 I2Cx->OAR2 = (uint32_t)tmpreg;
112 /* Configure I2Cx: Own Address1 and acknowledged address */
113 /* Set OA1MODE bit according to I2C_AcknowledgedAddress value */
114 /* Set OA1 bits according to I2C_OwnAddress1 value */
115 tmpreg = (uint32_t)((uint32_t)I2C_InitStruct->I2C_AcknowledgedAddress | \
116 (uint32_t)I2C_InitStruct->I2C_OwnAddress1);
117 /* Write to I2Cx OAR1 */
118 I2Cx->OAR1 = tmpreg;
119 /* Enable Own Address1 acknowledgement */
120 I2Cx->OAR1 |= I2C_OAR1_OA1EN;
121
122 /*---------------------------- I2Cx MODE Configuration ---------------------*/
123 /* Configure I2Cx: mode */
124 /* Set SMBDEN and SMBHEN bits according to I2C_Mode value */
125 tmpreg = I2C_InitStruct->I2C_Mode;
126 /* Write to I2Cx CR1 */
127 I2Cx->CR1 |= tmpreg;
128
129 /*---------------------------- I2Cx ACK Configuration ----------------------*/
130 /* Get the I2Cx CR2 value */
131 tmpreg = I2Cx->CR2;
132 /* Clear I2Cx CR2 register */
133 tmpreg &= CR2_CLEAR_MASK;
134 /* Configure I2Cx: acknowledgement */
135 /* Set NACK bit according to I2C_Ack value */
136 tmpreg |= I2C_InitStruct->I2C_Ack;
137 /* Write to I2Cx CR2 */
138 I2Cx->CR2 = tmpreg;
139 }
140
141 /**
142 * @brief Fills each I2C_InitStruct member with its default value.
143 * @param I2C_InitStruct: pointer to an I2C_InitTypeDef structure which will be initialized.
144 * @retval None
145 */
I2C_StructInit(I2C_InitTypeDef * I2C_InitStruct)146 void I2C_StructInit(I2C_InitTypeDef* I2C_InitStruct)
147 {
148 /*---------------- Reset I2C init structure parameters values --------------*/
149 /* Initialize the I2C_Timing member */
150 I2C_InitStruct->I2C_Timing = 0;
151 /* Initialize the I2C_AnalogFilter member */
152 I2C_InitStruct->I2C_AnalogFilter = I2C_AnalogFilter_Enable;
153 /* Initialize the I2C_DigitalFilter member */
154 I2C_InitStruct->I2C_DigitalFilter = 0;
155 /* Initialize the I2C_Mode member */
156 I2C_InitStruct->I2C_Mode = I2C_Mode_I2C;
157 /* Initialize the I2C_OwnAddress1 member */
158 I2C_InitStruct->I2C_OwnAddress1 = 0;
159 /* Initialize the I2C_Ack member */
160 I2C_InitStruct->I2C_Ack = I2C_Ack_Disable;
161 /* Initialize the I2C_AcknowledgedAddress member */
162 I2C_InitStruct->I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit;
163 }
164
165 /**
166 * @brief Enables or disables the specified I2C peripheral.
167 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
168 * @param NewState: new state of the I2Cx peripheral.
169 * This parameter can be: ENABLE or DISABLE.
170 * @retval None
171 */
I2C_Cmd(I2C_TypeDef * I2Cx,FunctionalState NewState)172 void I2C_Cmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
173 {
174 /* Check the parameters */
175 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
176 assert_param(IS_FUNCTIONAL_STATE(NewState));
177 if (NewState != DISABLE)
178 {
179 /* Enable the selected I2C peripheral */
180 I2Cx->CR1 |= I2C_CR1_PE;
181 }
182 else
183 {
184 /* Disable the selected I2C peripheral */
185 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE);
186 }
187 }
188
189 /**
190 * @brief Enables or disables the specified I2C software reset.
191 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
192 * @retval None
193 */
I2C_SoftwareResetCmd(I2C_TypeDef * I2Cx)194 void I2C_SoftwareResetCmd(I2C_TypeDef* I2Cx)
195 {
196 /* Check the parameters */
197 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
198
199 /* Disable peripheral */
200 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PE);
201
202 /* Perform a dummy read to delay the disable of peripheral for minimum
203 3 APB clock cycles to perform the software reset functionality */
204 *(__IO uint32_t *)(uint32_t)I2Cx;
205
206 /* Enable peripheral */
207 I2Cx->CR1 |= I2C_CR1_PE;
208 }
209
210 /**
211 * @brief Enables or disables the specified I2C interrupts.
212 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
213 * @param I2C_IT: specifies the I2C interrupts sources to be enabled or disabled.
214 * This parameter can be any combination of the following values:
215 * @arg I2C_IT_ERRI: Error interrupt mask
216 * @arg I2C_IT_TCI: Transfer Complete interrupt mask
217 * @arg I2C_IT_STOPI: Stop Detection interrupt mask
218 * @arg I2C_IT_NACKI: Not Acknowledge received interrupt mask
219 * @arg I2C_IT_ADDRI: Address Match interrupt mask
220 * @arg I2C_IT_RXI: RX interrupt mask
221 * @arg I2C_IT_TXI: TX interrupt mask
222 * @param NewState: new state of the specified I2C interrupts.
223 * This parameter can be: ENABLE or DISABLE.
224 * @retval None
225 */
I2C_ITConfig(I2C_TypeDef * I2Cx,uint32_t I2C_IT,FunctionalState NewState)226 void I2C_ITConfig(I2C_TypeDef* I2Cx, uint32_t I2C_IT, FunctionalState NewState)
227 {
228 /* Check the parameters */
229 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
230 assert_param(IS_FUNCTIONAL_STATE(NewState));
231 assert_param(IS_I2C_CONFIG_IT(I2C_IT));
232
233 if (NewState != DISABLE)
234 {
235 /* Enable the selected I2C interrupts */
236 I2Cx->CR1 |= I2C_IT;
237 }
238 else
239 {
240 /* Disable the selected I2C interrupts */
241 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_IT);
242 }
243 }
244
245 /**
246 * @brief Enables or disables the I2C Clock stretching.
247 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
248 * @param NewState: new state of the I2Cx Clock stretching.
249 * This parameter can be: ENABLE or DISABLE.
250 * @retval None
251 */
I2C_StretchClockCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)252 void I2C_StretchClockCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
253 {
254 /* Check the parameters */
255 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
256 assert_param(IS_FUNCTIONAL_STATE(NewState));
257
258 if (NewState != DISABLE)
259 {
260 /* Enable clock stretching */
261 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_NOSTRETCH);
262 }
263 else
264 {
265 /* Disable clock stretching */
266 I2Cx->CR1 |= I2C_CR1_NOSTRETCH;
267 }
268 }
269
270 /**
271 * @brief Enables or disables the I2C own address 2.
272 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
273 * @param NewState: new state of the I2C own address 2.
274 * This parameter can be: ENABLE or DISABLE.
275 * @retval None
276 */
I2C_DualAddressCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)277 void I2C_DualAddressCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
278 {
279 /* Check the parameters */
280 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
281 assert_param(IS_FUNCTIONAL_STATE(NewState));
282
283 if (NewState != DISABLE)
284 {
285 /* Enable own address 2 */
286 I2Cx->OAR2 |= I2C_OAR2_OA2EN;
287 }
288 else
289 {
290 /* Disable own address 2 */
291 I2Cx->OAR2 &= (uint32_t)~((uint32_t)I2C_OAR2_OA2EN);
292 }
293 }
294
295 /**
296 * @brief Configures the I2C slave own address 2 and mask.
297 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
298 * @param Address: specifies the slave address to be programmed.
299 * @param Mask: specifies own address 2 mask to be programmed.
300 * This parameter can be one of the following values:
301 * @arg I2C_OA2_NoMask: no mask.
302 * @arg I2C_OA2_Mask01: OA2[1] is masked and don't care.
303 * @arg I2C_OA2_Mask02: OA2[2:1] are masked and don't care.
304 * @arg I2C_OA2_Mask03: OA2[3:1] are masked and don't care.
305 * @arg I2C_OA2_Mask04: OA2[4:1] are masked and don't care.
306 * @arg I2C_OA2_Mask05: OA2[5:1] are masked and don't care.
307 * @arg I2C_OA2_Mask06: OA2[6:1] are masked and don't care.
308 * @arg I2C_OA2_Mask07: OA2[7:1] are masked and don't care.
309 * @retval None
310 */
I2C_OwnAddress2Config(I2C_TypeDef * I2Cx,uint16_t Address,uint8_t Mask)311 void I2C_OwnAddress2Config(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Mask)
312 {
313 uint32_t tmpreg = 0;
314
315 /* Check the parameters */
316 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
317 assert_param(IS_I2C_OWN_ADDRESS2(Address));
318 assert_param(IS_I2C_OWN_ADDRESS2_MASK(Mask));
319
320 /* Get the old register value */
321 tmpreg = I2Cx->OAR2;
322
323 /* Reset I2Cx OA2 bit [7:1] and OA2MSK bit [1:0] */
324 tmpreg &= (uint32_t)~((uint32_t)(I2C_OAR2_OA2 | I2C_OAR2_OA2MSK));
325
326 /* Set I2Cx SADD */
327 tmpreg |= (uint32_t)(((uint32_t)Address & I2C_OAR2_OA2) | \
328 (((uint32_t)Mask << 8) & I2C_OAR2_OA2MSK)) ;
329
330 /* Store the new register value */
331 I2Cx->OAR2 = tmpreg;
332 }
333
334 /**
335 * @brief Enables or disables the I2C general call mode.
336 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
337 * @param NewState: new state of the I2C general call mode.
338 * This parameter can be: ENABLE or DISABLE.
339 * @retval None
340 */
I2C_GeneralCallCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)341 void I2C_GeneralCallCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
342 {
343 /* Check the parameters */
344 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
345 assert_param(IS_FUNCTIONAL_STATE(NewState));
346
347 if (NewState != DISABLE)
348 {
349 /* Enable general call mode */
350 I2Cx->CR1 |= I2C_CR1_GCEN;
351 }
352 else
353 {
354 /* Disable general call mode */
355 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_GCEN);
356 }
357 }
358
359 /**
360 * @brief Enables or disables the I2C slave byte control.
361 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
362 * @param NewState: new state of the I2C slave byte control.
363 * This parameter can be: ENABLE or DISABLE.
364 * @retval None
365 */
I2C_SlaveByteControlCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)366 void I2C_SlaveByteControlCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
367 {
368 /* Check the parameters */
369 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
370 assert_param(IS_FUNCTIONAL_STATE(NewState));
371
372 if (NewState != DISABLE)
373 {
374 /* Enable slave byte control */
375 I2Cx->CR1 |= I2C_CR1_SBC;
376 }
377 else
378 {
379 /* Disable slave byte control */
380 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_SBC);
381 }
382 }
383
384 /**
385 * @brief Configures the slave address to be transmitted after start generation.
386 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
387 * @param Address: specifies the slave address to be programmed.
388 * @note This function should be called before generating start condition.
389 * @retval None
390 */
I2C_SlaveAddressConfig(I2C_TypeDef * I2Cx,uint16_t Address)391 void I2C_SlaveAddressConfig(I2C_TypeDef* I2Cx, uint16_t Address)
392 {
393 uint32_t tmpreg = 0;
394
395 /* Check the parameters */
396 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
397 assert_param(IS_I2C_SLAVE_ADDRESS(Address));
398
399 /* Get the old register value */
400 tmpreg = I2Cx->CR2;
401
402 /* Reset I2Cx SADD bit [9:0] */
403 tmpreg &= (uint32_t)~((uint32_t)I2C_CR2_SADD);
404
405 /* Set I2Cx SADD */
406 tmpreg |= (uint32_t)((uint32_t)Address & I2C_CR2_SADD);
407
408 /* Store the new register value */
409 I2Cx->CR2 = tmpreg;
410 }
411
412 /**
413 * @brief Enables or disables the I2C 10-bit addressing mode for the master.
414 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
415 * @param NewState: new state of the I2C 10-bit addressing mode.
416 * This parameter can be: ENABLE or DISABLE.
417 * @note This function should be called before generating start condition.
418 * @retval None
419 */
I2C_10BitAddressingModeCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)420 void I2C_10BitAddressingModeCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
421 {
422 /* Check the parameters */
423 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
424 assert_param(IS_FUNCTIONAL_STATE(NewState));
425
426 if (NewState != DISABLE)
427 {
428 /* Enable 10-bit addressing mode */
429 I2Cx->CR2 |= I2C_CR2_ADD10;
430 }
431 else
432 {
433 /* Disable 10-bit addressing mode */
434 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_ADD10);
435 }
436 }
437
438 /**
439 * @}
440 */
441
442
443 /**
444 * @brief Enables or disables the I2C automatic end mode (stop condition is
445 * automatically sent when nbytes data are transferred).
446 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
447 * @param NewState: new state of the I2C automatic end mode.
448 * This parameter can be: ENABLE or DISABLE.
449 * @note This function has effect if Reload mode is disabled.
450 * @retval None
451 */
I2C_AutoEndCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)452 void I2C_AutoEndCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
453 {
454 /* Check the parameters */
455 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
456 assert_param(IS_FUNCTIONAL_STATE(NewState));
457
458 if (NewState != DISABLE)
459 {
460 /* Enable Auto end mode */
461 I2Cx->CR2 |= I2C_CR2_AUTOEND;
462 }
463 else
464 {
465 /* Disable Auto end mode */
466 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_AUTOEND);
467 }
468 }
469
470 /**
471 * @brief Enables or disables the I2C nbytes reload mode.
472 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
473 * @param NewState: new state of the nbytes reload mode.
474 * This parameter can be: ENABLE or DISABLE.
475 * @retval None
476 */
I2C_ReloadCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)477 void I2C_ReloadCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
478 {
479 /* Check the parameters */
480 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
481 assert_param(IS_FUNCTIONAL_STATE(NewState));
482
483 if (NewState != DISABLE)
484 {
485 /* Enable Auto Reload mode */
486 I2Cx->CR2 |= I2C_CR2_RELOAD;
487 }
488 else
489 {
490 /* Disable Auto Reload mode */
491 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_RELOAD);
492 }
493 }
494
495 /**
496 * @brief Configures the number of bytes to be transmitted/received.
497 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
498 * @param Number_Bytes: specifies the number of bytes to be programmed.
499 * @retval None
500 */
I2C_NumberOfBytesConfig(I2C_TypeDef * I2Cx,uint8_t Number_Bytes)501 void I2C_NumberOfBytesConfig(I2C_TypeDef* I2Cx, uint8_t Number_Bytes)
502 {
503 uint32_t tmpreg = 0;
504
505 /* Check the parameters */
506 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
507
508 /* Get the old register value */
509 tmpreg = I2Cx->CR2;
510
511 /* Reset I2Cx Nbytes bit [7:0] */
512 tmpreg &= (uint32_t)~((uint32_t)I2C_CR2_NBYTES);
513
514 /* Set I2Cx Nbytes */
515 tmpreg |= (uint32_t)(((uint32_t)Number_Bytes << 16 ) & I2C_CR2_NBYTES);
516
517 /* Store the new register value */
518 I2Cx->CR2 = tmpreg;
519 }
520
521 /**
522 * @brief Configures the type of transfer request for the master.
523 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
524 * @param I2C_Direction: specifies the transfer request direction to be programmed.
525 * This parameter can be one of the following values:
526 * @arg I2C_Direction_Transmitter: Master request a write transfer
527 * @arg I2C_Direction_Receiver: Master request a read transfer
528 * @retval None
529 */
I2C_MasterRequestConfig(I2C_TypeDef * I2Cx,uint16_t I2C_Direction)530 void I2C_MasterRequestConfig(I2C_TypeDef* I2Cx, uint16_t I2C_Direction)
531 {
532 /* Check the parameters */
533 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
534 assert_param(IS_I2C_DIRECTION(I2C_Direction));
535
536 /* Test on the direction to set/reset the read/write bit */
537 if (I2C_Direction == I2C_Direction_Transmitter)
538 {
539 /* Request a write Transfer */
540 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_RD_WRN);
541 }
542 else
543 {
544 /* Request a read Transfer */
545 I2Cx->CR2 |= I2C_CR2_RD_WRN;
546 }
547 }
548
549 /**
550 * @brief Generates I2Cx communication START condition.
551 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
552 * @param NewState: new state of the I2C START condition generation.
553 * This parameter can be: ENABLE or DISABLE.
554 * @retval None
555 */
I2C_GenerateSTART(I2C_TypeDef * I2Cx,FunctionalState NewState)556 void I2C_GenerateSTART(I2C_TypeDef* I2Cx, FunctionalState NewState)
557 {
558 /* Check the parameters */
559 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
560 assert_param(IS_FUNCTIONAL_STATE(NewState));
561
562 if (NewState != DISABLE)
563 {
564 /* Generate a START condition */
565 I2Cx->CR2 |= I2C_CR2_START;
566 }
567 else
568 {
569 /* Disable the START condition generation */
570 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_START);
571 }
572 }
573
574 /**
575 * @brief Generates I2Cx communication STOP condition.
576 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
577 * @param NewState: new state of the I2C STOP condition generation.
578 * This parameter can be: ENABLE or DISABLE.
579 * @retval None
580 */
I2C_GenerateSTOP(I2C_TypeDef * I2Cx,FunctionalState NewState)581 void I2C_GenerateSTOP(I2C_TypeDef* I2Cx, FunctionalState NewState)
582 {
583 /* Check the parameters */
584 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
585 assert_param(IS_FUNCTIONAL_STATE(NewState));
586
587 if (NewState != DISABLE)
588 {
589 /* Generate a STOP condition */
590 I2Cx->CR2 |= I2C_CR2_STOP;
591 }
592 else
593 {
594 /* Disable the STOP condition generation */
595 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_STOP);
596 }
597 }
598
599 /**
600 * @brief Enables or disables the I2C 10-bit header only mode with read direction.
601 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
602 * @param NewState: new state of the I2C 10-bit header only mode.
603 * This parameter can be: ENABLE or DISABLE.
604 * @note This mode can be used only when switching from master transmitter mode
605 * to master receiver mode.
606 * @retval None
607 */
I2C_10BitAddressHeaderCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)608 void I2C_10BitAddressHeaderCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
609 {
610 /* Check the parameters */
611 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
612 assert_param(IS_FUNCTIONAL_STATE(NewState));
613
614 if (NewState != DISABLE)
615 {
616 /* Enable 10-bit header only mode */
617 I2Cx->CR2 |= I2C_CR2_HEAD10R;
618 }
619 else
620 {
621 /* Disable 10-bit header only mode */
622 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_HEAD10R);
623 }
624 }
625
626 /**
627 * @brief Generates I2C communication Acknowledge.
628 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
629 * @param NewState: new state of the Acknowledge.
630 * This parameter can be: ENABLE or DISABLE.
631 * @retval None
632 */
I2C_AcknowledgeConfig(I2C_TypeDef * I2Cx,FunctionalState NewState)633 void I2C_AcknowledgeConfig(I2C_TypeDef* I2Cx, FunctionalState NewState)
634 {
635 /* Check the parameters */
636 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
637 assert_param(IS_FUNCTIONAL_STATE(NewState));
638
639 if (NewState != DISABLE)
640 {
641 /* Enable ACK generation */
642 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_NACK);
643 }
644 else
645 {
646 /* Enable NACK generation */
647 I2Cx->CR2 |= I2C_CR2_NACK;
648 }
649 }
650
651 /**
652 * @brief Returns the I2C slave matched address .
653 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
654 * @retval The value of the slave matched address .
655 */
I2C_GetAddressMatched(I2C_TypeDef * I2Cx)656 uint8_t I2C_GetAddressMatched(I2C_TypeDef* I2Cx)
657 {
658 /* Check the parameters */
659 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
660
661 /* Return the slave matched address in the SR1 register */
662 return (uint8_t)(((uint32_t)I2Cx->ISR & I2C_ISR_ADDCODE) >> 16) ;
663 }
664
665 /**
666 * @brief Returns the I2C slave received request.
667 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
668 * @retval The value of the received request.
669 */
I2C_GetTransferDirection(I2C_TypeDef * I2Cx)670 uint16_t I2C_GetTransferDirection(I2C_TypeDef* I2Cx)
671 {
672 uint32_t tmpreg = 0;
673 uint16_t direction = 0;
674
675 /* Check the parameters */
676 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
677
678 /* Return the slave matched address in the SR1 register */
679 tmpreg = (uint32_t)(I2Cx->ISR & I2C_ISR_DIR);
680
681 /* If write transfer is requested */
682 if (tmpreg == 0)
683 {
684 /* write transfer is requested */
685 direction = I2C_Direction_Transmitter;
686 }
687 else
688 {
689 /* Read transfer is requested */
690 direction = I2C_Direction_Receiver;
691 }
692 return direction;
693 }
694
695 /**
696 * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
697 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
698 * @param Address: specifies the slave address to be programmed.
699 * @param Number_Bytes: specifies the number of bytes to be programmed.
700 * This parameter must be a value between 0 and 255.
701 * @param ReloadEndMode: new state of the I2C START condition generation.
702 * This parameter can be one of the following values:
703 * @arg I2C_Reload_Mode: Enable Reload mode .
704 * @arg I2C_AutoEnd_Mode: Enable Automatic end mode.
705 * @arg I2C_SoftEnd_Mode: Enable Software end mode.
706 * @param StartStopMode: new state of the I2C START condition generation.
707 * This parameter can be one of the following values:
708 * @arg I2C_No_StartStop: Don't Generate stop and start condition.
709 * @arg I2C_Generate_Stop: Generate stop condition (Number_Bytes should be set to 0).
710 * @arg I2C_Generate_Start_Read: Generate Restart for read request.
711 * @arg I2C_Generate_Start_Write: Generate Restart for write request.
712 * @retval None
713 */
I2C_TransferHandling(I2C_TypeDef * I2Cx,uint16_t Address,uint8_t Number_Bytes,uint32_t ReloadEndMode,uint32_t StartStopMode)714 void I2C_TransferHandling(I2C_TypeDef* I2Cx, uint16_t Address, uint8_t Number_Bytes, uint32_t ReloadEndMode, uint32_t StartStopMode)
715 {
716 uint32_t tmpreg = 0;
717
718 /* Check the parameters */
719 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
720 assert_param(IS_I2C_SLAVE_ADDRESS(Address));
721 assert_param(IS_RELOAD_END_MODE(ReloadEndMode));
722 assert_param(IS_START_STOP_MODE(StartStopMode));
723
724 /* Get the CR2 register value */
725 tmpreg = I2Cx->CR2;
726
727 /* clear tmpreg specific bits */
728 tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP));
729
730 /* update tmpreg */
731 tmpreg |= (uint32_t)(((uint32_t)Address & I2C_CR2_SADD) | (((uint32_t)Number_Bytes << 16 ) & I2C_CR2_NBYTES) | \
732 (uint32_t)ReloadEndMode | (uint32_t)StartStopMode);
733
734 /* update CR2 register */
735 I2Cx->CR2 = tmpreg;
736 }
737
738 /**
739 * @}
740 */
741
742 /**
743 * @brief Enables or disables I2C SMBus alert.
744 * @param I2Cx: where x can be 1 to select the I2C peripheral.
745 * @param NewState: new state of the I2Cx SMBus alert.
746 * This parameter can be: ENABLE or DISABLE.
747 * @retval None
748 */
I2C_SMBusAlertCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)749 void I2C_SMBusAlertCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
750 {
751 /* Check the parameters */
752 assert_param(IS_I2C_1_PERIPH(I2Cx));
753 assert_param(IS_FUNCTIONAL_STATE(NewState));
754
755 if (NewState != DISABLE)
756 {
757 /* Enable SMBus alert */
758 I2Cx->CR1 |= I2C_CR1_ALERTEN;
759 }
760 else
761 {
762 /* Disable SMBus alert */
763 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_ALERTEN);
764 }
765 }
766
767 /**
768 * @brief Enables or disables I2C Clock Timeout (SCL Timeout detection).
769 * @param I2Cx: where x can be 1 to select the I2C peripheral.
770 * @param NewState: new state of the I2Cx clock Timeout.
771 * This parameter can be: ENABLE or DISABLE.
772 * @retval None
773 */
I2C_ClockTimeoutCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)774 void I2C_ClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
775 {
776 /* Check the parameters */
777 assert_param(IS_I2C_1_PERIPH(I2Cx));
778 assert_param(IS_FUNCTIONAL_STATE(NewState));
779
780 if (NewState != DISABLE)
781 {
782 /* Enable Clock Timeout */
783 I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TIMOUTEN;
784 }
785 else
786 {
787 /* Disable Clock Timeout */
788 I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMOUTEN);
789 }
790 }
791
792 /**
793 * @brief Enables or disables I2C Extended Clock Timeout (SCL cumulative Timeout detection).
794 * @param I2Cx: where x can be 1 to select the I2C peripheral.
795 * @param NewState: new state of the I2Cx Extended clock Timeout.
796 * This parameter can be: ENABLE or DISABLE.
797 * @retval None
798 */
I2C_ExtendedClockTimeoutCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)799 void I2C_ExtendedClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
800 {
801 /* Check the parameters */
802 assert_param(IS_I2C_1_PERIPH(I2Cx));
803 assert_param(IS_FUNCTIONAL_STATE(NewState));
804
805 if (NewState != DISABLE)
806 {
807 /* Enable Clock Timeout */
808 I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TEXTEN;
809 }
810 else
811 {
812 /* Disable Clock Timeout */
813 I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TEXTEN);
814 }
815 }
816
817 /**
818 * @brief Enables or disables I2C Idle Clock Timeout (Bus idle SCL and SDA
819 * high detection).
820 * @param I2Cx: where x can be 1 to select the I2C peripheral.
821 * @param NewState: new state of the I2Cx Idle clock Timeout.
822 * This parameter can be: ENABLE or DISABLE.
823 * @retval None
824 */
I2C_IdleClockTimeoutCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)825 void I2C_IdleClockTimeoutCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
826 {
827 /* Check the parameters */
828 assert_param(IS_I2C_1_PERIPH(I2Cx));
829 assert_param(IS_FUNCTIONAL_STATE(NewState));
830
831 if (NewState != DISABLE)
832 {
833 /* Enable Clock Timeout */
834 I2Cx->TIMEOUTR |= I2C_TIMEOUTR_TIDLE;
835 }
836 else
837 {
838 /* Disable Clock Timeout */
839 I2Cx->TIMEOUTR &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIDLE);
840 }
841 }
842
843 /**
844 * @brief Configures the I2C Bus Timeout A (SCL Timeout when TIDLE = 0 or Bus
845 * idle SCL and SDA high when TIDLE = 1).
846 * @param I2Cx: where x can be 1 to select the I2C peripheral.
847 * @param Timeout: specifies the TimeoutA to be programmed.
848 * @retval None
849 */
I2C_TimeoutAConfig(I2C_TypeDef * I2Cx,uint16_t Timeout)850 void I2C_TimeoutAConfig(I2C_TypeDef* I2Cx, uint16_t Timeout)
851 {
852 uint32_t tmpreg = 0;
853
854 /* Check the parameters */
855 assert_param(IS_I2C_1_PERIPH(I2Cx));
856 assert_param(IS_I2C_TIMEOUT(Timeout));
857
858 /* Get the old register value */
859 tmpreg = I2Cx->TIMEOUTR;
860
861 /* Reset I2Cx TIMEOUTA bit [11:0] */
862 tmpreg &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMEOUTA);
863
864 /* Set I2Cx TIMEOUTA */
865 tmpreg |= (uint32_t)((uint32_t)Timeout & I2C_TIMEOUTR_TIMEOUTA) ;
866
867 /* Store the new register value */
868 I2Cx->TIMEOUTR = tmpreg;
869 }
870
871 /**
872 * @brief Configures the I2C Bus Timeout B (SCL cumulative Timeout).
873 * @param I2Cx: where x can be 1 to select the I2C peripheral.
874 * @param Timeout: specifies the TimeoutB to be programmed.
875 * @retval None
876 */
I2C_TimeoutBConfig(I2C_TypeDef * I2Cx,uint16_t Timeout)877 void I2C_TimeoutBConfig(I2C_TypeDef* I2Cx, uint16_t Timeout)
878 {
879 uint32_t tmpreg = 0;
880
881 /* Check the parameters */
882 assert_param(IS_I2C_1_PERIPH(I2Cx));
883 assert_param(IS_I2C_TIMEOUT(Timeout));
884
885 /* Get the old register value */
886 tmpreg = I2Cx->TIMEOUTR;
887
888 /* Reset I2Cx TIMEOUTB bit [11:0] */
889 tmpreg &= (uint32_t)~((uint32_t)I2C_TIMEOUTR_TIMEOUTB);
890
891 /* Set I2Cx TIMEOUTB */
892 tmpreg |= (uint32_t)(((uint32_t)Timeout << 16) & I2C_TIMEOUTR_TIMEOUTB) ;
893
894 /* Store the new register value */
895 I2Cx->TIMEOUTR = tmpreg;
896 }
897
898 /**
899 * @brief Enables or disables I2C PEC calculation.
900 * @param I2Cx: where x can be 1 to select the I2C peripheral.
901 * @param NewState: new state of the I2Cx PEC calculation.
902 * This parameter can be: ENABLE or DISABLE.
903 * @retval None
904 */
I2C_CalculatePEC(I2C_TypeDef * I2Cx,FunctionalState NewState)905 void I2C_CalculatePEC(I2C_TypeDef* I2Cx, FunctionalState NewState)
906 {
907 /* Check the parameters */
908 assert_param(IS_I2C_1_PERIPH(I2Cx));
909 assert_param(IS_FUNCTIONAL_STATE(NewState));
910
911 if (NewState != DISABLE)
912 {
913 /* Enable PEC calculation */
914 I2Cx->CR1 |= I2C_CR1_PECEN;
915 }
916 else
917 {
918 /* Disable PEC calculation */
919 I2Cx->CR1 &= (uint32_t)~((uint32_t)I2C_CR1_PECEN);
920 }
921 }
922
923 /**
924 * @brief Enables or disables I2C PEC transmission/reception request.
925 * @param I2Cx: where x can be 1 to select the I2C peripheral.
926 * @param NewState: new state of the I2Cx PEC request.
927 * This parameter can be: ENABLE or DISABLE.
928 * @retval None
929 */
I2C_PECRequestCmd(I2C_TypeDef * I2Cx,FunctionalState NewState)930 void I2C_PECRequestCmd(I2C_TypeDef* I2Cx, FunctionalState NewState)
931 {
932 /* Check the parameters */
933 assert_param(IS_I2C_1_PERIPH(I2Cx));
934 assert_param(IS_FUNCTIONAL_STATE(NewState));
935
936 if (NewState != DISABLE)
937 {
938 /* Enable PEC transmission/reception request */
939 I2Cx->CR2 |= I2C_CR2_PECBYTE;
940 }
941 else
942 {
943 /* Disable PEC transmission/reception request */
944 I2Cx->CR2 &= (uint32_t)~((uint32_t)I2C_CR2_PECBYTE);
945 }
946 }
947
948 /**
949 * @brief Returns the I2C PEC.
950 * @param I2Cx: where x can be 1 to select the I2C peripheral.
951 * @retval The value of the PEC .
952 */
I2C_GetPEC(I2C_TypeDef * I2Cx)953 uint8_t I2C_GetPEC(I2C_TypeDef* I2Cx)
954 {
955 /* Check the parameters */
956 assert_param(IS_I2C_1_PERIPH(I2Cx));
957
958 /* Return the slave matched address in the SR1 register */
959 return (uint8_t)((uint32_t)I2Cx->PECR & I2C_PECR_PEC);
960 }
961
962 /**
963 * @}
964 */
965
966
967
968 /**
969 * @brief Reads the specified I2C register and returns its value.
970 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
971 * @param I2C_Register: specifies the register to read.
972 * This parameter can be one of the following values:
973 * @arg I2C_Register_CR1: CR1 register.
974 * @arg I2C_Register_CR2: CR2 register.
975 * @arg I2C_Register_OAR1: OAR1 register.
976 * @arg I2C_Register_OAR2: OAR2 register.
977 * @arg I2C_Register_TIMINGR: TIMING register.
978 * @arg I2C_Register_TIMEOUTR: TIMEOUTR register.
979 * @arg I2C_Register_ISR: ISR register.
980 * @arg I2C_Register_ICR: ICR register.
981 * @arg I2C_Register_PECR: PECR register.
982 * @arg I2C_Register_RXDR: RXDR register.
983 * @arg I2C_Register_TXDR: TXDR register.
984 * @retval The value of the read register.
985 */
I2C_ReadRegister(I2C_TypeDef * I2Cx,uint8_t I2C_Register)986 uint32_t I2C_ReadRegister(I2C_TypeDef* I2Cx, uint8_t I2C_Register)
987 {
988 __IO uint32_t tmp = 0;
989
990 /* Check the parameters */
991 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
992 assert_param(IS_I2C_REGISTER(I2C_Register));
993
994 tmp = (uint32_t)I2Cx;
995 tmp += I2C_Register;
996
997 /* Return the selected register value */
998 return (*(__IO uint32_t *) tmp);
999 }
1000
1001 /**
1002 * @}
1003 */
1004
1005 /**
1006 * @brief Sends a data byte through the I2Cx peripheral.
1007 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1008 * @param Data: Byte to be transmitted..
1009 * @retval None
1010 */
I2C_SendData(I2C_TypeDef * I2Cx,uint8_t Data)1011 void I2C_SendData(I2C_TypeDef* I2Cx, uint8_t Data)
1012 {
1013 /* Check the parameters */
1014 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1015
1016 /* Write in the DR register the data to be sent */
1017 I2Cx->TXDR = (uint8_t)Data;
1018 }
1019
1020 /**
1021 * @brief Returns the most recent received data by the I2Cx peripheral.
1022 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1023 * @retval The value of the received data.
1024 */
I2C_ReceiveData(I2C_TypeDef * I2Cx)1025 uint8_t I2C_ReceiveData(I2C_TypeDef* I2Cx)
1026 {
1027 /* Check the parameters */
1028 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1029
1030 /* Return the data in the DR register */
1031 return (uint8_t)I2Cx->RXDR;
1032 }
1033
1034 /**
1035 * @}
1036 */
1037
1038 /**
1039 * @brief Enables or disables the I2C DMA interface.
1040 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1041 * @param I2C_DMAReq: specifies the I2C DMA transfer request to be enabled or disabled.
1042 * This parameter can be any combination of the following values:
1043 * @arg I2C_DMAReq_Tx: Tx DMA transfer request
1044 * @arg I2C_DMAReq_Rx: Rx DMA transfer request
1045 * @param NewState: new state of the selected I2C DMA transfer request.
1046 * This parameter can be: ENABLE or DISABLE.
1047 * @retval None
1048 */
I2C_DMACmd(I2C_TypeDef * I2Cx,uint32_t I2C_DMAReq,FunctionalState NewState)1049 void I2C_DMACmd(I2C_TypeDef* I2Cx, uint32_t I2C_DMAReq, FunctionalState NewState)
1050 {
1051 /* Check the parameters */
1052 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1053 assert_param(IS_FUNCTIONAL_STATE(NewState));
1054 assert_param(IS_I2C_DMA_REQ(I2C_DMAReq));
1055
1056 if (NewState != DISABLE)
1057 {
1058 /* Enable the selected I2C DMA requests */
1059 I2Cx->CR1 |= I2C_DMAReq;
1060 }
1061 else
1062 {
1063 /* Disable the selected I2C DMA requests */
1064 I2Cx->CR1 &= (uint32_t)~I2C_DMAReq;
1065 }
1066 }
1067 /**
1068 * @}
1069 */
1070 /**
1071 * @brief Checks whether the specified I2C flag is set or not.
1072 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1073 * @param I2C_FLAG: specifies the flag to check.
1074 * This parameter can be one of the following values:
1075 * @arg I2C_FLAG_TXE: Transmit data register empty
1076 * @arg I2C_FLAG_TXIS: Transmit interrupt status
1077 * @arg I2C_FLAG_RXNE: Receive data register not empty
1078 * @arg I2C_FLAG_ADDR: Address matched (slave mode)
1079 * @arg I2C_FLAG_NACKF: NACK received flag
1080 * @arg I2C_FLAG_STOPF: STOP detection flag
1081 * @arg I2C_FLAG_TC: Transfer complete (master mode)
1082 * @arg I2C_FLAG_TCR: Transfer complete reload
1083 * @arg I2C_FLAG_BERR: Bus error
1084 * @arg I2C_FLAG_ARLO: Arbitration lost
1085 * @arg I2C_FLAG_OVR: Overrun/Underrun
1086 * @arg I2C_FLAG_PECERR: PEC error in reception
1087 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
1088 * @arg I2C_FLAG_ALERT: SMBus Alert
1089 * @arg I2C_FLAG_BUSY: Bus busy
1090 * @retval The new state of I2C_FLAG (SET or RESET).
1091 */
I2C_GetFlagStatus(I2C_TypeDef * I2Cx,uint32_t I2C_FLAG)1092 FlagStatus I2C_GetFlagStatus(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
1093 {
1094 uint32_t tmpreg = 0;
1095 FlagStatus bitstatus = RESET;
1096
1097 /* Check the parameters */
1098 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1099 assert_param(IS_I2C_GET_FLAG(I2C_FLAG));
1100
1101 /* Get the ISR register value */
1102 tmpreg = I2Cx->ISR;
1103
1104 /* Get flag status */
1105 tmpreg &= I2C_FLAG;
1106
1107 if(tmpreg != 0)
1108 {
1109 /* I2C_FLAG is set */
1110 bitstatus = SET;
1111 }
1112 else
1113 {
1114 /* I2C_FLAG is reset */
1115 bitstatus = RESET;
1116 }
1117 return bitstatus;
1118 }
1119
1120 /**
1121 * @brief Clears the I2Cx's pending flags.
1122 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1123 * @param I2C_FLAG: specifies the flag to clear.
1124 * This parameter can be any combination of the following values:
1125 * @arg I2C_FLAG_ADDR: Address matched (slave mode)
1126 * @arg I2C_FLAG_NACKF: NACK received flag
1127 * @arg I2C_FLAG_STOPF: STOP detection flag
1128 * @arg I2C_FLAG_BERR: Bus error
1129 * @arg I2C_FLAG_ARLO: Arbitration lost
1130 * @arg I2C_FLAG_OVR: Overrun/Underrun
1131 * @arg I2C_FLAG_PECERR: PEC error in reception
1132 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow detection flag
1133 * @arg I2C_FLAG_ALERT: SMBus Alert
1134 * @retval The new state of I2C_FLAG (SET or RESET).
1135 */
I2C_ClearFlag(I2C_TypeDef * I2Cx,uint32_t I2C_FLAG)1136 void I2C_ClearFlag(I2C_TypeDef* I2Cx, uint32_t I2C_FLAG)
1137 {
1138 /* Check the parameters */
1139 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1140 assert_param(IS_I2C_CLEAR_FLAG(I2C_FLAG));
1141
1142 /* Clear the selected flag */
1143 I2Cx->ICR = I2C_FLAG;
1144 }
1145
1146 /**
1147 * @brief Checks whether the specified I2C interrupt has occurred or not.
1148 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1149 * @param I2C_IT: specifies the interrupt source to check.
1150 * This parameter can be one of the following values:
1151 * @arg I2C_IT_TXIS: Transmit interrupt status
1152 * @arg I2C_IT_RXNE: Receive data register not empty
1153 * @arg I2C_IT_ADDR: Address matched (slave mode)
1154 * @arg I2C_IT_NACKF: NACK received flag
1155 * @arg I2C_IT_STOPF: STOP detection flag
1156 * @arg I2C_IT_TC: Transfer complete (master mode)
1157 * @arg I2C_IT_TCR: Transfer complete reload
1158 * @arg I2C_IT_BERR: Bus error
1159 * @arg I2C_IT_ARLO: Arbitration lost
1160 * @arg I2C_IT_OVR: Overrun/Underrun
1161 * @arg I2C_IT_PECERR: PEC error in reception
1162 * @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag
1163 * @arg I2C_IT_ALERT: SMBus Alert
1164 * @retval The new state of I2C_IT (SET or RESET).
1165 */
I2C_GetITStatus(I2C_TypeDef * I2Cx,uint32_t I2C_IT)1166 ITStatus I2C_GetITStatus(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
1167 {
1168 uint32_t tmpreg = 0;
1169 ITStatus bitstatus = RESET;
1170 uint32_t enablestatus = 0;
1171
1172 /* Check the parameters */
1173 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1174 assert_param(IS_I2C_GET_IT(I2C_IT));
1175
1176 /* Check if the interrupt source is enabled or not */
1177 /* If Error interrupt */
1178 if ((uint32_t)(I2C_IT & ERROR_IT_MASK))
1179 {
1180 enablestatus = (uint32_t)((I2C_CR1_ERRIE) & (I2Cx->CR1));
1181 }
1182 /* If TC interrupt */
1183 else if ((uint32_t)(I2C_IT & TC_IT_MASK))
1184 {
1185 enablestatus = (uint32_t)((I2C_CR1_TCIE) & (I2Cx->CR1));
1186 }
1187 else
1188 {
1189 enablestatus = (uint32_t)((I2C_IT) & (I2Cx->CR1));
1190 }
1191
1192 /* Get the ISR register value */
1193 tmpreg = I2Cx->ISR;
1194
1195 /* Get flag status */
1196 tmpreg &= I2C_IT;
1197
1198 /* Check the status of the specified I2C flag */
1199 if((tmpreg != RESET) && enablestatus)
1200 {
1201 /* I2C_IT is set */
1202 bitstatus = SET;
1203 }
1204 else
1205 {
1206 /* I2C_IT is reset */
1207 bitstatus = RESET;
1208 }
1209
1210 /* Return the I2C_IT status */
1211 return bitstatus;
1212 }
1213
1214 /**
1215 * @brief Clears the I2Cx's interrupt pending bits.
1216 * @param I2Cx: where x can be 1 or 2 to select the I2C peripheral.
1217 * @param I2C_IT: specifies the interrupt pending bit to clear.
1218 * This parameter can be any combination of the following values:
1219 * @arg I2C_IT_ADDR: Address matched (slave mode)
1220 * @arg I2C_IT_NACKF: NACK received flag
1221 * @arg I2C_IT_STOPF: STOP detection flag
1222 * @arg I2C_IT_BERR: Bus error
1223 * @arg I2C_IT_ARLO: Arbitration lost
1224 * @arg I2C_IT_OVR: Overrun/Underrun
1225 * @arg I2C_IT_PECERR: PEC error in reception
1226 * @arg I2C_IT_TIMEOUT: Timeout or Tlow detection flag
1227 * @arg I2C_IT_ALERT: SMBus Alert
1228 * @retval The new state of I2C_IT (SET or RESET).
1229 */
I2C_ClearITPendingBit(I2C_TypeDef * I2Cx,uint32_t I2C_IT)1230 void I2C_ClearITPendingBit(I2C_TypeDef* I2Cx, uint32_t I2C_IT)
1231 {
1232 /* Check the parameters */
1233 assert_param(IS_I2C_ALL_PERIPH(I2Cx));
1234 assert_param(IS_I2C_CLEAR_IT(I2C_IT));
1235
1236 /* Clear the selected flag */
1237 I2Cx->ICR = I2C_IT;
1238 }
1239
1240 /**
1241 * @}
1242 */
1243
1244 /**
1245 * @}
1246 */
1247
1248 /**
1249 * @}
1250 */
1251
1252 /**
1253 * @}
1254 */
1255
1256 /************************ (C) COPYRIGHT FMD *****END OF FILE****/
1257