1<?xml version="1.0" encoding="UTF-8" standalone="no" ?> 2<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd"> 3 4 <SchemaVersion>2.1</SchemaVersion> 5 6 <Header>### uVision Project, (C) Keil Software</Header> 7 8 <Targets> 9 <Target> 10 <TargetName>rt-thread</TargetName> 11 <ToolsetNumber>0x4</ToolsetNumber> 12 <ToolsetName>ARM-ADS</ToolsetName> 13 <uAC6>0</uAC6> 14 <TargetOption> 15 <TargetCommonOption> 16 <Device>GD32F205RC</Device> 17 <Vendor>GigaDevice</Vendor> 18 <PackID>GigaDevice.GD32F20x_DFP.2.2.0</PackID> 19 <PackURL>http://gd32mcu.com/data/documents/pack/</PackURL> 20 <Cpu>IRAM(0x20000000,0x020000) IROM(0x08000000,0x040000) CPUTYPE("Cortex-M3") CLOCK(25000000) ELITTLE</Cpu> 21 <FlashUtilSpec></FlashUtilSpec> 22 <StartupFile></StartupFile> 23 <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC800 -FN1 -FF0GD32F20x_CL -FS08000000 -FL040000 -FP0($$Device:GD32F205RC$Flash\GD32F20x_CL.FLM))</FlashDriverDll> 24 <DeviceId>0</DeviceId> 25 <RegisterFile>$$Device:GD32F205RC$Device\Include\gd32f20x.h</RegisterFile> 26 <MemoryEnv></MemoryEnv> 27 <Cmp></Cmp> 28 <Asm></Asm> 29 <Linker></Linker> 30 <OHString></OHString> 31 <InfinionOptionDll></InfinionOptionDll> 32 <SLE66CMisc></SLE66CMisc> 33 <SLE66AMisc></SLE66AMisc> 34 <SLE66LinkerMisc></SLE66LinkerMisc> 35 <SFDFile>$$Device:GD32F205RC$SVD\GD32F20x_CL.svd</SFDFile> 36 <bCustSvd>0</bCustSvd> 37 <UseEnv>0</UseEnv> 38 <BinPath></BinPath> 39 <IncludePath></IncludePath> 40 <LibPath></LibPath> 41 <RegisterFilePath></RegisterFilePath> 42 <DBRegisterFilePath></DBRegisterFilePath> 43 <TargetStatus> 44 <Error>0</Error> 45 <ExitCodeStop>0</ExitCodeStop> 46 <ButtonStop>0</ButtonStop> 47 <NotGenerated>0</NotGenerated> 48 <InvalidFlash>1</InvalidFlash> 49 </TargetStatus> 50 <OutputDirectory>.\build\</OutputDirectory> 51 <OutputName>rtthread</OutputName> 52 <CreateExecutable>1</CreateExecutable> 53 <CreateLib>0</CreateLib> 54 <CreateHexFile>0</CreateHexFile> 55 <DebugInformation>1</DebugInformation> 56 <BrowseInformation>0</BrowseInformation> 57 <ListingPath>.\build\</ListingPath> 58 <HexFormatSelection>1</HexFormatSelection> 59 <Merge32K>0</Merge32K> 60 <CreateBatchFile>0</CreateBatchFile> 61 <BeforeCompile> 62 <RunUserProg1>0</RunUserProg1> 63 <RunUserProg2>0</RunUserProg2> 64 <UserProg1Name></UserProg1Name> 65 <UserProg2Name></UserProg2Name> 66 <UserProg1Dos16Mode>0</UserProg1Dos16Mode> 67 <UserProg2Dos16Mode>0</UserProg2Dos16Mode> 68 <nStopU1X>0</nStopU1X> 69 <nStopU2X>0</nStopU2X> 70 </BeforeCompile> 71 <BeforeMake> 72 <RunUserProg1>0</RunUserProg1> 73 <RunUserProg2>0</RunUserProg2> 74 <UserProg1Name></UserProg1Name> 75 <UserProg2Name></UserProg2Name> 76 <UserProg1Dos16Mode>0</UserProg1Dos16Mode> 77 <UserProg2Dos16Mode>0</UserProg2Dos16Mode> 78 <nStopB1X>0</nStopB1X> 79 <nStopB2X>0</nStopB2X> 80 </BeforeMake> 81 <AfterMake> 82 <RunUserProg1>1</RunUserProg1> 83 <RunUserProg2>0</RunUserProg2> 84 <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name> 85 <UserProg2Name></UserProg2Name> 86 <UserProg1Dos16Mode>0</UserProg1Dos16Mode> 87 <UserProg2Dos16Mode>0</UserProg2Dos16Mode> 88 <nStopA1X>0</nStopA1X> 89 <nStopA2X>0</nStopA2X> 90 </AfterMake> 91 <SelectedForBatchBuild>0</SelectedForBatchBuild> 92 <SVCSIdString></SVCSIdString> 93 </TargetCommonOption> 94 <CommonProperty> 95 <UseCPPCompiler>0</UseCPPCompiler> 96 <RVCTCodeConst>0</RVCTCodeConst> 97 <RVCTZI>0</RVCTZI> 98 <RVCTOtherData>0</RVCTOtherData> 99 <ModuleSelection>0</ModuleSelection> 100 <IncludeInBuild>1</IncludeInBuild> 101 <AlwaysBuild>0</AlwaysBuild> 102 <GenerateAssemblyFile>0</GenerateAssemblyFile> 103 <AssembleAssemblyFile>0</AssembleAssemblyFile> 104 <PublicsOnly>0</PublicsOnly> 105 <StopOnExitCode>3</StopOnExitCode> 106 <CustomArgument></CustomArgument> 107 <IncludeLibraryModules></IncludeLibraryModules> 108 <ComprImg>1</ComprImg> 109 </CommonProperty> 110 <DllOption> 111 <SimDllName>SARMCM3.DLL</SimDllName> 112 <SimDllArguments> -REMAP</SimDllArguments> 113 <SimDlgDll>DCM.DLL</SimDlgDll> 114 <SimDlgDllArguments>-pCM3</SimDlgDllArguments> 115 <TargetDllName>SARMCM3.DLL</TargetDllName> 116 <TargetDllArguments></TargetDllArguments> 117 <TargetDlgDll>TCM.DLL</TargetDlgDll> 118 <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> 119 </DllOption> 120 <DebugOption> 121 <OPTHX> 122 <HexSelection>1</HexSelection> 123 <HexRangeLowAddress>0</HexRangeLowAddress> 124 <HexRangeHighAddress>0</HexRangeHighAddress> 125 <HexOffset>0</HexOffset> 126 <Oh166RecLen>16</Oh166RecLen> 127 </OPTHX> 128 </DebugOption> 129 <Utilities> 130 <Flash1> 131 <UseTargetDll>1</UseTargetDll> 132 <UseExternalTool>0</UseExternalTool> 133 <RunIndependent>0</RunIndependent> 134 <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> 135 <Capability>1</Capability> 136 <DriverSelection>4096</DriverSelection> 137 </Flash1> 138 <bUseTDR>1</bUseTDR> 139 <Flash2>BIN\UL2CM3.DLL</Flash2> 140 <Flash3></Flash3> 141 <Flash4></Flash4> 142 <pFcarmOut></pFcarmOut> 143 <pFcarmGrp></pFcarmGrp> 144 <pFcArmRoot></pFcArmRoot> 145 <FcArmLst>0</FcArmLst> 146 </Utilities> 147 <TargetArmAds> 148 <ArmAdsMisc> 149 <GenerateListings>0</GenerateListings> 150 <asHll>1</asHll> 151 <asAsm>1</asAsm> 152 <asMacX>1</asMacX> 153 <asSyms>1</asSyms> 154 <asFals>1</asFals> 155 <asDbgD>1</asDbgD> 156 <asForm>1</asForm> 157 <ldLst>0</ldLst> 158 <ldmm>1</ldmm> 159 <ldXref>1</ldXref> 160 <BigEnd>0</BigEnd> 161 <AdsALst>1</AdsALst> 162 <AdsACrf>1</AdsACrf> 163 <AdsANop>0</AdsANop> 164 <AdsANot>0</AdsANot> 165 <AdsLLst>1</AdsLLst> 166 <AdsLmap>1</AdsLmap> 167 <AdsLcgr>1</AdsLcgr> 168 <AdsLsym>1</AdsLsym> 169 <AdsLszi>1</AdsLszi> 170 <AdsLtoi>1</AdsLtoi> 171 <AdsLsun>1</AdsLsun> 172 <AdsLven>1</AdsLven> 173 <AdsLsxf>1</AdsLsxf> 174 <RvctClst>0</RvctClst> 175 <GenPPlst>0</GenPPlst> 176 <AdsCpuType>"Cortex-M3"</AdsCpuType> 177 <RvctDeviceName></RvctDeviceName> 178 <mOS>0</mOS> 179 <uocRom>0</uocRom> 180 <uocRam>0</uocRam> 181 <hadIROM>1</hadIROM> 182 <hadIRAM>1</hadIRAM> 183 <hadXRAM>0</hadXRAM> 184 <uocXRam>0</uocXRam> 185 <RvdsVP>0</RvdsVP> 186 <RvdsMve>0</RvdsMve> 187 <RvdsCdeCp>0</RvdsCdeCp> 188 <hadIRAM2>0</hadIRAM2> 189 <hadIROM2>0</hadIROM2> 190 <StupSel>8</StupSel> 191 <useUlib>0</useUlib> 192 <EndSel>0</EndSel> 193 <uLtcg>0</uLtcg> 194 <nSecure>0</nSecure> 195 <RoSelD>3</RoSelD> 196 <RwSelD>3</RwSelD> 197 <CodeSel>0</CodeSel> 198 <OptFeed>0</OptFeed> 199 <NoZi1>0</NoZi1> 200 <NoZi2>0</NoZi2> 201 <NoZi3>0</NoZi3> 202 <NoZi4>0</NoZi4> 203 <NoZi5>0</NoZi5> 204 <Ro1Chk>0</Ro1Chk> 205 <Ro2Chk>0</Ro2Chk> 206 <Ro3Chk>0</Ro3Chk> 207 <Ir1Chk>1</Ir1Chk> 208 <Ir2Chk>0</Ir2Chk> 209 <Ra1Chk>0</Ra1Chk> 210 <Ra2Chk>0</Ra2Chk> 211 <Ra3Chk>0</Ra3Chk> 212 <Im1Chk>1</Im1Chk> 213 <Im2Chk>0</Im2Chk> 214 <OnChipMemories> 215 <Ocm1> 216 <Type>0</Type> 217 <StartAddress>0x0</StartAddress> 218 <Size>0x0</Size> 219 </Ocm1> 220 <Ocm2> 221 <Type>0</Type> 222 <StartAddress>0x0</StartAddress> 223 <Size>0x0</Size> 224 </Ocm2> 225 <Ocm3> 226 <Type>0</Type> 227 <StartAddress>0x0</StartAddress> 228 <Size>0x0</Size> 229 </Ocm3> 230 <Ocm4> 231 <Type>0</Type> 232 <StartAddress>0x0</StartAddress> 233 <Size>0x0</Size> 234 </Ocm4> 235 <Ocm5> 236 <Type>0</Type> 237 <StartAddress>0x0</StartAddress> 238 <Size>0x0</Size> 239 </Ocm5> 240 <Ocm6> 241 <Type>0</Type> 242 <StartAddress>0x0</StartAddress> 243 <Size>0x0</Size> 244 </Ocm6> 245 <IRAM> 246 <Type>0</Type> 247 <StartAddress>0x20000000</StartAddress> 248 <Size>0x20000</Size> 249 </IRAM> 250 <IROM> 251 <Type>1</Type> 252 <StartAddress>0x8000000</StartAddress> 253 <Size>0x40000</Size> 254 </IROM> 255 <XRAM> 256 <Type>0</Type> 257 <StartAddress>0x0</StartAddress> 258 <Size>0x0</Size> 259 </XRAM> 260 <OCR_RVCT1> 261 <Type>1</Type> 262 <StartAddress>0x0</StartAddress> 263 <Size>0x0</Size> 264 </OCR_RVCT1> 265 <OCR_RVCT2> 266 <Type>1</Type> 267 <StartAddress>0x0</StartAddress> 268 <Size>0x0</Size> 269 </OCR_RVCT2> 270 <OCR_RVCT3> 271 <Type>1</Type> 272 <StartAddress>0x0</StartAddress> 273 <Size>0x0</Size> 274 </OCR_RVCT3> 275 <OCR_RVCT4> 276 <Type>1</Type> 277 <StartAddress>0x8000000</StartAddress> 278 <Size>0x40000</Size> 279 </OCR_RVCT4> 280 <OCR_RVCT5> 281 <Type>1</Type> 282 <StartAddress>0x0</StartAddress> 283 <Size>0x0</Size> 284 </OCR_RVCT5> 285 <OCR_RVCT6> 286 <Type>0</Type> 287 <StartAddress>0x0</StartAddress> 288 <Size>0x0</Size> 289 </OCR_RVCT6> 290 <OCR_RVCT7> 291 <Type>0</Type> 292 <StartAddress>0x0</StartAddress> 293 <Size>0x0</Size> 294 </OCR_RVCT7> 295 <OCR_RVCT8> 296 <Type>0</Type> 297 <StartAddress>0x0</StartAddress> 298 <Size>0x0</Size> 299 </OCR_RVCT8> 300 <OCR_RVCT9> 301 <Type>0</Type> 302 <StartAddress>0x20000000</StartAddress> 303 <Size>0x20000</Size> 304 </OCR_RVCT9> 305 <OCR_RVCT10> 306 <Type>0</Type> 307 <StartAddress>0x0</StartAddress> 308 <Size>0x0</Size> 309 </OCR_RVCT10> 310 </OnChipMemories> 311 <RvctStartVector></RvctStartVector> 312 </ArmAdsMisc> 313 <Cads> 314 <interw>1</interw> 315 <Optim>4</Optim> 316 <oTime>0</oTime> 317 <SplitLS>0</SplitLS> 318 <OneElfS>0</OneElfS> 319 <Strict>0</Strict> 320 <EnumInt>0</EnumInt> 321 <PlainCh>0</PlainCh> 322 <Ropi>0</Ropi> 323 <Rwpi>0</Rwpi> 324 <wLevel>0</wLevel> 325 <uThumb>0</uThumb> 326 <uSurpInc>0</uSurpInc> 327 <uC99>1</uC99> 328 <uGnu>0</uGnu> 329 <useXO>0</useXO> 330 <v6Lang>1</v6Lang> 331 <v6LangP>1</v6LangP> 332 <vShortEn>1</vShortEn> 333 <vShortWch>1</vShortWch> 334 <v6Lto>0</v6Lto> 335 <v6WtE>0</v6WtE> 336 <v6Rtti>0</v6Rtti> 337 <VariousControls> 338 <MiscControls></MiscControls> 339 <Define></Define> 340 <Undefine></Undefine> 341 <IncludePath></IncludePath> 342 </VariousControls> 343 </Cads> 344 <Aads> 345 <interw>1</interw> 346 <Ropi>0</Ropi> 347 <Rwpi>0</Rwpi> 348 <thumb>0</thumb> 349 <SplitLS>0</SplitLS> 350 <SwStkChk>0</SwStkChk> 351 <NoWarn>0</NoWarn> 352 <uSurpInc>0</uSurpInc> 353 <useXO>0</useXO> 354 <ClangAsOpt>4</ClangAsOpt> 355 <VariousControls> 356 <MiscControls></MiscControls> 357 <Define></Define> 358 <Undefine></Undefine> 359 <IncludePath></IncludePath> 360 </VariousControls> 361 </Aads> 362 <LDads> 363 <umfTarg>1</umfTarg> 364 <Ropi>0</Ropi> 365 <Rwpi>0</Rwpi> 366 <noStLib>0</noStLib> 367 <RepFail>1</RepFail> 368 <useFile>0</useFile> 369 <TextAddressRange>0x08000000</TextAddressRange> 370 <DataAddressRange>0x20000000</DataAddressRange> 371 <pXoBase></pXoBase> 372 <ScatterFile>.\gd32_rom.ld</ScatterFile> 373 <IncludeLibs></IncludeLibs> 374 <IncludeLibsPath></IncludeLibsPath> 375 <Misc></Misc> 376 <LinkerInputFile></LinkerInputFile> 377 <DisabledWarnings></DisabledWarnings> 378 </LDads> 379 </TargetArmAds> 380 </TargetOption> 381 <Groups> 382 <Group> 383 <GroupName>::CMSIS</GroupName> 384 </Group> 385 </Groups> 386 </Target> 387 </Targets> 388 389 <RTE> 390 <apis/> 391 <components> 392 <component Cclass="CMSIS" Cgroup="CORE" Cvendor="ARM" Cversion="5.4.0" condition="ARMv6_7_8-M Device"> 393 <package name="CMSIS" schemaVersion="1.3" url="http://www.keil.com/pack/" vendor="ARM" version="5.7.0"/> 394 <targetInfos> 395 <targetInfo name="rt-thread"/> 396 </targetInfos> 397 </component> 398 </components> 399 <files/> 400 </RTE> 401 402 <LayerInfo> 403 <Layers> 404 <Layer> 405 <LayName><Project Info></LayName> 406 <LayDesc></LayDesc> 407 <LayUrl></LayUrl> 408 <LayKeys></LayKeys> 409 <LayCat></LayCat> 410 <LayLic></LayLic> 411 <LayTarg>0</LayTarg> 412 <LayPrjMark>1</LayPrjMark> 413 </Layer> 414 </Layers> 415 </LayerInfo> 416 417</Project> 418