1 /* 2 * Copyright (c) 2006-2025, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2021-08-20 BruceOu first implementation 9 */ 10 11 #ifndef __DRV_USART_H__ 12 #define __DRV_USART_H__ 13 14 #include <rthw.h> 15 #include <rtthread.h> 16 #include <board.h> 17 18 #ifdef __cplusplus 19 extern "C" { 20 #endif 21 22 #define UART_ENABLE_IRQ(n) NVIC_EnableIRQ((n)) 23 #define UART_DISABLE_IRQ(n) NVIC_DisableIRQ((n)) 24 25 26 /* GD32 uart driver */ 27 /* Todo: compress uart info */ 28 struct gd32_uart 29 { 30 uint32_t uart_periph; /* Todo: 3bits */ 31 IRQn_Type irqn; /* Todo: 7bits */ 32 rcu_periph_enum per_clk; /* Todo: 5bits */ 33 rcu_periph_enum tx_gpio_clk; /* Todo: 5bits */ 34 rcu_periph_enum rx_gpio_clk; /* Todo: 5bits */ 35 uint32_t tx_port; /* Todo: 4bits */ 36 #if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32H7xx || defined SOC_SERIES_GD32F5xx || defined SOC_SERIES_GD32E23x 37 uint16_t tx_af; /* Todo: 4bits */ 38 #elif defined SOC_SERIES_GD32E50x 39 uint32_t tx_af; /* alternate1 cfg */ 40 #endif 41 uint16_t tx_pin; /* Todo: 4bits */ 42 uint32_t rx_port; /* Todo: 4bits */ 43 #if defined SOC_SERIES_GD32F4xx || defined SOC_SERIES_GD32H7xx || defined SOC_SERIES_GD32F5xx || defined SOC_SERIES_GD32E23x 44 uint16_t rx_af; /* Todo: 4bits */ 45 #elif defined SOC_SERIES_GD32E50x 46 uint32_t rx_af; /* alternate1 cfg */ 47 #endif 48 uint16_t rx_pin; /* Todo: 4bits */ 49 #if defined SOC_SERIES_GD32E50x 50 uint32_t uart_remap; /* remap */ 51 #endif 52 53 struct rt_serial_device * serial; 54 char *device_name; 55 }; 56 57 int rt_hw_usart_init(void); 58 59 #ifdef __cplusplus 60 } 61 #endif 62 63 #endif /* __DRV_USART_H__ */ 64 65