1 /* 2 * Copyright (c) 2006-2022, RT-Thread Development Team 3 * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd. 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 * 7 * Change Logs: 8 * Date Author Notes 9 * 2024-02-20 CDT first version 10 */ 11 12 #ifndef __MCAN_CONFIG_H__ 13 #define __MCAN_CONFIG_H__ 14 15 #include <rtthread.h> 16 #include "irq_config.h" 17 18 #ifdef __cplusplus 19 extern "C" { 20 #endif 21 22 /***********************************************************************************************/ 23 /***********************************************************************************************/ 24 /* The default configuration for MCANs. Users can modify the configurations based on the application. 25 For the message RAM: 26 1. MCAN1 and MCAN2 share 2048 bytes message RAM 27 2. User can modify the definitions of filter number, Rx FIFO number, Tx FIFO number. 28 3. MCAN has two configurable Receive FIFOs, Rx FIFO0 and Rx FIFO1. There use Rx FIFO0 only by default. 29 If only one FIFO is needed, use Rx FIFO0. If Rx FIFO1 is needed, define it's macro between 1 and 64, 30 and pay attention the total size of meesage RAM that to be allocated. 31 */ 32 33 #ifdef RT_CAN_USING_CANFD 34 #define MCAN_FD_SEL MCAN_FD_ISO_FD_BRS 35 #define MCAN_TOTAL_FILTER_NUM (26U) 36 #define MCAN_STD_FILTER_NUM (13U) /* Each standard filter element size is 4 bytes */ 37 #define MCAN_EXT_FILTER_NUM (13U) /* Each extended filter element size is 8 bytes */ 38 #define MCAN_TX_FIFO_NUM (6U) 39 #define MCAN_RX_FIFO_NUM (6U) 40 #define MCAN_DATA_FIELD_SIZE (MCAN_DATA_SIZE_64BYTE) /* Each FIFO element size is 64+8 bytes */ 41 #else 42 #define MCAN_FD_SEL MCAN_FD_CLASSICAL 43 #define MCAN_TOTAL_FILTER_NUM (32U) 44 #define MCAN_STD_FILTER_NUM (16U) /* Each standard filter element size is 4 bytes */ 45 #define MCAN_EXT_FILTER_NUM (16U) /* Each extended filter element size is 8 bytes */ 46 #define MCAN_TX_FIFO_NUM (26U) 47 #define MCAN_RX_FIFO_NUM (26U) 48 #define MCAN_DATA_FIELD_SIZE (MCAN_DATA_SIZE_8BYTE) /* Each FIFO element size is 8+8 bytes */ 49 #endif 50 51 #ifdef BSP_USING_MCAN1 52 #define MCAN1_NAME ("mcan1") 53 #define MCAN1_WORK_MODE (RT_CAN_MODE_NORMAL) 54 #define MCAN1_TX_PRIV_MODE RT_CAN_MODE_NOPRIV /* RT_CAN_MODE_NOPRIV: Tx FIFO mode; RT_CAN_MODE_PRIV: Tx priority mode */ 55 56 #define MCAN1_FD_SEL MCAN_FD_SEL 57 58 #define MCAN1_STD_FILTER_NUM MCAN_STD_FILTER_NUM 59 #define MCAN1_EXT_FILTER_NUM MCAN_EXT_FILTER_NUM 60 61 #define MCAN1_RX_FIFO0_NUM MCAN_RX_FIFO_NUM 62 #define MCAN1_RX_FIFO0_DATA_FIELD_SIZE MCAN_DATA_FIELD_SIZE 63 64 #define MCAN1_TX_FIFO_NUM MCAN_TX_FIFO_NUM 65 #define MCAN1_TX_FIFO_DATA_FIELD_SIZE MCAN_DATA_FIELD_SIZE 66 #define MCAN1_TX_NOTIFICATION_BUF ((1UL << MCAN1_TX_FIFO_NUM) - 1U) 67 #endif /* BSP_USING_MCAN1 */ 68 69 #ifdef BSP_USING_MCAN2 70 #define MCAN2_NAME ("mcan2") 71 #define MCAN2_WORK_MODE (RT_CAN_MODE_NORMAL) 72 #define MCAN2_TX_PRIV_MODE RT_CAN_MODE_NOPRIV /* RT_CAN_MODE_NOPRIV: Tx FIFO mode; RT_CAN_MODE_PRIV: Tx priority mode */ 73 74 #define MCAN2_FD_SEL MCAN_FD_SEL 75 #define MCAN2_STD_FILTER_NUM MCAN_STD_FILTER_NUM 76 #define MCAN2_EXT_FILTER_NUM MCAN_EXT_FILTER_NUM 77 78 #define MCAN2_RX_FIFO0_NUM MCAN_RX_FIFO_NUM 79 #define MCAN2_RX_FIFO0_DATA_FIELD_SIZE MCAN_DATA_FIELD_SIZE 80 81 #define MCAN2_TX_FIFO_NUM MCAN_TX_FIFO_NUM 82 #define MCAN2_TX_FIFO_DATA_FIELD_SIZE MCAN_DATA_FIELD_SIZE 83 #define MCAN2_TX_NOTIFICATION_BUF ((1UL << MCAN2_TX_FIFO_NUM) - 1U) 84 #endif /* BSP_USING_MCAN2 */ 85 86 /***********************************************************************************************/ 87 /***********************************************************************************************/ 88 89 /* 90 Bit rate configuration examples for CAN FD. 91 Nominal bit rate for CAN FD arbitration phase and data bit rate for CAN FD data phase. 92 BitRate(bps) = MCANClock(Hz) / (Prescaler * (TimeSeg1 + TimeSeg2)) 93 SamplePoint(%) = TimeSeg1 / (TimeSeg1 + TimeSeg2) 94 eg. 95 BitRate(bps) = 40000000(Hz) / (2 * (16 + 4)) = 1000000 = 1M(bps) 96 SamplePoint(%) = 16 / (16 + 4) = 80% 97 The following bit rate configurations are based on the max MCAN Clock(40MHz). 98 NOTE: 99 1. It is better to limit u32NominalPrescaler and u32DataPrescaler between 1 and 2. 100 1. The unit of u32SspOffset is MCANClock. 101 2. For the corresponding function of u32TdcFilter, please refer to the reference manual for details(TDCR.TDCF). 102 The u32TdcFilter can be get from PSR.TDCV. 103 */ 104 #define MCAN_FD_CFG_500K_1M \ 105 { \ 106 .u32NominalPrescaler = 1, \ 107 .u32NominalTimeSeg1 = 64, \ 108 .u32NominalTimeSeg2 = 16, \ 109 .u32NominalSyncJumpWidth = 16, \ 110 .u32DataPrescaler = 1, \ 111 .u32DataTimeSeg1 = 32, \ 112 .u32DataTimeSeg2 = 8, \ 113 .u32DataSyncJumpWidth = 8, \ 114 .u32TDC = MCAN_FD_TDC_ENABLE, \ 115 .u32SspOffset = 32, \ 116 .u32TdcFilter = 32 + 1, \ 117 } 118 119 #define MCAN_FD_CFG_500K_2M \ 120 { \ 121 .u32NominalPrescaler = 1, \ 122 .u32NominalTimeSeg1 = 64, \ 123 .u32NominalTimeSeg2 = 16, \ 124 .u32NominalSyncJumpWidth = 16, \ 125 .u32DataPrescaler = 1, \ 126 .u32DataTimeSeg1 = 16, \ 127 .u32DataTimeSeg2 = 4, \ 128 .u32DataSyncJumpWidth = 4, \ 129 .u32TDC = MCAN_FD_TDC_ENABLE, \ 130 .u32SspOffset = 16, \ 131 .u32TdcFilter = 16 + 1, \ 132 } 133 134 #define MCAN_FD_CFG_500K_4M \ 135 { \ 136 .u32NominalPrescaler = 1, \ 137 .u32NominalTimeSeg1 = 64, \ 138 .u32NominalTimeSeg2 = 16, \ 139 .u32NominalSyncJumpWidth = 16, \ 140 .u32DataPrescaler = 1, \ 141 .u32DataTimeSeg1 = 8, \ 142 .u32DataTimeSeg2 = 2, \ 143 .u32DataSyncJumpWidth = 2, \ 144 .u32TDC = MCAN_FD_TDC_ENABLE, \ 145 .u32SspOffset = 8, \ 146 .u32TdcFilter = 8 + 1, \ 147 } 148 149 #define MCAN_FD_CFG_500K_5M \ 150 { \ 151 .u32NominalPrescaler = 1, \ 152 .u32NominalTimeSeg1 = 64, \ 153 .u32NominalTimeSeg2 = 16, \ 154 .u32NominalSyncJumpWidth = 16, \ 155 .u32DataPrescaler = 1, \ 156 .u32DataTimeSeg1 = 6, \ 157 .u32DataTimeSeg2 = 2, \ 158 .u32DataSyncJumpWidth = 2, \ 159 .u32TDC = MCAN_FD_TDC_ENABLE, \ 160 .u32SspOffset = 6, \ 161 .u32TdcFilter = 6 + 1, \ 162 } 163 164 #define MCAN_FD_CFG_500K_8M \ 165 { \ 166 .u32NominalPrescaler = 1, \ 167 .u32NominalTimeSeg1 = 64, \ 168 .u32NominalTimeSeg2 = 16, \ 169 .u32NominalSyncJumpWidth = 16, \ 170 .u32DataPrescaler = 1, \ 171 .u32DataTimeSeg1 = 4, \ 172 .u32DataTimeSeg2 = 1, \ 173 .u32DataSyncJumpWidth = 1, \ 174 .u32TDC = MCAN_FD_TDC_ENABLE, \ 175 .u32SspOffset = 4, \ 176 .u32TdcFilter = 4 + 1, \ 177 } 178 179 #define MCAN_FD_CFG_1M_1M \ 180 { \ 181 .u32NominalPrescaler = 1, \ 182 .u32NominalTimeSeg1 = 32, \ 183 .u32NominalTimeSeg2 = 8, \ 184 .u32NominalSyncJumpWidth = 8, \ 185 .u32DataPrescaler = 1, \ 186 .u32DataTimeSeg1 = 32, \ 187 .u32DataTimeSeg2 = 8, \ 188 .u32DataSyncJumpWidth = 8, \ 189 .u32TDC = MCAN_FD_TDC_ENABLE, \ 190 .u32SspOffset = 2*32, \ 191 .u32TdcFilter = 2*32 + 1, \ 192 } 193 194 #define MCAN_FD_CFG_1M_2M \ 195 { \ 196 .u32NominalPrescaler = 1, \ 197 .u32NominalTimeSeg1 = 32, \ 198 .u32NominalTimeSeg2 = 8, \ 199 .u32NominalSyncJumpWidth = 8, \ 200 .u32DataPrescaler = 1, \ 201 .u32DataTimeSeg1 = 16, \ 202 .u32DataTimeSeg2 = 4, \ 203 .u32DataSyncJumpWidth = 4, \ 204 .u32TDC = MCAN_FD_TDC_ENABLE, \ 205 .u32SspOffset = 16, \ 206 .u32TdcFilter = 16 + 1, \ 207 } 208 209 #define MCAN_FD_CFG_1M_4M \ 210 { \ 211 .u32NominalPrescaler = 1, \ 212 .u32NominalTimeSeg1 = 32, \ 213 .u32NominalTimeSeg2 = 8, \ 214 .u32NominalSyncJumpWidth = 8, \ 215 .u32DataPrescaler = 1, \ 216 .u32DataTimeSeg1 = 8, \ 217 .u32DataTimeSeg2 = 2, \ 218 .u32DataSyncJumpWidth = 2, \ 219 .u32TDC = MCAN_FD_TDC_ENABLE, \ 220 .u32SspOffset = 8, \ 221 .u32TdcFilter = 8 + 1, \ 222 } 223 224 #define MCAN_FD_CFG_1M_5M \ 225 { \ 226 .u32NominalPrescaler = 1, \ 227 .u32NominalTimeSeg1 = 32, \ 228 .u32NominalTimeSeg2 = 8, \ 229 .u32NominalSyncJumpWidth = 8, \ 230 .u32DataPrescaler = 1, \ 231 .u32DataTimeSeg1 = 6, \ 232 .u32DataTimeSeg2 = 2, \ 233 .u32DataSyncJumpWidth = 2, \ 234 .u32TDC = MCAN_FD_TDC_ENABLE, \ 235 .u32SspOffset = 6, \ 236 .u32TdcFilter = 6 + 1, \ 237 } 238 239 #define MCAN_FD_CFG_1M_8M \ 240 { \ 241 .u32NominalPrescaler = 1, \ 242 .u32NominalTimeSeg1 = 32, \ 243 .u32NominalTimeSeg2 = 8, \ 244 .u32NominalSyncJumpWidth = 8, \ 245 .u32DataPrescaler = 1, \ 246 .u32DataTimeSeg1 = 4, \ 247 .u32DataTimeSeg2 = 1, \ 248 .u32DataSyncJumpWidth = 1, \ 249 .u32TDC = MCAN_FD_TDC_ENABLE, \ 250 .u32SspOffset = 4, \ 251 .u32TdcFilter = 4 + 1, \ 252 } 253 254 /* 255 Bit rate configuration examples for classical CAN. 256 BitRate(bps) = MCANClock(Hz) / (u32NominalPrescaler * (u32NominalTimeSeg1 + u32NominalTimeSeg2)) 257 SamplePoint(%) = u32NominalTimeSeg1 / (u32NominalTimeSeg1 + u32NominalTimeSeg2) 258 eg. 259 BitRate(bps) = 40000000(Hz) / (2 * (16 + 4)) = 1000000 = 1M(bps) 260 SamplePoint(%) = 16 / (16 + 4) = 80% 261 The following bit rate configurations are based on the max MCAN Clock(40MHz). 262 */ 263 #define MCAN_CC_CFG_1M \ 264 { \ 265 .u32NominalPrescaler = 2, \ 266 .u32NominalTimeSeg1 = 16, \ 267 .u32NominalTimeSeg2 = 4, \ 268 .u32NominalSyncJumpWidth = 4, \ 269 } 270 271 #define MCAN_CC_CFG_800K \ 272 { \ 273 .u32NominalPrescaler = 2, \ 274 .u32NominalTimeSeg1 = 20, \ 275 .u32NominalTimeSeg2 = 5, \ 276 .u32NominalSyncJumpWidth = 5, \ 277 } 278 279 #define MCAN_CC_CFG_500K \ 280 { \ 281 .u32NominalPrescaler = 4, \ 282 .u32NominalTimeSeg1 = 16, \ 283 .u32NominalTimeSeg2 = 4, \ 284 .u32NominalSyncJumpWidth = 4, \ 285 } 286 287 #define MCAN_CC_CFG_250K \ 288 { \ 289 .u32NominalPrescaler = 4, \ 290 .u32NominalTimeSeg1 = 32, \ 291 .u32NominalTimeSeg2 = 8, \ 292 .u32NominalSyncJumpWidth = 8, \ 293 } 294 295 #define MCAN_CC_CFG_125K \ 296 { \ 297 .u32NominalPrescaler = 8, \ 298 .u32NominalTimeSeg1 = 32, \ 299 .u32NominalTimeSeg2 = 8, \ 300 .u32NominalSyncJumpWidth = 8, \ 301 } 302 303 #define MCAN_CC_CFG_100K \ 304 { \ 305 .u32NominalPrescaler = 10, \ 306 .u32NominalTimeSeg1 = 32, \ 307 .u32NominalTimeSeg2 = 8, \ 308 .u32NominalSyncJumpWidth = 8, \ 309 } 310 311 #define MCAN_CC_CFG_50K \ 312 { \ 313 .u32NominalPrescaler = 20, \ 314 .u32NominalTimeSeg1 = 32, \ 315 .u32NominalTimeSeg2 = 8, \ 316 .u32NominalSyncJumpWidth = 8, \ 317 } 318 319 #define MCAN_CC_CFG_20K \ 320 { \ 321 .u32NominalPrescaler = 50, \ 322 .u32NominalTimeSeg1 = 32, \ 323 .u32NominalTimeSeg2 = 8, \ 324 .u32NominalSyncJumpWidth = 8, \ 325 } 326 327 #define MCAN_CC_CFG_10K \ 328 { \ 329 .u32NominalPrescaler = 100, \ 330 .u32NominalTimeSeg1 = 32, \ 331 .u32NominalTimeSeg2 = 8, \ 332 .u32NominalSyncJumpWidth = 8, \ 333 } 334 335 #ifdef RT_CAN_USING_CANFD 336 #define MCAN1_BAUD_RATE_CFG MCAN_FD_CFG_1M_4M 337 #define MCAN1_NOMINAL_BAUD_RATE CANFD_DATA_BAUD_1M 338 #define MCAN1_DATA_BAUD_RATE CANFD_DATA_BAUD_4M 339 340 #define MCAN2_BAUD_RATE_CFG MCAN_FD_CFG_1M_4M 341 #define MCAN2_NOMINAL_BAUD_RATE CANFD_DATA_BAUD_1M 342 #define MCAN2_DATA_BAUD_RATE CANFD_DATA_BAUD_4M 343 344 #else 345 #define MCAN1_BAUD_RATE_CFG MCAN_CC_CFG_1M 346 #define MCAN1_NOMINAL_BAUD_RATE CAN1MBaud 347 #define MCAN1_DATA_BAUD_RATE 0 348 349 #define MCAN2_BAUD_RATE_CFG MCAN_CC_CFG_1M 350 #define MCAN2_NOMINAL_BAUD_RATE CAN1MBaud 351 #define MCAN2_DATA_BAUD_RATE 0 352 353 #endif /* #ifdef RT_CAN_USING_CANFD */ 354 355 /***********************************************************************************************/ 356 /***********************************************************************************************/ 357 358 #ifdef __cplusplus 359 } 360 #endif 361 362 #endif /* __MCAN_CONFIG_H__ */ 363 364 365