1 /* 2 * Copyright (c) 2006-2022, RT-Thread Development Team 3 * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd. 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 * 7 * Change Logs: 8 * Date Author Notes 9 * 2024-02-20 CDT first version 10 */ 11 12 #ifndef __IRQ_CONFIG_H__ 13 #define __IRQ_CONFIG_H__ 14 15 #include <rtthread.h> 16 17 #ifdef __cplusplus 18 extern "C" { 19 #endif 20 21 #define BSP_EXTINT0_IRQ_NUM EXTINT_PORT_EIRQ0_IRQn 22 #define BSP_EXTINT0_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 23 #define BSP_EXTINT1_IRQ_NUM EXTINT_PORT_EIRQ1_IRQn 24 #define BSP_EXTINT1_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 25 #define BSP_EXTINT2_IRQ_NUM EXTINT_PORT_EIRQ2_IRQn 26 #define BSP_EXTINT2_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 27 #define BSP_EXTINT3_IRQ_NUM EXTINT_PORT_EIRQ3_IRQn 28 #define BSP_EXTINT3_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 29 #define BSP_EXTINT4_IRQ_NUM EXTINT_PORT_EIRQ4_IRQn 30 #define BSP_EXTINT4_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 31 #define BSP_EXTINT5_IRQ_NUM EXTINT_PORT_EIRQ5_IRQn 32 #define BSP_EXTINT5_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 33 #define BSP_EXTINT6_IRQ_NUM EXTINT_PORT_EIRQ6_IRQn 34 #define BSP_EXTINT6_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 35 #define BSP_EXTINT7_IRQ_NUM EXTINT_PORT_EIRQ7_IRQn 36 #define BSP_EXTINT7_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 37 #define BSP_EXTINT8_IRQ_NUM EXTINT_PORT_EIRQ8_IRQn 38 #define BSP_EXTINT8_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 39 #define BSP_EXTINT9_IRQ_NUM EXTINT_PORT_EIRQ9_IRQn 40 #define BSP_EXTINT9_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 41 #define BSP_EXTINT10_IRQ_NUM EXTINT_PORT_EIRQ10_IRQn 42 #define BSP_EXTINT10_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 43 #define BSP_EXTINT11_IRQ_NUM EXTINT_PORT_EIRQ11_IRQn 44 #define BSP_EXTINT11_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 45 #define BSP_EXTINT12_IRQ_NUM EXTINT_PORT_EIRQ12_IRQn 46 #define BSP_EXTINT12_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 47 #define BSP_EXTINT13_IRQ_NUM EXTINT_PORT_EIRQ13_IRQn 48 #define BSP_EXTINT13_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 49 #define BSP_EXTINT14_IRQ_NUM EXTINT_PORT_EIRQ14_IRQn 50 #define BSP_EXTINT14_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 51 #define BSP_EXTINT15_IRQ_NUM EXTINT_PORT_EIRQ15_IRQn 52 #define BSP_EXTINT15_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 53 54 /* DMA1 ch0 */ 55 #define BSP_DMA1_CH0_IRQ_NUM INT000_IRQn 56 #define BSP_DMA1_CH0_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 57 /* DMA1 ch1 */ 58 #define BSP_DMA1_CH1_IRQ_NUM INT001_IRQn 59 #define BSP_DMA1_CH1_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 60 /* DMA1 ch2 */ 61 #define BSP_DMA1_CH2_IRQ_NUM INT002_IRQn 62 #define BSP_DMA1_CH2_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 63 /* DMA1 ch3 */ 64 #define BSP_DMA1_CH3_IRQ_NUM INT003_IRQn 65 #define BSP_DMA1_CH3_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 66 /* DMA1 ch4 */ 67 #define BSP_DMA1_CH4_IRQ_NUM INT004_IRQn 68 #define BSP_DMA1_CH4_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 69 /* DMA1 ch5 */ 70 #define BSP_DMA1_CH5_IRQ_NUM INT005_IRQn 71 #define BSP_DMA1_CH5_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 72 73 /* DMA2 ch0 */ 74 #define BSP_DMA2_CH0_IRQ_NUM INT006_IRQn 75 #define BSP_DMA2_CH0_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 76 /* DMA2 ch1 */ 77 #define BSP_DMA2_CH1_IRQ_NUM INT007_IRQn 78 #define BSP_DMA2_CH1_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 79 /* DMA2 ch2 */ 80 #define BSP_DMA2_CH2_IRQ_NUM INT008_IRQn 81 #define BSP_DMA2_CH2_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 82 /* DMA2 ch3 */ 83 #define BSP_DMA2_CH3_IRQ_NUM INT009_IRQn 84 #define BSP_DMA2_CH3_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 85 /* DMA2 ch4 */ 86 #define BSP_DMA2_CH4_IRQ_NUM INT010_IRQn 87 #define BSP_DMA2_CH4_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 88 /* DMA2 ch5 */ 89 #define BSP_DMA2_CH5_IRQ_NUM INT011_IRQn 90 #define BSP_DMA2_CH5_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 91 92 #if defined(BSP_USING_UART1) 93 #define BSP_UART1_IRQ_NUM USART1_IRQn 94 #define BSP_UART1_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 95 96 #if (defined(RT_USING_SERIAL_V1) && defined(BSP_UART1_TX_USING_DMA)) || \ 97 defined(RT_USING_SERIAL_V2) 98 #define BSP_UART1_TX_CPLT_IRQ_NUM USART1_TCI_IRQn 99 #define BSP_UART1_TX_CPLT_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 100 #endif 101 #endif /* BSP_USING_UART1 */ 102 103 #if defined(BSP_USING_UART2) 104 #define BSP_UART2_IRQ_NUM USART2_IRQn 105 #define BSP_UART2_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 106 107 #if (defined(RT_USING_SERIAL_V1) && defined(BSP_UART2_TX_USING_DMA)) || \ 108 defined(RT_USING_SERIAL_V2) 109 #define BSP_UART2_TX_CPLT_IRQ_NUM USART2_TCI_IRQn 110 #define BSP_UART2_TX_CPLT_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 111 #endif 112 #endif /* BSP_USING_UART2 */ 113 114 #if defined(BSP_USING_UART3) 115 #define BSP_UART3_IRQ_NUM USART3_IRQn 116 #define BSP_UART3_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 117 #endif /* BSP_USING_UART3 */ 118 119 #if defined(BSP_USING_UART4) 120 #define BSP_UART4_IRQ_NUM USART4_IRQn 121 #define BSP_UART4_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 122 123 #if (defined(RT_USING_SERIAL_V1) && defined(BSP_UART4_TX_USING_DMA)) || \ 124 defined(RT_USING_SERIAL_V2) 125 #define BSP_UART4_TX_CPLT_IRQ_NUM USART4_TCI_IRQn 126 #define BSP_UART4_TX_CPLT_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 127 #endif 128 #endif /* BSP_USING_UART4 */ 129 130 #if defined(BSP_USING_UART5) 131 #define BSP_UART5_IRQ_NUM USART5_IRQn 132 #define BSP_UART5_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 133 134 #if (defined(RT_USING_SERIAL_V1) && defined(BSP_UART5_TX_USING_DMA)) || \ 135 defined(RT_USING_SERIAL_V2) 136 #define BSP_UART5_TX_CPLT_IRQ_NUM USART5_TCI_IRQn 137 #define BSP_UART5_TX_CPLT_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 138 #endif 139 #endif /* BSP_USING_UART5 */ 140 141 #if defined(BSP_USING_UART6) 142 #define BSP_UART6_IRQ_NUM USART6_IRQn 143 #define BSP_UART6_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 144 #endif /* BSP_USING_UART6 */ 145 146 #if defined(BSP_USING_SPI1) 147 #define BSP_SPI1_ERR_IRQ_NUM SPI1_IRQn 148 #define BSP_SPI1_ERR_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 149 #endif 150 151 #if defined(BSP_USING_SPI2) 152 #define BSP_SPI2_ERR_IRQ_NUM SPI2_IRQn 153 #define BSP_SPI2_ERR_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 154 #endif 155 156 #if defined(BSP_USING_SPI3) 157 #define BSP_SPI3_ERR_IRQ_NUM SPI3_IRQn 158 #define BSP_SPI3_ERR_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 159 #endif 160 161 #if defined(BSP_USING_SPI4) 162 #define BSP_SPI4_ERR_IRQ_NUM SPI4_IRQn 163 #define BSP_SPI4_ERR_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 164 #endif 165 166 #if defined (BSP_USING_QSPI) 167 #define BSP_QSPI_ERR_IRQ_NUM QSPI_IRQn 168 #define BSP_QSPI_ERR_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 169 #endif /* BSP_USING_QSPI */ 170 171 #if defined(BSP_USING_TMRA_1) 172 #define BSP_USING_TMRA_1_IRQ_NUM TMRA_1_OVF_UDF_IRQn 173 #define BSP_USING_TMRA_1_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 174 #endif/* BSP_USING_TMRA_1 */ 175 176 #if defined(BSP_USING_TMRA_2) 177 #define BSP_USING_TMRA_2_IRQ_NUM TMRA_2_OVF_UDF_IRQn 178 #define BSP_USING_TMRA_2_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 179 #endif/* BSP_USING_TMRA_2 */ 180 181 #if defined(BSP_USING_TMRA_3) 182 #define BSP_USING_TMRA_3_IRQ_NUM TMRA_3_OVF_UDF_IRQn 183 #define BSP_USING_TMRA_3_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 184 #endif/* BSP_USING_TMRA_3 */ 185 186 #if defined(BSP_USING_TMRA_4) 187 #define BSP_USING_TMRA_4_IRQ_NUM TMRA_4_OVF_UDF_IRQn 188 #define BSP_USING_TMRA_4_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 189 #endif/* BSP_USING_TMRA_4 */ 190 191 #if defined(BSP_USING_TMRA_5) 192 #define BSP_USING_TMRA_5_IRQ_NUM TMRA_5_OVF_UDF_IRQn 193 #define BSP_USING_TMRA_5_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 194 #endif/* BSP_USING_TMRA_5 */ 195 196 #if defined(BSP_USING_TMRA_6) 197 #define BSP_USING_TMRA_6_IRQ_NUM TMRA_6_OVF_UDF_IRQn 198 #define BSP_USING_TMRA_6_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 199 #endif/* BSP_USING_TMRA_6 */ 200 201 #if defined(BSP_USING_CAN1) 202 #define BSP_CAN1_IRQ_NUM CAN1_INT_IRQn 203 #define BSP_CAN1_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 204 #endif/* BSP_USING_CAN1 */ 205 206 #if defined(BSP_USING_CAN2) 207 #define BSP_CAN2_IRQ_NUM CAN2_INT_IRQn 208 #define BSP_CAN2_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 209 #endif/* BSP_USING_CAN2 */ 210 211 #if defined(BSP_USING_CAN3) 212 #define BSP_CAN3_IRQ_NUM CAN3_INT_IRQn 213 #define BSP_CAN3_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 214 #endif/* BSP_USING_CAN3 */ 215 216 #if defined(RT_USING_ALARM) 217 #define BSP_RTC_ALARM_IRQ_NUM RTC_IRQn 218 #define BSP_RTC_ALARM_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 219 #endif/* RT_USING_ALARM */ 220 221 #if defined(BSP_USING_PULSE_ENCODER_TMRA_1) 222 #define BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_NUM TMRA_1_OVF_UDF_IRQn 223 #define BSP_PULSE_ENCODER_TMRA_1_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 224 #define BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_NUM TMRA_1_OVF_UDF_IRQn 225 #define BSP_PULSE_ENCODER_TMRA_1_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 226 #endif/* BSP_USING_PULSE_ENCODER_TMRA_1 */ 227 #if defined(BSP_USING_PULSE_ENCODER_TMRA_2) 228 #define BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_NUM TMRA_2_OVF_UDF_IRQn 229 #define BSP_PULSE_ENCODER_TMRA_2_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 230 #define BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_NUM TMRA_2_OVF_UDF_IRQn 231 #define BSP_PULSE_ENCODER_TMRA_2_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 232 #endif/* BSP_USING_PULSE_ENCODER_TMRA_2 */ 233 #if defined(BSP_USING_PULSE_ENCODER_TMRA_3) 234 #define BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_NUM TMRA_3_OVF_UDF_IRQn 235 #define BSP_PULSE_ENCODER_TMRA_3_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 236 #define BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_NUM TMRA_3_OVF_UDF_IRQn 237 #define BSP_PULSE_ENCODER_TMRA_3_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 238 #endif/* BSP_USING_PULSE_ENCODER_TMRA_3 */ 239 #if defined(BSP_USING_PULSE_ENCODER_TMRA_4) 240 #define BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_NUM TMRA_4_OVF_UDF_IRQn 241 #define BSP_PULSE_ENCODER_TMRA_4_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 242 #define BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_NUM TMRA_4_OVF_UDF_IRQn 243 #define BSP_PULSE_ENCODER_TMRA_4_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 244 #endif/* BSP_USING_PULSE_ENCODER_TMRA_4 */ 245 #if defined(BSP_USING_PULSE_ENCODER_TMRA_5) 246 #define BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_NUM TMRA_5_OVF_UDF_IRQn 247 #define BSP_PULSE_ENCODER_TMRA_5_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 248 #define BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_NUM TMRA_5_OVF_UDF_IRQn 249 #define BSP_PULSE_ENCODER_TMRA_5_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 250 #endif/* BSP_USING_PULSE_ENCODER_TMRA_5 */ 251 #if defined(BSP_USING_PULSE_ENCODER_TMRA_6) 252 #define BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_NUM TMRA_6_OVF_UDF_IRQn 253 #define BSP_PULSE_ENCODER_TMRA_6_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 254 #define BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_NUM TMRA_6_OVF_UDF_IRQn 255 #define BSP_PULSE_ENCODER_TMRA_6_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 256 #endif/* BSP_USING_PULSE_ENCODER_TMRA_6 */ 257 258 #if defined(BSP_USING_PULSE_ENCODER_TMR6_1) 259 #define BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_NUM TMR6_1_OVF_UDF_IRQn 260 #define BSP_PULSE_ENCODER_TMR6_1_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 261 #define BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_NUM TMR6_1_OVF_UDF_IRQn 262 #define BSP_PULSE_ENCODER_TMR6_1_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 263 #endif/* BSP_USING_PULSE_ENCODER_TMR6_1 */ 264 #if defined(BSP_USING_PULSE_ENCODER_TMR6_2) 265 #define BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_NUM TMR6_2_OVF_UDF_IRQn 266 #define BSP_PULSE_ENCODER_TMR6_2_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 267 #define BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_NUM TMR6_2_OVF_UDF_IRQn 268 #define BSP_PULSE_ENCODER_TMR6_2_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 269 #endif/* BSP_USING_PULSE_ENCODER_TMR6_2 */ 270 #if defined(BSP_USING_PULSE_ENCODER_TMR6_3) 271 #define BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_NUM TMR6_3_OVF_UDF_IRQn 272 #define BSP_PULSE_ENCODER_TMR6_3_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 273 #define BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_NUM TMR6_3_OVF_UDF_IRQn 274 #define BSP_PULSE_ENCODER_TMR6_3_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 275 #endif/* BSP_USING_PULSE_ENCODER_TMR6_3 */ 276 #if defined(BSP_USING_PULSE_ENCODER_TMR6_4) 277 #define BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_NUM TMR6_4_OVF_UDF_IRQn 278 #define BSP_PULSE_ENCODER_TMR6_4_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 279 #define BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_NUM TMR6_4_OVF_UDF_IRQn 280 #define BSP_PULSE_ENCODER_TMR6_4_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 281 #endif/* BSP_USING_PULSE_ENCODER_TMR6_4 */ 282 #if defined(BSP_USING_PULSE_ENCODER_TMR6_5) 283 #define BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_NUM TMR6_5_OVF_UDF_IRQn 284 #define BSP_PULSE_ENCODER_TMR6_5_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 285 #define BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_NUM TMR6_5_OVF_UDF_IRQn 286 #define BSP_PULSE_ENCODER_TMR6_5_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 287 #endif/* BSP_USING_PULSE_ENCODER_TMR6_5 */ 288 #if defined(BSP_USING_PULSE_ENCODER_TMR6_6) 289 #define BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_NUM TMR6_6_OVF_UDF_IRQn 290 #define BSP_PULSE_ENCODER_TMR6_6_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 291 #define BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_NUM TMR6_6_OVF_UDF_IRQn 292 #define BSP_PULSE_ENCODER_TMR6_6_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 293 #endif/* BSP_USING_PULSE_ENCODER_TMR6_6 */ 294 #if defined(BSP_USING_PULSE_ENCODER_TMR6_7) 295 #define BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_NUM TMR6_7_OVF_UDF_IRQn 296 #define BSP_PULSE_ENCODER_TMR6_7_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 297 #define BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_NUM TMR6_7_OVF_UDF_IRQn 298 #define BSP_PULSE_ENCODER_TMR6_7_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 299 #endif/* BSP_USING_PULSE_ENCODER_TMR6_7 */ 300 #if defined(BSP_USING_PULSE_ENCODER_TMR6_8) 301 #define BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_NUM TMR6_8_OVF_UDF_IRQn 302 #define BSP_PULSE_ENCODER_TMR6_8_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 303 #define BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_NUM TMR6_8_OVF_UDF_IRQn 304 #define BSP_PULSE_ENCODER_TMR6_8_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 305 #endif/* BSP_USING_PULSE_ENCODER_TMR6_8 */ 306 #if defined(BSP_USING_PULSE_ENCODER_TMR6_9) 307 #define BSP_PULSE_ENCODER_TMR6_9_OVF_IRQ_NUM TMR6_9_OVF_UDF_IRQn 308 #define BSP_PULSE_ENCODER_TMR6_9_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 309 #define BSP_PULSE_ENCODER_TMR6_9_UDF_IRQ_NUM TMR6_9_OVF_UDF_IRQn 310 #define BSP_PULSE_ENCODER_TMR6_9_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 311 #endif/* BSP_USING_PULSE_ENCODER_TMR6_9 */ 312 #if defined(BSP_USING_PULSE_ENCODER_TMR6_10) 313 #define BSP_PULSE_ENCODER_TMR6_10_OVF_IRQ_NUM TMR6_10_OVF_UDF_IRQn 314 #define BSP_PULSE_ENCODER_TMR6_10_OVF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 315 #define BSP_PULSE_ENCODER_TMR6_10_UDF_IRQ_NUM TMR6_10_OVF_UDF_IRQn 316 #define BSP_PULSE_ENCODER_TMR6_10_UDF_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 317 #endif/* BSP_USING_PULSE_ENCODER_TMR6_10 */ 318 319 #if defined(BSP_USING_USBD) || defined(BSP_USING_USBH) 320 #define BSP_USBFS_GLB_IRQ_NUM USBFS_GLB_IRQn 321 #define BSP_USBFS_GLB_IRQ_PRIO DDL_IRQ_PRIO_DEFAULT 322 #endif 323 324 #ifdef __cplusplus 325 } 326 #endif 327 328 #endif /* __IRQ_CONFIG_H__ */ 329