1 /* 2 * Copyright (c) 2006-2022, RT-Thread Development Team 3 * Copyright (c) 2022-2024, Xiaohua Semiconductor Co., Ltd. 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 * 7 * Change Logs: 8 * Date Author Notes 9 * 2024-02-20 CDT first version 10 */ 11 12 #ifndef __UART_CONFIG_H__ 13 #define __UART_CONFIG_H__ 14 15 #include <rtthread.h> 16 #include "irq_config.h" 17 18 #ifdef __cplusplus 19 extern "C" { 20 #endif 21 22 23 #if defined(BSP_USING_UART1) 24 #ifndef UART1_CONFIG 25 #define UART1_CONFIG \ 26 { \ 27 .name = "uart1", \ 28 .Instance = CM_USART1, \ 29 .clock = FCG3_PERIPH_USART1, \ 30 .irq_num = BSP_UART1_IRQ_NUM, \ 31 .rxerr_int_src = INT_SRC_USART1_EI, \ 32 .rx_int_src = INT_SRC_USART1_RI, \ 33 .tx_int_src = INT_SRC_USART1_TI, \ 34 } 35 #endif /* UART1_CONFIG */ 36 37 #if defined(BSP_UART1_RX_USING_DMA) 38 #ifndef UART1_DMA_RX_CONFIG 39 #define UART1_DMA_RX_CONFIG \ 40 { \ 41 .Instance = UART1_RX_DMA_INSTANCE, \ 42 .channel = UART1_RX_DMA_CHANNEL, \ 43 .clock = UART1_RX_DMA_CLOCK, \ 44 .trigger_select = UART1_RX_DMA_TRIG_SELECT, \ 45 .trigger_event = EVT_SRC_USART1_RI, \ 46 .flag = UART1_RX_DMA_TRANS_FLAG, \ 47 .irq_config = \ 48 { \ 49 .irq_num = UART1_RX_DMA_IRQn, \ 50 .irq_prio = UART1_RX_DMA_INT_PRIO, \ 51 .int_src = UART1_RX_DMA_INT_SRC, \ 52 }, \ 53 } 54 #endif /* UART1_DMA_RX_CONFIG */ 55 56 #ifndef UART1_RXTO_CONFIG 57 #define UART1_RXTO_CONFIG \ 58 { \ 59 .TMR0_Instance = CM_TMR0_1, \ 60 .channel = TMR0_CH_A, \ 61 .clock = FCG2_PERIPH_TMR0_1, \ 62 .timeout_bits = 20UL, \ 63 } 64 #endif /* UART1_RXTO_CONFIG */ 65 #endif /* BSP_UART1_RX_USING_DMA */ 66 67 #if defined(RT_USING_SERIAL_V1) && defined(BSP_UART1_TX_USING_DMA) 68 #ifndef UART1_TX_CPLT_CONFIG 69 #define UART1_TX_CPLT_CONFIG \ 70 { \ 71 .irq_config = \ 72 { \ 73 .irq_num = BSP_UART1_TX_CPLT_IRQ_NUM, \ 74 .irq_prio = BSP_UART1_TX_CPLT_IRQ_PRIO, \ 75 .int_src = INT_SRC_USART1_TCI, \ 76 }, \ 77 } 78 #endif 79 #elif defined(RT_USING_SERIAL_V2) 80 #ifndef UART1_TX_CPLT_CONFIG 81 #define UART1_TX_CPLT_CONFIG \ 82 { \ 83 .irq_config = \ 84 { \ 85 .irq_num = BSP_UART1_TX_CPLT_IRQ_NUM, \ 86 .irq_prio = BSP_UART1_TX_CPLT_IRQ_PRIO, \ 87 .int_src = INT_SRC_USART1_TCI, \ 88 }, \ 89 } 90 #endif 91 #endif /* UART1_TX_CPLT_CONFIG */ 92 93 #if defined(BSP_UART1_TX_USING_DMA) 94 #ifndef UART1_DMA_TX_CONFIG 95 #define UART1_DMA_TX_CONFIG \ 96 { \ 97 .Instance = UART1_TX_DMA_INSTANCE, \ 98 .channel = UART1_TX_DMA_CHANNEL, \ 99 .clock = UART1_TX_DMA_CLOCK, \ 100 .trigger_select = UART1_TX_DMA_TRIG_SELECT, \ 101 .trigger_event = EVT_SRC_USART1_TI, \ 102 .flag = UART1_TX_DMA_TRANS_FLAG, \ 103 .irq_config = \ 104 { \ 105 .irq_num = UART1_TX_DMA_IRQn, \ 106 .irq_prio = UART1_TX_DMA_INT_PRIO, \ 107 .int_src = UART1_TX_DMA_INT_SRC, \ 108 }, \ 109 } 110 #endif /* UART1_DMA_TX_CONFIG */ 111 #endif /* BSP_UART1_TX_USING_DMA */ 112 #endif /* BSP_USING_UART1 */ 113 114 #if defined(BSP_USING_UART2) 115 #ifndef UART2_CONFIG 116 #define UART2_CONFIG \ 117 { \ 118 .name = "uart2", \ 119 .Instance = CM_USART2, \ 120 .clock = FCG3_PERIPH_USART2, \ 121 .irq_num = BSP_UART2_IRQ_NUM, \ 122 .rxerr_int_src = INT_SRC_USART2_EI, \ 123 .rx_int_src = INT_SRC_USART2_RI, \ 124 .tx_int_src = INT_SRC_USART2_TI, \ 125 } 126 #endif /* UART2_CONFIG */ 127 128 #if defined(BSP_UART2_RX_USING_DMA) 129 #ifndef UART2_DMA_RX_CONFIG 130 #define UART2_DMA_RX_CONFIG \ 131 { \ 132 .Instance = UART2_RX_DMA_INSTANCE, \ 133 .channel = UART2_RX_DMA_CHANNEL, \ 134 .clock = UART2_RX_DMA_CLOCK, \ 135 .trigger_select = UART2_RX_DMA_TRIG_SELECT, \ 136 .trigger_event = EVT_SRC_USART2_RI, \ 137 .flag = UART2_RX_DMA_TRANS_FLAG, \ 138 .irq_config = \ 139 { \ 140 .irq_num = UART2_RX_DMA_IRQn, \ 141 .irq_prio = UART2_RX_DMA_INT_PRIO, \ 142 .int_src = UART2_RX_DMA_INT_SRC, \ 143 }, \ 144 } 145 #endif /* UART2_DMA_RX_CONFIG */ 146 147 #ifndef UART2_RXTO_CONFIG 148 #define UART2_RXTO_CONFIG \ 149 { \ 150 .TMR0_Instance = CM_TMR0_1, \ 151 .channel = TMR0_CH_B, \ 152 .clock = FCG2_PERIPH_TMR0_1, \ 153 .timeout_bits = 20UL, \ 154 } 155 #endif /* UART2_RXTO_CONFIG */ 156 #endif /* BSP_UART2_RX_USING_DMA */ 157 158 #if defined(RT_USING_SERIAL_V1) && defined(BSP_UART2_TX_USING_DMA) 159 #ifndef UART2_TX_CPLT_CONFIG 160 #define UART2_TX_CPLT_CONFIG \ 161 { \ 162 .irq_config = \ 163 { \ 164 .irq_num = BSP_UART2_TX_CPLT_IRQ_NUM, \ 165 .irq_prio = BSP_UART2_TX_CPLT_IRQ_PRIO, \ 166 .int_src = INT_SRC_USART2_TCI, \ 167 }, \ 168 } 169 #endif 170 #elif defined(RT_USING_SERIAL_V2) 171 #ifndef UART2_TX_CPLT_CONFIG 172 #define UART2_TX_CPLT_CONFIG \ 173 { \ 174 .irq_config = \ 175 { \ 176 .irq_num = BSP_UART2_TX_CPLT_IRQ_NUM, \ 177 .irq_prio = BSP_UART2_TX_CPLT_IRQ_PRIO, \ 178 .int_src = INT_SRC_USART2_TCI, \ 179 }, \ 180 } 181 #endif 182 #endif /* UART2_TX_CPLT_CONFIG */ 183 184 #if defined(BSP_UART2_TX_USING_DMA) 185 #ifndef UART2_DMA_TX_CONFIG 186 #define UART2_DMA_TX_CONFIG \ 187 { \ 188 .Instance = UART2_TX_DMA_INSTANCE, \ 189 .channel = UART2_TX_DMA_CHANNEL, \ 190 .clock = UART2_TX_DMA_CLOCK, \ 191 .trigger_select = UART2_TX_DMA_TRIG_SELECT, \ 192 .trigger_event = EVT_SRC_USART2_TI, \ 193 .flag = UART2_TX_DMA_TRANS_FLAG, \ 194 .irq_config = \ 195 { \ 196 .irq_num = UART2_TX_DMA_IRQn, \ 197 .irq_prio = UART2_TX_DMA_INT_PRIO, \ 198 .int_src = UART2_TX_DMA_INT_SRC, \ 199 }, \ 200 } 201 #endif /* UART2_DMA_TX_CONFIG */ 202 #endif /* BSP_UART2_TX_USING_DMA */ 203 #endif /* BSP_USING_UART2 */ 204 205 #if defined(BSP_USING_UART3) 206 #ifndef UART3_CONFIG 207 #define UART3_CONFIG \ 208 { \ 209 .name = "uart3", \ 210 .Instance = CM_USART3, \ 211 .clock = FCG3_PERIPH_USART3, \ 212 .irq_num = BSP_UART3_IRQ_NUM, \ 213 .rxerr_int_src = INT_SRC_USART3_EI, \ 214 .rx_int_src = INT_SRC_USART3_RI, \ 215 .tx_int_src = INT_SRC_USART3_TI, \ 216 } 217 #endif /* UART3_CONFIG */ 218 219 #if defined(RT_USING_SERIAL_V2) 220 #ifndef UART3_TX_CPLT_CONFIG 221 #define UART3_TX_CPLT_CONFIG \ 222 { \ 223 .irq_config = \ 224 { \ 225 .irq_num = BSP_UART3_TX_CPLT_IRQ_NUM, \ 226 .irq_prio = BSP_UART3_TX_CPLT_IRQ_PRIO, \ 227 .int_src = INT_SRC_USART3_TCI, \ 228 }, \ 229 } 230 #endif 231 #endif /* UART3_TX_CPLT_CONFIG */ 232 #endif /* BSP_USING_UART3 */ 233 234 #if defined(BSP_USING_UART4) 235 #ifndef UART4_CONFIG 236 #define UART4_CONFIG \ 237 { \ 238 .name = "uart4", \ 239 .Instance = CM_USART4, \ 240 .clock = FCG3_PERIPH_USART4, \ 241 .irq_num = BSP_UART4_IRQ_NUM, \ 242 .rxerr_int_src = INT_SRC_USART4_EI, \ 243 .rx_int_src = INT_SRC_USART4_RI, \ 244 .tx_int_src = INT_SRC_USART4_TI, \ 245 } 246 #endif /* UART4_CONFIG */ 247 248 #if defined(BSP_UART4_RX_USING_DMA) 249 #ifndef UART4_DMA_RX_CONFIG 250 #define UART4_DMA_RX_CONFIG \ 251 { \ 252 .Instance = UART4_RX_DMA_INSTANCE, \ 253 .channel = UART4_RX_DMA_CHANNEL, \ 254 .clock = UART4_RX_DMA_CLOCK, \ 255 .trigger_select = UART4_RX_DMA_TRIG_SELECT, \ 256 .trigger_event = EVT_SRC_USART4_RI, \ 257 .flag = UART4_RX_DMA_TRANS_FLAG, \ 258 .irq_config = \ 259 { \ 260 .irq_num = UART4_RX_DMA_IRQn, \ 261 .irq_prio = UART4_RX_DMA_INT_PRIO, \ 262 .int_src = UART4_RX_DMA_INT_SRC, \ 263 }, \ 264 } 265 #endif /* UART4_DMA_RX_CONFIG */ 266 267 #ifndef UART4_RXTO_CONFIG 268 #define UART4_RXTO_CONFIG \ 269 { \ 270 .TMR0_Instance = CM_TMR0_2, \ 271 .channel = TMR0_CH_A, \ 272 .clock = FCG2_PERIPH_TMR0_2, \ 273 .timeout_bits = 20UL, \ 274 } 275 #endif /* UART4_RXTO_CONFIG */ 276 #endif /* BSP_UART4_RX_USING_DMA */ 277 278 #if defined(RT_USING_SERIAL_V1) && defined(BSP_UART4_TX_USING_DMA) 279 #ifndef UART4_TX_CPLT_CONFIG 280 #define UART4_TX_CPLT_CONFIG \ 281 { \ 282 .irq_config = \ 283 { \ 284 .irq_num = BSP_UART4_TX_CPLT_IRQ_NUM, \ 285 .irq_prio = BSP_UART4_TX_CPLT_IRQ_PRIO, \ 286 .int_src = INT_SRC_USART4_TCI, \ 287 }, \ 288 } 289 #endif 290 #elif defined(RT_USING_SERIAL_V2) 291 #ifndef UART4_TX_CPLT_CONFIG 292 #define UART4_TX_CPLT_CONFIG \ 293 { \ 294 .irq_config = \ 295 { \ 296 .irq_num = BSP_UART4_TX_CPLT_IRQ_NUM, \ 297 .irq_prio = BSP_UART4_TX_CPLT_IRQ_PRIO, \ 298 .int_src = INT_SRC_USART4_TCI, \ 299 }, \ 300 } 301 #endif 302 #endif /* UART4_TX_CPLT_CONFIG */ 303 304 #if defined(BSP_UART4_TX_USING_DMA) 305 #ifndef UART4_DMA_TX_CONFIG 306 #define UART4_DMA_TX_CONFIG \ 307 { \ 308 .Instance = UART4_TX_DMA_INSTANCE, \ 309 .channel = UART4_TX_DMA_CHANNEL, \ 310 .clock = UART4_TX_DMA_CLOCK, \ 311 .trigger_select = UART4_TX_DMA_TRIG_SELECT, \ 312 .trigger_event = EVT_SRC_USART4_TI, \ 313 .flag = UART4_TX_DMA_TRANS_FLAG, \ 314 .irq_config = \ 315 { \ 316 .irq_num = UART4_TX_DMA_IRQn, \ 317 .irq_prio = UART4_TX_DMA_INT_PRIO, \ 318 .int_src = UART4_TX_DMA_INT_SRC, \ 319 }, \ 320 } 321 #endif /* UART4_DMA_TX_CONFIG */ 322 #endif /* BSP_UART4_TX_USING_DMA */ 323 #endif /* BSP_USING_UART4 */ 324 325 #if defined(BSP_USING_UART5) 326 #ifndef UART5_CONFIG 327 #define UART5_CONFIG \ 328 { \ 329 .name = "uart5", \ 330 .Instance = CM_USART5, \ 331 .clock = FCG3_PERIPH_USART5, \ 332 .irq_num = BSP_UART5_IRQ_NUM, \ 333 .rxerr_int_src = INT_SRC_USART5_EI, \ 334 .rx_int_src = INT_SRC_USART5_RI, \ 335 .tx_int_src = INT_SRC_USART5_TI, \ 336 } 337 #endif /* UART5_CONFIG */ 338 339 #if defined(BSP_UART5_RX_USING_DMA) 340 #ifndef UART5_DMA_RX_CONFIG 341 #define UART5_DMA_RX_CONFIG \ 342 { \ 343 .Instance = UART5_RX_DMA_INSTANCE, \ 344 .channel = UART5_RX_DMA_CHANNEL, \ 345 .clock = UART5_RX_DMA_CLOCK, \ 346 .trigger_select = UART5_RX_DMA_TRIG_SELECT, \ 347 .trigger_event = EVT_SRC_USART5_RI, \ 348 .flag = UART5_RX_DMA_TRANS_FLAG, \ 349 .irq_config = \ 350 { \ 351 .irq_num = UART5_RX_DMA_IRQn, \ 352 .irq_prio = UART5_RX_DMA_INT_PRIO, \ 353 .int_src = UART5_RX_DMA_INT_SRC, \ 354 }, \ 355 } 356 #endif /* UART5_DMA_RX_CONFIG */ 357 358 #ifndef UART5_RXTO_CONFIG 359 #define UART5_RXTO_CONFIG \ 360 { \ 361 .TMR0_Instance = CM_TMR0_2, \ 362 .channel = TMR0_CH_B, \ 363 .clock = FCG2_PERIPH_TMR0_2, \ 364 .timeout_bits = 20UL, \ 365 } 366 #endif /* UART5_RXTO_CONFIG */ 367 #endif /* BSP_UART5_RX_USING_DMA */ 368 369 #if defined(RT_USING_SERIAL_V1) && defined(BSP_UART5_TX_USING_DMA) 370 #ifndef UART5_TX_CPLT_CONFIG 371 #define UART5_TX_CPLT_CONFIG \ 372 { \ 373 .irq_config = \ 374 { \ 375 .irq_num = BSP_UART5_TX_CPLT_IRQ_NUM, \ 376 .irq_prio = BSP_UART5_TX_CPLT_IRQ_PRIO, \ 377 .int_src = INT_SRC_USART5_TCI, \ 378 }, \ 379 } 380 #endif 381 #elif defined(RT_USING_SERIAL_V2) 382 #ifndef UART5_TX_CPLT_CONFIG 383 #define UART5_TX_CPLT_CONFIG \ 384 { \ 385 .irq_config = \ 386 { \ 387 .irq_num = BSP_UART5_TX_CPLT_IRQ_NUM, \ 388 .irq_prio = BSP_UART5_TX_CPLT_IRQ_PRIO, \ 389 .int_src = INT_SRC_USART5_TCI, \ 390 }, \ 391 } 392 #endif 393 #endif /* UART5_TX_CPLT_CONFIG */ 394 395 #if defined(BSP_UART5_TX_USING_DMA) 396 #ifndef UART5_DMA_TX_CONFIG 397 #define UART5_DMA_TX_CONFIG \ 398 { \ 399 .Instance = UART5_TX_DMA_INSTANCE, \ 400 .channel = UART5_TX_DMA_CHANNEL, \ 401 .clock = UART5_TX_DMA_CLOCK, \ 402 .trigger_select = UART5_TX_DMA_TRIG_SELECT, \ 403 .trigger_event = EVT_SRC_USART5_TI, \ 404 .flag = UART5_TX_DMA_TRANS_FLAG, \ 405 .irq_config = \ 406 { \ 407 .irq_num = UART5_TX_DMA_IRQn, \ 408 .irq_prio = UART5_TX_DMA_INT_PRIO, \ 409 .int_src = UART5_TX_DMA_INT_SRC, \ 410 }, \ 411 } 412 #endif /* UART5_DMA_TX_CONFIG */ 413 #endif /* BSP_UART5_TX_USING_DMA */ 414 #endif /* BSP_USING_UART5 */ 415 416 #if defined(BSP_USING_UART6) 417 #ifndef UART6_CONFIG 418 #define UART6_CONFIG \ 419 { \ 420 .name = "uart6", \ 421 .Instance = CM_USART6, \ 422 .clock = FCG3_PERIPH_USART6, \ 423 .irq_num = BSP_UART6_IRQ_NUM, \ 424 .rxerr_int_src = INT_SRC_USART6_EI, \ 425 .rx_int_src = INT_SRC_USART6_RI, \ 426 .tx_int_src = INT_SRC_USART6_TI, \ 427 } 428 #endif /* UART6_CONFIG */ 429 430 #if defined(RT_USING_SERIAL_V2) 431 #ifndef UART6_TX_CPLT_CONFIG 432 #define UART6_TX_CPLT_CONFIG \ 433 { \ 434 .irq_config = \ 435 { \ 436 .irq_num = BSP_UART6_TX_CPLT_IRQ_NUM, \ 437 .irq_prio = BSP_UART6_TX_CPLT_IRQ_PRIO, \ 438 .int_src = INT_SRC_USART6_TCI, \ 439 }, \ 440 } 441 #endif 442 #endif /* UART6_TX_CPLT_CONFIG */ 443 #endif /* BSP_USING_UART6 */ 444 445 #ifdef __cplusplus 446 } 447 #endif 448 449 #endif 450