1/** 2;***************************(C) COPYRIGHT HKMicroChip************************** 3;* File Name : startup_hk32f030x4x6x8.s 4;* Author : HK AE Team 5;* Description : HK32F030x devices vector table for MDK-ARM toolchain. 6;* This module performs: 7;* - Set the initial SP 8;* - Set the initial PC == Reset_Handler 9;* - Set the vector table entries with the exceptions ISR address 10;* - Branches to __main in the C library (which eventually 11;* calls main()). 12;* After Reset the CortexM0 processor is in Thread mode, 13;* priority is Privileged, and the Stack is set to Main. 14;******************************************************************************* 15 */ 16 .syntax unified 17 .cpu cortex-m0 18 .fpu softvfp 19 .thumb 20 21.global g_pfnVectors 22.global Default_Handler 23 24/* start address for the initialization values of the .data section. 25defined in linker script */ 26.word _sidata 27/* start address for the .data section. defined in linker script */ 28.word _sdata 29/* end address for the .data section. defined in linker script */ 30.word _edata 31/* start address for the .bss section. defined in linker script */ 32.word _sbss 33/* end address for the .bss section. defined in linker script */ 34.word _ebss 35 36 .section .text.Reset_Handler 37 .weak Reset_Handler 38 .type Reset_Handler, %function 39Reset_Handler: 40 ldr r0, =_estack 41 mov sp, r0 /* set stack pointer */ 42 43/* Copy the data segment initializers from flash to SRAM */ 44 ldr r0, =_sdata 45 ldr r1, =_edata 46 ldr r2, =_sidata 47 movs r3, #0 48 b LoopCopyDataInit 49 50CopyDataInit: 51 ldr r4, [r2, r3] 52 str r4, [r0, r3] 53 adds r3, r3, #4 54 55LoopCopyDataInit: 56 adds r4, r0, r3 57 cmp r4, r1 58 bcc CopyDataInit 59 60/* Zero fill the bss segment. */ 61 ldr r2, =_sbss 62 ldr r4, =_ebss 63 movs r3, #0 64 b LoopFillZerobss 65 66FillZerobss: 67 str r3, [r2] 68 adds r2, r2, #4 69 70LoopFillZerobss: 71 cmp r2, r4 72 bcc FillZerobss 73 74/* Call the clock system intitialization function.*/ 75 bl SystemInit 76/* Call static constructors */ 77/* bl __libc_init_array */ 78/* Call the application's entry point.*/ 79 bl entry 80 81LoopForever: 82 b LoopForever 83 84 85.size Reset_Handler, .-Reset_Handler 86 87/** 88 * @brief This is the code that gets called when the processor receives an 89 * unexpected interrupt. This simply enters an infinite loop, preserving 90 * the system state for examination by a debugger. 91 * 92 * @param None 93 * @retval : None 94*/ 95 .section .text.Default_Handler,"ax",%progbits 96Default_Handler: 97Infinite_Loop: 98 b Infinite_Loop 99 .size Default_Handler, .-Default_Handler 100/****************************************************************************** 101* 102* The minimal vector table for a Cortex M0. Note that the proper constructs 103* must be placed on this to ensure that it ends up at physical address 104* 0x0000.0000. 105* 106******************************************************************************/ 107 .section .isr_vector,"a",%progbits 108 .type g_pfnVectors, %object 109 .size g_pfnVectors, .-g_pfnVectors 110 111 112g_pfnVectors: 113 .word _estack 114 .word Reset_Handler 115 .word NMI_Handler 116 .word HardFault_Handler 117 .word 0 118 .word 0 119 .word 0 120 .word 0 121 .word 0 122 .word 0 123 .word 0 124 .word SVC_Handler 125 .word 0 126 .word 0 127 .word PendSV_Handler 128 .word SysTick_Handler 129 .word WWDG_IRQHandler /* Window WatchDog */ 130 .word 0 /* Reserved */ 131 .word RTC_IRQHandler /* RTC through the EXTI line */ 132 .word FLASH_IRQHandler /* FLASH */ 133 .word RCC_IRQHandler /* RCC */ 134 .word EXTI0_1_IRQHandler /* EXTI Line 0 and 1 */ 135 .word EXTI2_3_IRQHandler /* EXTI Line 2 and 3 */ 136 .word EXTI4_15_IRQHandler /* EXTI Line 4 to 15 */ 137 .word 0 /* Reserved */ 138 .word DMA1_Channel1_IRQHandler /* DMA1 Channel 1 */ 139 .word DMA1_Channel2_3_IRQHandler /* DMA1 Channel 2 and Channel 3 */ 140 .word DMA1_Channel4_5_IRQHandler /* DMA1 Channel 4 and Channel 5 */ 141 .word ADC1_IRQHandler /* ADC1 */ 142 .word TIM1_BRK_UP_TRG_COM_IRQHandler /* TIM1 Break, Update, Trigger and Commutation */ 143 .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ 144 .word 0 /* Reserved */ 145 .word TIM3_IRQHandler /* TIM3 */ 146 .word 0 /* Reserved */ 147 .word 0 /* Reserved */ 148 .word TIM14_IRQHandler /* TIM14 */ 149 .word 0 /* Reserved */ 150 .word TIM16_IRQHandler /* TIM16 */ 151 .word TIM17_IRQHandler /* TIM17 */ 152 .word I2C1_IRQHandler /* I2C1 */ 153 .word 0 /* Reserved */ 154 .word SPI1_IRQHandler /* SPI1 */ 155 .word 0 /* Reserved */ 156 .word USART1_IRQHandler /* USART1 */ 157 .word 0 /* Reserved */ 158 .word 0 /* Reserved */ 159 .word 0 /* Reserved */ 160 .word 0 /* Reserved */ 161 162/******************************************************************************* 163* 164* Provide weak aliases for each Exception handler to the Default_Handler. 165* As they are weak aliases, any function with the same name will override 166* this definition. 167* 168*******************************************************************************/ 169 170 .weak NMI_Handler 171 .thumb_set NMI_Handler,Default_Handler 172 173 .weak HardFault_Handler 174 .thumb_set HardFault_Handler,Default_Handler 175 176 .weak SVC_Handler 177 .thumb_set SVC_Handler,Default_Handler 178 179 .weak PendSV_Handler 180 .thumb_set PendSV_Handler,Default_Handler 181 182 .weak SysTick_Handler 183 .thumb_set SysTick_Handler,Default_Handler 184 185 .weak WWDG_IRQHandler 186 .thumb_set WWDG_IRQHandler,Default_Handler 187 188 .weak RTC_IRQHandler 189 .thumb_set RTC_IRQHandler,Default_Handler 190 191 .weak FLASH_IRQHandler 192 .thumb_set FLASH_IRQHandler,Default_Handler 193 194 .weak RCC_IRQHandler 195 .thumb_set RCC_IRQHandler,Default_Handler 196 197 .weak EXTI0_1_IRQHandler 198 .thumb_set EXTI0_1_IRQHandler,Default_Handler 199 200 .weak EXTI2_3_IRQHandler 201 .thumb_set EXTI2_3_IRQHandler,Default_Handler 202 203 .weak EXTI4_15_IRQHandler 204 .thumb_set EXTI4_15_IRQHandler,Default_Handler 205 206 .weak DMA1_Channel1_IRQHandler 207 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler 208 209 .weak DMA1_Channel2_3_IRQHandler 210 .thumb_set DMA1_Channel2_3_IRQHandler,Default_Handler 211 212 .weak DMA1_Channel4_5_IRQHandler 213 .thumb_set DMA1_Channel4_5_IRQHandler,Default_Handler 214 215 .weak ADC1_IRQHandler 216 .thumb_set ADC1_IRQHandler,Default_Handler 217 218 .weak TIM1_BRK_UP_TRG_COM_IRQHandler 219 .thumb_set TIM1_BRK_UP_TRG_COM_IRQHandler,Default_Handler 220 221 .weak TIM1_CC_IRQHandler 222 .thumb_set TIM1_CC_IRQHandler,Default_Handler 223 224 .weak TIM3_IRQHandler 225 .thumb_set TIM3_IRQHandler,Default_Handler 226 227 .weak TIM14_IRQHandler 228 .thumb_set TIM14_IRQHandler,Default_Handler 229 230 .weak TIM16_IRQHandler 231 .thumb_set TIM16_IRQHandler,Default_Handler 232 233 .weak TIM17_IRQHandler 234 .thumb_set TIM17_IRQHandler,Default_Handler 235 236 .weak I2C1_IRQHandler 237 .thumb_set I2C1_IRQHandler,Default_Handler 238 239 .weak SPI1_IRQHandler 240 .thumb_set SPI1_IRQHandler,Default_Handler 241 242 .weak USART1_IRQHandler 243 .thumb_set USART1_IRQHandler,Default_Handler 244/** 245 ************************ (C) COPYRIGHT HKMicroChip *****END OF FILE***** 246 */ 247