1/*
2 * Copyright 2021-2023 HPMicro
3 * SPDX-License-Identifier: BSD-3-Clause
4 */
5
6ENTRY(_start)
7
8FLASH_SIZE = DEFINED(_flash_size) ? _flash_size : 1M;
9
10STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x4000;
11HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 32K;
12
13MEMORY
14{
15    XPI0 (rx) : ORIGIN = 0x80000000, LENGTH = FLASH_SIZE
16    ILM (wx) : ORIGIN = 0x00000000, LENGTH = 128K
17    DLM (w) : ORIGIN = 0x00080000, LENGTH = 128K
18    AHB_SRAM (w) : ORIGIN = 0xf0400000, LENGTH = 32K
19}
20
21__nor_cfg_option_load_addr__ = ORIGIN(XPI0) + 0x400;
22__boot_header_load_addr__ = ORIGIN(XPI0) + 0x1000;
23__app_load_addr__ = ORIGIN(XPI0) + 0x3000;
24__boot_header_length__ = __boot_header_end__ - __boot_header_start__;
25__app_offset__ = __app_load_addr__ - __boot_header_load_addr__;
26
27SECTIONS
28{
29    .nor_cfg_option __nor_cfg_option_load_addr__ : {
30        KEEP(*(.nor_cfg_option))
31    } > XPI0
32
33    .boot_header __boot_header_load_addr__ : {
34        __boot_header_start__ = .;
35        KEEP(*(.boot_header))
36        KEEP(*(.fw_info_table))
37        KEEP(*(.dc_info))
38        __boot_header_end__ = .;
39    } > XPI0
40
41    .start __app_load_addr__ : {
42        . = ALIGN(8);
43        KEEP(*(.start))
44    } > XPI0
45
46    __vector_load_addr__ = ADDR(.start) + SIZEOF(.start);
47    .vectors : AT(__vector_load_addr__) {
48        . = ALIGN(8);
49        __vector_ram_start__ = .;
50        KEEP(*(.vector_table))
51        KEEP(*(.isr_vector))
52        . = ALIGN(8);
53        __vector_ram_end__ = .;
54    } > ILM
55
56    .fast : AT(etext + __data_end__ - __tdata_start__) {
57        . = ALIGN(8);
58        __ramfunc_start__ = .;
59        *(.fast)
60
61        /* RT-Thread Core Start */
62        KEEP(*context_gcc.o(.text* .rodata*))
63        KEEP(*port*.o (.text .text* .rodata .rodata*))
64        KEEP(*interrupt_gcc.o (.text .text* .rodata .rodata*))
65        KEEP(*trap_common.o (.text .text* .rodata .rodata*))
66        KEEP(*irq.o (.text .text* .rodata .rodata*))
67        KEEP(*clock.o (.text .text* .rodata .rodata*))
68        KEEP(*kservice.o (.text .text* .rodata .rodata*))
69        KEEP(*scheduler.o (.text .text* .rodata .rodata*))
70        KEEP(*trap*.o (.text .text* .rodata .rodata*))
71        KEEP(*idle.o (.text .text* .rodata .rodata*))
72        KEEP(*ipc.o (.text .text* .rodata .rodata*))
73        KEEP(*thread.o (.text .text* .rodata .rodata*))
74        KEEP(*object.o (.text .text* .rodata .rodata*))
75        KEEP(*timer.o (.text .text* .rodata .rodata*))
76        KEEP(*mem.o (.text .text* .rodata .rodata*))
77        KEEP(*mempool.o (.text .text* .rodata .rodata*))
78        /* RT-Thread Core End */
79
80        . = ALIGN(8);
81        __ramfunc_end__ = .;
82    } > ILM
83
84    .text (__vector_load_addr__ + __vector_ram_end__ - __vector_ram_start__) : {
85        . = ALIGN(8);
86        *(.text)
87        *(.text*)
88        *(.rodata)
89        *(.rodata*)
90        *(.srodata)
91        *(.srodata*)
92
93        *(.hash)
94        *(.dyn*)
95        *(.gnu*)
96        *(.pl*)
97
98        KEEP(*(.eh_frame))
99        *(.eh_frame*)
100
101        KEEP (*(.init))
102        KEEP (*(.fini))
103        . = ALIGN(8);
104
105        /*********************************************
106         *
107         *      RT-Thread related sections - Start
108         *
109        *********************************************/
110        /* section information for utest */
111        . = ALIGN(4);
112        __rt_utest_tc_tab_start = .;
113        KEEP(*(UtestTcTab))
114        __rt_utest_tc_tab_end = .;
115
116        /* section information for finsh shell */
117        . = ALIGN(4);
118        __fsymtab_start = .;
119        KEEP(*(FSymTab))
120        __fsymtab_end = .;
121        . = ALIGN(4);
122        __vsymtab_start = .;
123        KEEP(*(VSymTab))
124        __vsymtab_end = .;
125        . = ALIGN(4);
126
127        . = ALIGN(4);
128        __rt_init_start = .;
129        KEEP(*(SORT(.rti_fn*)))
130        __rt_init_end = .;
131        . = ALIGN(4);
132
133        /* section information for modules */
134        . = ALIGN(4);
135        __rtmsymtab_start = .;
136        KEEP(*(RTMSymTab))
137        __rtmsymtab_end = .;
138
139        /* RT-Thread related sections - end */
140
141        /* section information for usbh class */
142        . = ALIGN(8);
143        __usbh_class_info_start__ = .;
144        KEEP(*(.usbh_class_info))
145        __usbh_class_info_end__ = .;
146
147    } > XPI0
148
149    .rel : {
150        KEEP(*(.rel*))
151    } > XPI0
152
153    PROVIDE (__etext = .);
154    PROVIDE (_etext = .);
155    PROVIDE (etext = .);
156
157    .fast_ram (NOLOAD) : {
158        KEEP(*(.fast_ram))
159    } > DLM
160
161    .bss(NOLOAD) : {
162        . = ALIGN(8);
163        __bss_start__ = .;
164        *(.bss)
165        *(.bss*)
166        *(.sbss*)
167        *(.scommon)
168        *(.scommon*)
169        *(.dynsbss*)
170        *(COMMON)
171        . = ALIGN(8);
172        _end = .;
173        __bss_end__ = .;
174    } > DLM
175
176    /* Note: the .tbss and .tdata section should be adjacent */
177    .tbss(NOLOAD) : {
178        . = ALIGN(8);
179        __tbss_start__ = .;
180        *(.tbss*)
181        *(.tcommon*)
182        _end = .;
183        __tbss_end__ = .;
184    } > DLM
185
186    .tdata : AT(etext) {
187        . = ALIGN(8);
188        __tdata_start__ = .;
189        __thread_pointer = .;
190        *(.tdata)
191        *(.tdata*)
192        . = ALIGN(8);
193        __tdata_end__ = .;
194    } > DLM
195
196    .data : AT(etext + __tdata_end__ - __tdata_start__) {
197        . = ALIGN(8);
198        __data_start__ = .;
199        __global_pointer$ = . + 0x800;
200        *(.data)
201        *(.data*)
202        *(.sdata)
203        *(.sdata*)
204
205        KEEP(*(.jcr))
206        KEEP(*(.dynamic))
207        KEEP(*(.got*))
208        KEEP(*(.got))
209        KEEP(*(.gcc_except_table))
210        KEEP(*(.gcc_except_table.*))
211
212        . = ALIGN(8);
213        PROVIDE(__preinit_array_start = .);
214        KEEP(*(.preinit_array))
215        PROVIDE(__preinit_array_end = .);
216
217        . = ALIGN(8);
218        PROVIDE(__init_array_start = .);
219        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)))
220        KEEP(*(.init_array))
221        PROVIDE(__init_array_end = .);
222
223        . = ALIGN(8);
224        PROVIDE(__finit_array_start = .);
225        KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
226        KEEP(*(.finit_array))
227        PROVIDE(__finit_array_end = .);
228
229        . = ALIGN(8);
230        PROVIDE(__ctors_start__ = .);
231        KEEP(*crtbegin*.o(.ctors))
232        KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors))
233        KEEP(*(SORT(.ctors.*)))
234        KEEP(*(.ctors))
235        PROVIDE(__ctors_end__ = .);
236
237        . = ALIGN(8);
238        KEEP(*crtbegin*.o(.dtors))
239        KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors))
240        KEEP(*(SORT(.dtors.*)))
241        KEEP(*(.dtors))
242        . = ALIGN(8);
243        __data_end__ = .;
244        PROVIDE (__edata = .);
245        PROVIDE (_edata = .);
246        PROVIDE (edata = .);
247    } > DLM
248    __fw_size__ = __data_end__ - __tdata_start__ + etext - __app_load_addr__;
249
250    .heap(NOLOAD) : {
251        . = ALIGN(8);
252        __heap_start__ = .;
253        . += HEAP_SIZE;
254        __heap_end__ = .;
255    } > DLM
256
257
258    .stack(NOLOAD) : {
259        . = ALIGN(8);
260        __stack_base__ = .;
261        . += STACK_SIZE;
262        . = ALIGN(8);
263        PROVIDE (_stack = .);
264        PROVIDE (_stack_in_dlm = .);
265        PROVIDE( __rt_rvstack = . );
266    } > DLM
267
268    .noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) {
269        . = ALIGN(8);
270        __noncacheable_init_start__ = .;
271        KEEP(*(.noncacheable.init))
272        __noncacheable_init_end__ = .;
273        . = ALIGN(8);
274    } > DLM
275
276    .noncacheable.bss (NOLOAD) : {
277        . = ALIGN(8);
278        KEEP(*(.noncacheable))
279        __noncacheable_bss_start__ = .;
280        KEEP(*(.noncacheable.bss))
281        __noncacheable_bss_end__ = .;
282        . = ALIGN(8);
283    } > DLM
284
285    .ahb_sram (NOLOAD) : {
286        KEEP(*(.ahb_sram))
287    } > AHB_SRAM
288
289    /* __noncacheable_start__ = ORIGIN(NONCACHEABLE_RAM);
290    __noncacheable_end__ = ORIGIN(NONCACHEABLE_RAM) + LENGTH(NONCACHEABLE_RAM);
291    __share_mem_start__ = ORIGIN(SHARE_RAM);
292    __share_mem_end__ = ORIGIN(SHARE_RAM) + LENGTH(SHARE_RAM); */
293
294}
295