1/*
2 * Copyright 2021-2023 HPMicro
3 * SPDX-License-Identifier: BSD-3-Clause
4 */
5
6ENTRY(_start)
7
8STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x4000;
9HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 144K;
10FLASH_SIZE = DEFINED(_flash_size) ? _flash_size : 16M;
11NONCACHEABLE_SIZE = DEFINED(_noncacheable_size) ? _noncacheable_size : 0x4000;
12
13MEMORY
14{
15    XPI0 (rx) : ORIGIN = 0x80000000, LENGTH = FLASH_SIZE
16    ILM (wx) : ORIGIN = 0, LENGTH = 128K
17    DLM (w) : ORIGIN = 0x80000, LENGTH = 128K
18    NONCACHEABLE_RAM (wx) : ORIGIN = 0x01080000, LENGTH = 64K
19    AXI_SRAM  (wx) : ORIGIN = 0x01090000, LENGTH = 176K
20    SHARE_RAM (w) : ORIGIN = 0x010BC000, LENGTH = 16K
21    AHB_SRAM (w) : ORIGIN = 0xF0300000, LENGTH = 32k
22}
23
24__nor_cfg_option_load_addr__ = ORIGIN(XPI0) + 0x400;
25__boot_header_load_addr__ = ORIGIN(XPI0) + 0x1000;
26__app_load_addr__ = ORIGIN(XPI0) + 0x3000;
27__boot_header_length__ = __boot_header_end__ - __boot_header_start__;
28__app_offset__ = __app_load_addr__ - __boot_header_load_addr__;
29
30SECTIONS
31{
32    .nor_cfg_option __nor_cfg_option_load_addr__ : {
33        KEEP(*(.nor_cfg_option))
34    } > XPI0
35
36    .boot_header __boot_header_load_addr__ : {
37        __boot_header_start__ = .;
38        KEEP(*(.boot_header))
39        KEEP(*(.fw_info_table))
40        KEEP(*(.dc_info))
41        __boot_header_end__ = .;
42    } > XPI0
43
44    .start __app_load_addr__ : {
45        . = ALIGN(8);
46        KEEP(*(.start))
47    } > XPI0
48
49    __vector_load_addr__ = ADDR(.start) + SIZEOF(.start);
50    .vectors : AT(__vector_load_addr__) {
51        . = ALIGN(8);
52        __vector_ram_start__ = .;
53        KEEP(*(.vector_table))
54        KEEP(*(.isr_vector))
55        . = ALIGN(8);
56        __vector_ram_end__ = .;
57    } > ILM
58
59    .fast : AT(etext + __data_end__ - __tdata_start__) {
60        . = ALIGN(8);
61        __ramfunc_start__ = .;
62        *(.fast)
63
64        /* RT-Thread Core Start */
65        KEEP(*context_gcc.o(.text* .rodata*))
66        KEEP(*port*.o (.text .text* .rodata .rodata*))
67        KEEP(*interrupt_gcc.o (.text .text* .rodata .rodata*))
68        KEEP(*trap_common.o (.text .text* .rodata .rodata*))
69        KEEP(*irq.o (.text .text* .rodata .rodata*))
70        KEEP(*clock.o (.text .text* .rodata .rodata*))
71        KEEP(*kservice.o (.text .text* .rodata .rodata*))
72        KEEP(*scheduler.o (.text .text* .rodata .rodata*))
73        KEEP(*trap*.o (.text .text* .rodata .rodata*))
74        KEEP(*idle.o (.text .text* .rodata .rodata*))
75        KEEP(*ipc.o (.text .text* .rodata .rodata*))
76        KEEP(*thread.o (.text .text* .rodata .rodata*))
77        KEEP(*object.o (.text .text* .rodata .rodata*))
78        KEEP(*timer.o (.text .text* .rodata .rodata*))
79        KEEP(*mem.o (.text .text* .rodata .rodata*))
80        KEEP(*mempool.o (.text .text* .rodata .rodata*))
81        /* RT-Thread Core End */
82
83        . = ALIGN(8);
84        __ramfunc_end__ = .;
85    } > ILM
86
87    .text (__vector_load_addr__ + __vector_ram_end__ - __vector_ram_start__) : {
88        . = ALIGN(8);
89        *(.text)
90        *(.text*)
91        *(.rodata)
92        *(.rodata*)
93        *(.srodata)
94        *(.srodata*)
95
96        *(.hash)
97        *(.dyn*)
98        *(.gnu*)
99        *(.pl*)
100
101        KEEP(*(.eh_frame))
102        *(.eh_frame*)
103
104        KEEP (*(.init))
105        KEEP (*(.fini))
106        . = ALIGN(8);
107
108        /*********************************************
109         *
110         *      RT-Thread related sections - Start
111         *
112        *********************************************/
113        /* section information for utest */
114        . = ALIGN(4);
115        __rt_utest_tc_tab_start = .;
116        KEEP(*(UtestTcTab))
117        __rt_utest_tc_tab_end = .;
118
119        /* section information for finsh shell */
120        . = ALIGN(4);
121        __fsymtab_start = .;
122        KEEP(*(FSymTab))
123        __fsymtab_end = .;
124        . = ALIGN(4);
125        __vsymtab_start = .;
126        KEEP(*(VSymTab))
127        __vsymtab_end = .;
128        . = ALIGN(4);
129
130        . = ALIGN(4);
131        __rt_init_start = .;
132        KEEP(*(SORT(.rti_fn*)))
133        __rt_init_end = .;
134        . = ALIGN(4);
135
136        /* section information for modules */
137        . = ALIGN(4);
138        __rtmsymtab_start = .;
139        KEEP(*(RTMSymTab))
140        __rtmsymtab_end = .;
141
142        /* RT-Thread related sections - end */
143
144        /* section information for usbh class */
145        . = ALIGN(8);
146        __usbh_class_info_start__ = .;
147        KEEP(*(.usbh_class_info))
148        __usbh_class_info_end__ = .;
149
150    } > XPI0
151
152    .rel : {
153        KEEP(*(.rel*))
154    } > XPI0
155
156    PROVIDE (__etext = .);
157    PROVIDE (_etext = .);
158    PROVIDE (etext = .);
159
160    .fast_ram (NOLOAD) : {
161        KEEP(*(.fast_ram))
162    } > DLM
163
164    .bss(NOLOAD) : {
165        . = ALIGN(8);
166        __bss_start__ = .;
167        *(.bss)
168        *(.bss*)
169        *(.sbss*)
170        *(.scommon)
171        *(.scommon*)
172        *(.dynsbss*)
173        *(COMMON)
174        . = ALIGN(8);
175        _end = .;
176        __bss_end__ = .;
177    } > DLM
178
179    /* Note: the .tbss and .tdata section should be adjacent */
180    .tbss(NOLOAD) : {
181        . = ALIGN(8);
182        __tbss_start__ = .;
183        *(.tbss*)
184        *(.tcommon*)
185        _end = .;
186        __tbss_end__ = .;
187    } > DLM
188
189    .tdata : AT(etext) {
190        . = ALIGN(8);
191        __tdata_start__ = .;
192        __thread_pointer = .;
193        *(.tdata)
194        *(.tdata*)
195        . = ALIGN(8);
196        __tdata_end__ = .;
197    } > DLM
198
199    .data : AT(etext + __tdata_end__ - __tdata_start__) {
200        . = ALIGN(8);
201        __data_start__ = .;
202        __global_pointer$ = . + 0x800;
203        *(.data)
204        *(.data*)
205        *(.sdata)
206        *(.sdata*)
207
208        KEEP(*(.jcr))
209        KEEP(*(.dynamic))
210        KEEP(*(.got*))
211        KEEP(*(.got))
212        KEEP(*(.gcc_except_table))
213        KEEP(*(.gcc_except_table.*))
214
215        . = ALIGN(8);
216        PROVIDE(__preinit_array_start = .);
217        KEEP(*(.preinit_array))
218        PROVIDE(__preinit_array_end = .);
219
220        . = ALIGN(8);
221        PROVIDE(__init_array_start = .);
222        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)))
223        KEEP(*(.init_array))
224        PROVIDE(__init_array_end = .);
225
226        . = ALIGN(8);
227        PROVIDE(__finit_array_start = .);
228        KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
229        KEEP(*(.finit_array))
230        PROVIDE(__finit_array_end = .);
231
232        . = ALIGN(8);
233        PROVIDE(__ctors_start__ = .);
234        KEEP(*crtbegin*.o(.ctors))
235        KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors))
236        KEEP(*(SORT(.ctors.*)))
237        KEEP(*(.ctors))
238        PROVIDE(__ctors_end__ = .);
239
240        . = ALIGN(8);
241        KEEP(*crtbegin*.o(.dtors))
242        KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors))
243        KEEP(*(SORT(.dtors.*)))
244        KEEP(*(.dtors))
245        . = ALIGN(8);
246        __data_end__ = .;
247        PROVIDE (__edata = .);
248        PROVIDE (_edata = .);
249        PROVIDE (edata = .);
250    } > DLM
251    __fw_size__ = __data_end__ - __tdata_start__ + etext - __app_load_addr__;
252
253    .heap(NOLOAD) : {
254        . = ALIGN(8);
255        __heap_start__ = .;
256        . += HEAP_SIZE;
257        __heap_end__ = .;
258    } > AXI_SRAM
259
260
261    .stack(NOLOAD) : {
262        . = ALIGN(8);
263        __stack_base__ = .;
264        . += STACK_SIZE;
265        . = ALIGN(8);
266        PROVIDE (_stack = .);
267        PROVIDE (_stack_in_dlm = .);
268        PROVIDE( __rt_rvstack = . );
269    } > DLM
270
271    .noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) {
272        . = ALIGN(8);
273        __noncacheable_init_start__ = .;
274        KEEP(*(.noncacheable.init))
275        __noncacheable_init_end__ = .;
276        . = ALIGN(8);
277    } > NONCACHEABLE_RAM
278
279    .noncacheable.bss (NOLOAD) : {
280        . = ALIGN(8);
281        KEEP(*(.noncacheable))
282        __noncacheable_bss_start__ = .;
283        KEEP(*(.noncacheable.bss))
284        __noncacheable_bss_end__ = .;
285        . = ALIGN(8);
286    } > NONCACHEABLE_RAM
287
288    .ahb_sram (NOLOAD) : {
289        KEEP(*(.ahb_sram))
290    } > AHB_SRAM
291
292    __noncacheable_start__ = ORIGIN(NONCACHEABLE_RAM);
293    __noncacheable_end__ = ORIGIN(NONCACHEABLE_RAM) + LENGTH(NONCACHEABLE_RAM);
294    __share_mem_start__ = ORIGIN(SHARE_RAM);
295    __share_mem_end__ = ORIGIN(SHARE_RAM) + LENGTH(SHARE_RAM);
296
297}
298