1/*
2 * Copyright 2021-2023 HPMicro
3 * SPDX-License-Identifier: BSD-3-Clause
4 */
5
6ENTRY(_start)
7
8STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x2000;
9HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 0x8000;
10NONCACHEABLE_SIZE = DEFINED(_noncacheable_size) ? _noncacheable_size : 0x10000;
11
12MEMORY
13{
14    ILM (wx) : ORIGIN = 0, LENGTH = 128K
15    DLM (w) : ORIGIN = 0x80000, LENGTH = 96K
16    NONCACHEABLE_RAM (wx) : ORIGIN = 0x90000, LENGTH = NONCACHEABLE_SIZE
17    AXI_SRAM  (wx) : ORIGIN = 0x01084000, LENGTH = 224K
18    SHARE_RAM (w) : ORIGIN = 0x010BC000, LENGTH = 16K
19    AHB_SRAM (w) : ORIGIN = 0xF0300000, LENGTH = 32k
20}
21
22SECTIONS
23{
24    .start : {
25        . = ALIGN(8);
26        KEEP(*(.start))
27    } > ILM
28
29    .vectors : {
30        . = ALIGN(8);
31        KEEP(*(.isr_vector))
32        KEEP(*(.vector_table))
33        . = ALIGN(8);
34    } > ILM
35
36    .text : {
37        . = ALIGN(8);
38        *(.text)
39        *(.text*)
40        *(.rodata)
41        *(.rodata*)
42        *(.srodata)
43        *(.srodata*)
44
45        *(.hash)
46        *(.dyn*)
47        *(.gnu*)
48        *(.pl*)
49        *(FalPartTable)
50
51        KEEP(*(.eh_frame))
52        *(.eh_frame*)
53
54        KEEP (*(.init))
55        KEEP (*(.fini))
56        . = ALIGN(8);
57
58        /*********************************************
59         *
60         *      RT-Thread related sections - Start
61         *
62        *********************************************/
63        /* section information for finsh shell */
64        . = ALIGN(4);
65        __fsymtab_start = .;
66        KEEP(*(FSymTab))
67        __fsymtab_end = .;
68        . = ALIGN(4);
69        __vsymtab_start = .;
70        KEEP(*(VSymTab))
71        __vsymtab_end = .;
72        . = ALIGN(4);
73
74        . = ALIGN(4);
75        __rt_init_start = .;
76        KEEP(*(SORT(.rti_fn*)))
77        __rt_init_end = .;
78        . = ALIGN(4);
79
80        /* section information for modules */
81        . = ALIGN(4);
82        __rtmsymtab_start = .;
83        KEEP(*(RTMSymTab))
84        __rtmsymtab_end = .;
85
86        /* RT-Thread related sections - end */
87
88        /* section information for usbh class */
89        . = ALIGN(8);
90        __usbh_class_info_start__ = .;
91        KEEP(*(.usbh_class_info))
92        __usbh_class_info_end__ = .;
93
94        PROVIDE (__etext = .);
95        PROVIDE (_etext = .);
96        PROVIDE (etext = .);
97    } > AXI_SRAM
98
99    .rel : {
100        KEEP(*(.rel*))
101    } > AXI_SRAM
102
103    .fast_ram (NOLOAD) : {
104        KEEP(*(.fast_ram))
105    } > DLM
106
107    .bss(NOLOAD) : {
108        . = ALIGN(8);
109        __bss_start__ = .;
110        *(.bss)
111        *(.bss*)
112        *(.sbss*)
113        *(.scommon)
114        *(.scommon*)
115        *(.dynsbss*)
116        *(COMMON)
117        . = ALIGN(8);
118        _end = .;
119        __bss_end__ = .;
120    } > DLM
121
122    /* Note: .tbss and .tdata should be adjacent */
123    .tbss(NOLOAD) : {
124        . = ALIGN(8);
125        __tbss_start__ = .;
126        *(.tbss*)
127        *(.tcommon*)
128        _end = .;
129        __tbss_end__ = .;
130    } > DLM
131
132    .tdata : AT(etext) {
133        . = ALIGN(8);
134        __tdata_start__ = .;
135        __thread_pointer = .;
136        *(.tdata)
137        *(.tdata*)
138        . = ALIGN(8);
139        __tdata_end__ = .;
140    } > DLM
141
142    .data : AT(etext + __tdata_end__ - __tdata_start__) {
143        . = ALIGN(8);
144        __data_start__ = .;
145        __global_pointer$ = . + 0x800;
146        *(.data)
147        *(.data*)
148        *(.sdata)
149        *(.sdata*)
150
151        KEEP(*(.jcr))
152        KEEP(*(.dynamic))
153        KEEP(*(.got*))
154        KEEP(*(.got))
155        KEEP(*(.gcc_except_table))
156        KEEP(*(.gcc_except_table.*))
157
158        . = ALIGN(8);
159        PROVIDE(__preinit_array_start = .);
160        KEEP(*(.preinit_array))
161        PROVIDE(__preinit_array_end = .);
162
163        . = ALIGN(8);
164        PROVIDE(__init_array_start = .);
165        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)))
166        KEEP(*(.init_array))
167        PROVIDE(__init_array_end = .);
168
169        . = ALIGN(8);
170        PROVIDE(__finit_array_start = .);
171        KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
172        KEEP(*(.finit_array))
173        PROVIDE(__finit_array_end = .);
174
175        . = ALIGN(8);
176        PROVIDE(__ctors_start__ = .);
177        KEEP(*crtbegin*.o(.ctors))
178        KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors))
179        KEEP(*(SORT(.ctors.*)))
180        KEEP(*(.ctors))
181        PROVIDE(__ctors_end__ = .);
182
183        . = ALIGN(8);
184        KEEP(*crtbegin*.o(.dtors))
185        KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors))
186        KEEP(*(SORT(.dtors.*)))
187        KEEP(*(.dtors))
188
189        . = ALIGN(8);
190        __data_end__ = .;
191        PROVIDE (__edata = .);
192        PROVIDE (_edata = .);
193        PROVIDE (edata = .);
194    } > DLM
195
196    .fast : AT(etext + __data_end__ - __tdata_start__) {
197        . = ALIGN(8);
198        PROVIDE(__ramfunc_start__ = .);
199        *(.fast)
200        . = ALIGN(8);
201        PROVIDE(__ramfunc_end__ = .);
202    } > ILM
203
204    .noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) {
205        . = ALIGN(8);
206        __noncacheable_init_start__ = .;
207        KEEP(*(.noncacheable.init))
208        __noncacheable_init_end__ = .;
209        . = ALIGN(8);
210    } > NONCACHEABLE_RAM
211
212    .sh_mem (NOLOAD) : {
213        KEEP(*(.sh_mem))
214    } > SHARE_RAM
215    __share_mem_start__ = ORIGIN(SHARE_RAM);
216    __share_mem_end__ = ORIGIN(SHARE_RAM) + LENGTH(SHARE_RAM);
217
218    .noncacheable.bss (NOLOAD) : {
219        . = ALIGN(8);
220        KEEP(*(.noncacheable))
221        __noncacheable_bss_start__ = .;
222        KEEP(*(.noncacheable.bss))
223        __noncacheable_bss_end__ = .;
224        . = ALIGN(8);
225    } > NONCACHEABLE_RAM
226
227    __noncacheable_start__ = ORIGIN(NONCACHEABLE_RAM);
228    __noncacheable_end__ = ORIGIN(NONCACHEABLE_RAM) + LENGTH(NONCACHEABLE_RAM);
229
230     .ahb_sram (NOLOAD) : {
231        KEEP(*(.ahb_sram))
232    } > AHB_SRAM
233
234    .stack(NOLOAD) : {
235        . = ALIGN(8);
236        __stack_base__ = .;
237        . += STACK_SIZE;
238        PROVIDE (_stack = .);
239        PROVIDE (_stack_in_dlm = .);
240        PROVIDE (__rt_rvstack = .);
241    } > DLM
242
243    .heap (NOLOAD) : {
244        . = ALIGN(8);
245        __heap_start__ = .;
246        . += HEAP_SIZE;
247        __heap_end__ = .;
248
249    } > DLM
250}
251