1/*
2 * Copyright 2021-2023 HPMicro
3 * SPDX-License-Identifier: BSD-3-Clause
4 */
5
6ENTRY(_start)
7
8STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x4000;
9HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 128K;
10FLASH_SIZE = DEFINED(_flash_size) ? _flash_size : 16M;
11NONCACHEABLE_SIZE = DEFINED(_noncacheable_size) ? _noncacheable_size : 128K;
12SDRAM_SIZE = DEFINED(_sdram_size) ? _sdram_size : 32M;
13
14MEMORY
15{
16    XPI0 (rx) : ORIGIN = 0x80000000, LENGTH = FLASH_SIZE
17    ILM (wx) : ORIGIN = 0, LENGTH = 128K
18    DLM (w) : ORIGIN = 0x80000, LENGTH = 128K
19    AXI_SRAM (wx) : ORIGIN = 0x1080000, LENGTH = 384K
20    NONCACHEABLE_RAM (wx) : ORIGIN = 0x10E0000, LENGTH = NONCACHEABLE_SIZE
21    SDRAM (wx) : ORIGIN = 0x40000000, LENGTH = SDRAM_SIZE
22    AHB_SRAM (w) : ORIGIN = 0xF0300000, LENGTH = 32k
23    APB_SRAM (w): ORIGIN = 0xF40F0000, LENGTH = 8k
24}
25
26__nor_cfg_option_load_addr__ = ORIGIN(XPI0) + 0x400;
27__boot_header_load_addr__ = ORIGIN(XPI0) + 0x1000;
28__app_load_addr__ = ORIGIN(XPI0) + 0x3000;
29__boot_header_length__ = __boot_header_end__ - __boot_header_start__;
30__app_offset__ = __app_load_addr__ - __boot_header_load_addr__;
31
32SECTIONS
33{
34    .nor_cfg_option __nor_cfg_option_load_addr__ : {
35        KEEP(*(.nor_cfg_option))
36    } > XPI0
37
38    .boot_header __boot_header_load_addr__ : {
39        __boot_header_start__ = .;
40        KEEP(*(.boot_header))
41        KEEP(*(.fw_info_table))
42        KEEP(*(.dc_info))
43        __boot_header_end__ = .;
44    } > XPI0
45
46    .start __app_load_addr__ : {
47        . = ALIGN(8);
48        KEEP(*(.start))
49    } > XPI0
50
51    __vector_load_addr__ = ADDR(.start) + SIZEOF(.start);
52    .vectors : AT(__vector_load_addr__) {
53        . = ALIGN(8);
54        __vector_ram_start__ = .;
55        KEEP(*(.vector_table))
56        KEEP(*(.isr_vector))
57
58        . = ALIGN(8);
59        __vector_ram_end__ = .;
60    } > AXI_SRAM
61
62    .fast : AT(etext + __data_end__ - __tdata_start__) {
63        . = ALIGN(8);
64        __ramfunc_start__ = .;
65        *(.fast)
66
67        /* RT-Thread Core Start */
68        KEEP(*context_gcc.o(.text* .rodata*))
69        KEEP(*port*.o (.text .text* .rodata .rodata*))
70        KEEP(*interrupt_gcc.o (.text .text* .rodata .rodata*))
71        KEEP(*trap_common.o (.text .text* .rodata .rodata*))
72        KEEP(*irq.o (.text .text* .rodata .rodata*))
73        KEEP(*clock.o (.text .text* .rodata .rodata*))
74        KEEP(*kservice.o (.text .text* .rodata .rodata*))
75        KEEP(*scheduler.o (.text .text* .rodata .rodata*))
76        KEEP(*trap*.o (.text .text* .rodata .rodata*))
77        KEEP(*idle.o (.text .text* .rodata .rodata*))
78        KEEP(*ipc.o (.text .text* .rodata .rodata*))
79        KEEP(*thread.o (.text .text* .rodata .rodata*))
80        KEEP(*object.o (.text .text* .rodata .rodata*))
81        KEEP(*timer.o (.text .text* .rodata .rodata*))
82        KEEP(*mem.o (.text .text* .rodata .rodata*))
83        KEEP(*mempool.o (.text .text* .rodata .rodata*))
84        /* RT-Thread Core End */
85
86        /* HPMicro Driver Wrapper */
87        KEEP(*drv_*.o (.text .text* .rodata .rodata*))
88
89        . = ALIGN(8);
90        __ramfunc_end__ = .;
91    } > AXI_SRAM
92
93    .text (__vector_load_addr__ + __vector_ram_end__ - __vector_ram_start__) : {
94        . = ALIGN(8);
95        *(.text)
96        *(.text*)
97        *(.rodata)
98        *(.rodata*)
99        *(.srodata)
100        *(.srodata*)
101
102        *(.hash)
103        *(.dyn*)
104        *(.gnu*)
105        *(.pl*)
106
107        KEEP(*(.eh_frame))
108        *(.eh_frame*)
109
110        KEEP (*(.init))
111        KEEP (*(.fini))
112        . = ALIGN(8);
113
114        /*********************************************
115         *
116         *      RT-Thread related sections - Start
117         *
118        *********************************************/
119        /* section information for utest */
120        . = ALIGN(4);
121        __rt_utest_tc_tab_start = .;
122        KEEP(*(UtestTcTab))
123        __rt_utest_tc_tab_end = .;
124
125        /* section information for finsh shell */
126        . = ALIGN(4);
127        __fsymtab_start = .;
128        KEEP(*(FSymTab))
129        __fsymtab_end = .;
130        . = ALIGN(4);
131        __vsymtab_start = .;
132        KEEP(*(VSymTab))
133        __vsymtab_end = .;
134        . = ALIGN(4);
135
136        . = ALIGN(4);
137        __rt_init_start = .;
138        KEEP(*(SORT(.rti_fn*)))
139        __rt_init_end = .;
140        . = ALIGN(4);
141
142        /* section information for modules */
143        . = ALIGN(4);
144        __rtmsymtab_start = .;
145        KEEP(*(RTMSymTab))
146        __rtmsymtab_end = .;
147
148        /* RT-Thread related sections - end */
149
150        /* section information for usbh class */
151        . = ALIGN(8);
152        __usbh_class_info_start__ = .;
153        KEEP(*(.usbh_class_info))
154        __usbh_class_info_end__ = .;
155
156    } > XPI0
157
158    .rel : {
159        KEEP(*(.rel*))
160    } > XPI0
161
162    PROVIDE (__etext = .);
163    PROVIDE (_etext = .);
164    PROVIDE (etext = .);
165
166    .fast_ram (NOLOAD) : {
167        KEEP(*(.fast_ram))
168    } > DLM
169
170    .bss(NOLOAD) : {
171        . = ALIGN(8);
172        __bss_start__ = .;
173        *(.bss)
174        *(.bss*)
175        *(.sbss*)
176        *(.scommon)
177        *(.scommon*)
178        *(.dynsbss*)
179        *(COMMON)
180        . = ALIGN(8);
181        _end = .;
182        __bss_end__ = .;
183    } > AXI_SRAM
184
185    /* Note: the .tbss and .tdata section should be adjacent */
186    .tbss(NOLOAD) : {
187        . = ALIGN(8);
188        __tbss_start__ = .;
189        *(.tbss*)
190        *(.tcommon*)
191        _end = .;
192        __tbss_end__ = .;
193    } > AXI_SRAM
194
195    .tdata : AT(etext) {
196        . = ALIGN(8);
197        __tdata_start__ = .;
198        __thread_pointer = .;
199        *(.tdata)
200        *(.tdata*)
201        . = ALIGN(8);
202        __tdata_end__ = .;
203    } > AXI_SRAM
204
205    .data : AT(etext + __tdata_end__ - __tdata_start__) {
206        . = ALIGN(8);
207        __data_start__ = .;
208        __global_pointer$ = . + 0x800;
209        *(.data)
210        *(.data*)
211        *(.sdata)
212        *(.sdata*)
213
214        KEEP(*(.jcr))
215        KEEP(*(.dynamic))
216        KEEP(*(.got*))
217        KEEP(*(.got))
218        KEEP(*(.gcc_except_table))
219        KEEP(*(.gcc_except_table.*))
220
221        . = ALIGN(8);
222        PROVIDE(__preinit_array_start = .);
223        KEEP(*(.preinit_array))
224        PROVIDE(__preinit_array_end = .);
225
226        . = ALIGN(8);
227        PROVIDE(__init_array_start = .);
228        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)))
229        KEEP(*(.init_array))
230        PROVIDE(__init_array_end = .);
231
232        . = ALIGN(8);
233        PROVIDE(__finit_array_start = .);
234        KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
235        KEEP(*(.finit_array))
236        PROVIDE(__finit_array_end = .);
237
238        . = ALIGN(8);
239        PROVIDE(__ctors_start__ = .);
240        KEEP(*crtbegin*.o(.ctors))
241        KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors))
242        KEEP(*(SORT(.ctors.*)))
243        KEEP(*(.ctors))
244        PROVIDE(__ctors_end__ = .);
245
246        . = ALIGN(8);
247        KEEP(*crtbegin*.o(.dtors))
248        KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors))
249        KEEP(*(SORT(.dtors.*)))
250        KEEP(*(.dtors))
251        . = ALIGN(8);
252        __data_end__ = .;
253        PROVIDE (__edata = .);
254        PROVIDE (_edata = .);
255        PROVIDE (edata = .);
256    } > AXI_SRAM
257    __fw_size__ = __data_end__ - __tdata_start__ + etext - __app_load_addr__;
258
259    .heap(NOLOAD) : {
260        . = ALIGN(8);
261        __heap_start__ = .;
262        . += HEAP_SIZE;
263        __heap_end__ = .;
264    } > AXI_SRAM
265
266    .framebuffer (NOLOAD) : {
267        . = ALIGN(8);
268        KEEP(*(.framebuffer))
269        . = ALIGN(8);
270    } > AXI_SRAM
271
272    .stack(NOLOAD) : {
273        . = ALIGN(8);
274        __stack_base__ = .;
275        . += STACK_SIZE;
276        . = ALIGN(8);
277        PROVIDE (_stack = .);
278        PROVIDE (_stack_in_dlm = .);
279        PROVIDE( __rt_rvstack = . );
280    } > AXI_SRAM
281
282    .noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) {
283        . = ALIGN(8);
284        __noncacheable_init_start__ = .;
285        KEEP(*(.noncacheable.init))
286        __noncacheable_init_end__ = .;
287        . = ALIGN(8);
288    } > NONCACHEABLE_RAM
289
290    .noncacheable.bss (NOLOAD) : {
291        . = ALIGN(8);
292        KEEP(*(.noncacheable))
293        __noncacheable_bss_start__ = .;
294        KEEP(*(.noncacheable.bss))
295        __noncacheable_bss_end__ = .;
296        . = ALIGN(8);
297    } > NONCACHEABLE_RAM
298
299    .ahb_sram (NOLOAD) : {
300        KEEP(*(.ahb_sram))
301    } > AHB_SRAM
302
303    .apb_sram (NOLOAD) : {
304        KEEP(*(.backup_sram))
305    } > APB_SRAM
306
307    __noncacheable_start__ = ORIGIN(NONCACHEABLE_RAM);
308    __noncacheable_end__ = ORIGIN(NONCACHEABLE_RAM) + LENGTH(NONCACHEABLE_RAM);
309
310    .sdram (NOLOAD) : {
311        . = ALIGN(8);
312        __sdram_start__ = .;
313        . += SDRAM_SIZE;
314        __sdram_end__ = .;
315    } > SDRAM
316}
317