1/* 2 * Copyright 2021-2023 HPMicro 3 * SPDX-License-Identifier: BSD-3-Clause 4 */ 5 6ENTRY(_start) 7 8STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x4000; 9HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 128K; 10FLASH_SIZE = DEFINED(_flash_size) ? _flash_size : 16M; 11NONCACHEABLE_SIZE = DEFINED(_noncacheable_size) ? _noncacheable_size : 128K; 12SDRAM_SIZE = DEFINED(_sdram_size) ? _sdram_size : 32M; 13 14MEMORY 15{ 16 XPI0 (rx) : ORIGIN = 0x80000000, LENGTH = FLASH_SIZE 17 ILM (wx) : ORIGIN = 0, LENGTH = 128K 18 DLM (w) : ORIGIN = 0x80000, LENGTH = 128K 19 AXI_SRAM (wx) : ORIGIN = 0x1080000, LENGTH = 384K 20 NONCACHEABLE_RAM (wx) : ORIGIN = 0x10E0000, LENGTH = NONCACHEABLE_SIZE 21 SDRAM (wx) : ORIGIN = 0x40000000, LENGTH = SDRAM_SIZE 22 AHB_SRAM (w) : ORIGIN = 0xF0300000, LENGTH = 32k 23 APB_SRAM (w): ORIGIN = 0xF40F0000, LENGTH = 8k 24} 25 26__nor_cfg_option_load_addr__ = ORIGIN(XPI0) + 0x400; 27__boot_header_load_addr__ = ORIGIN(XPI0) + 0x1000; 28__app_load_addr__ = ORIGIN(XPI0) + 0x3000; 29__boot_header_length__ = __boot_header_end__ - __boot_header_start__; 30__app_offset__ = __app_load_addr__ - __boot_header_load_addr__; 31 32SECTIONS 33{ 34 .nor_cfg_option __nor_cfg_option_load_addr__ : { 35 KEEP(*(.nor_cfg_option)) 36 } > XPI0 37 38 .boot_header __boot_header_load_addr__ : { 39 __boot_header_start__ = .; 40 KEEP(*(.boot_header)) 41 KEEP(*(.fw_info_table)) 42 KEEP(*(.dc_info)) 43 __boot_header_end__ = .; 44 } > XPI0 45 46 .start __app_load_addr__ : { 47 . = ALIGN(8); 48 KEEP(*(.start)) 49 } > XPI0 50 51 __vector_load_addr__ = ADDR(.start) + SIZEOF(.start); 52 .vectors : AT(__vector_load_addr__) { 53 . = ALIGN(8); 54 __vector_ram_start__ = .; 55 KEEP(*(.vector_table)) 56 KEEP(*(.isr_vector)) 57 58 . = ALIGN(8); 59 __vector_ram_end__ = .; 60 } > AXI_SRAM 61 62 .fast : AT(etext + __data_end__ - __tdata_start__) { 63 . = ALIGN(8); 64 __ramfunc_start__ = .; 65 *(.fast) 66 67 /* RT-Thread Core Start */ 68 KEEP(*context_gcc.o(.text* .rodata*)) 69 KEEP(*port*.o (.text .text* .rodata .rodata*)) 70 KEEP(*interrupt_gcc.o (.text .text* .rodata .rodata*)) 71 KEEP(*trap_common.o (.text .text* .rodata .rodata*)) 72 KEEP(*irq.o (.text .text* .rodata .rodata*)) 73 KEEP(*clock.o (.text .text* .rodata .rodata*)) 74 KEEP(*kservice.o (.text .text* .rodata .rodata*)) 75 KEEP(*scheduler*.o (.text .text* .rodata .rodata*)) 76 KEEP(*trap*.o (.text .text* .rodata .rodata*)) 77 KEEP(*idle.o (.text .text* .rodata .rodata*)) 78 KEEP(*ipc.o (.text .text* .rodata .rodata*)) 79 KEEP(*slab.o (.text .text* .rodata .rodata*)) 80 KEEP(*thread.o (.text .text* .rodata .rodata*)) 81 KEEP(*object.o (.text .text* .rodata .rodata*)) 82 KEEP(*timer.o (.text .text* .rodata .rodata*)) 83 KEEP(*mem.o (.text .text* .rodata .rodata*)) 84 KEEP(*memheap.o (.text .text* .rodata .rodata*)) 85 KEEP(*mempool.o (.text .text* .rodata .rodata*)) 86 /* RT-Thread Core End */ 87 88 /* HPMicro Driver Wrapper */ 89 KEEP(*drv_*.o (.text .text* .rodata .rodata*)) 90 KEEP(*api_lib*.o (.text .text* .rodata .rodata*)) 91 KEEP(*api_msg*.o (.text .text* .rodata .rodata*)) 92 KEEP(*if_api*.o (.text .text* .rodata .rodata*)) 93 KEEP(*netbuf*.o (.text .text* .rodata .rodata*)) 94 KEEP(*netdb*.o (.text .text* .rodata .rodata*)) 95 KEEP(*netifapi*.o (.text .text* .rodata .rodata*)) 96 KEEP(*sockets*.o (.text .text* .rodata .rodata*)) 97 KEEP(*tcpip*.o (.text .text* .rodata .rodata*)) 98 KEEP(*inet_chksum*.o (.text .text* .rodata .rodata*)) 99 KEEP(*ip*.o (.text .text* .rodata .rodata*)) 100 KEEP(*memp*.o (.text .text* .rodata .rodata*)) 101 KEEP(*netif*.o (.text .text* .rodata .rodata*)) 102 KEEP(*pbuf*.o (.text .text* .rodata .rodata*)) 103 KEEP(*tcp_in*.o (.text .text* .rodata .rodata*)) 104 KEEP(*tcp_out*.o (.text .text* .rodata .rodata*)) 105 KEEP(*tcp*.o (.text .text* .rodata .rodata*)) 106 KEEP(*ethernet*.o (.text .text* .rodata .rodata*)) 107 KEEP(*ethernetif*.o (.text .text* .rodata .rodata*)) 108 109 . = ALIGN(8); 110 __ramfunc_end__ = .; 111 } > AXI_SRAM 112 113 .fast_ram (NOLOAD) : { 114 KEEP(*(.fast_ram)) 115 } > DLM 116 117 .text (__vector_load_addr__ + __vector_ram_end__ - __vector_ram_start__) : { 118 . = ALIGN(8); 119 *(.text) 120 *(.text*) 121 *(.rodata) 122 *(.rodata*) 123 *(.srodata) 124 *(.srodata*) 125 126 *(.hash) 127 *(.dyn*) 128 *(.gnu*) 129 *(.pl*) 130 131 KEEP(*(.eh_frame)) 132 *(.eh_frame*) 133 134 KEEP (*(.init)) 135 KEEP (*(.fini)) 136 . = ALIGN(8); 137 138 /********************************************* 139 * 140 * RT-Thread related sections - Start 141 * 142 *********************************************/ 143 /* section information for finsh shell */ 144 . = ALIGN(4); 145 __fsymtab_start = .; 146 KEEP(*(FSymTab)) 147 __fsymtab_end = .; 148 . = ALIGN(4); 149 __vsymtab_start = .; 150 KEEP(*(VSymTab)) 151 __vsymtab_end = .; 152 . = ALIGN(4); 153 154 . = ALIGN(4); 155 __rt_init_start = .; 156 KEEP(*(SORT(.rti_fn*))) 157 __rt_init_end = .; 158 . = ALIGN(4); 159 160 /* section information for modules */ 161 . = ALIGN(4); 162 __rtmsymtab_start = .; 163 KEEP(*(RTMSymTab)) 164 __rtmsymtab_end = .; 165 166 /* RT-Thread related sections - end */ 167 168 /* section information for usbh class */ 169 . = ALIGN(8); 170 __usbh_class_info_start__ = .; 171 KEEP(*(.usbh_class_info)) 172 __usbh_class_info_end__ = .; 173 174 } > XPI0 175 176 .rel : { 177 KEEP(*(.rel*)) 178 } > XPI0 179 180 PROVIDE (__etext = .); 181 PROVIDE (_etext = .); 182 PROVIDE (etext = .); 183 184 .bss(NOLOAD) : { 185 . = ALIGN(8); 186 __bss_start__ = .; 187 *(.bss) 188 *(.bss*) 189 *(.sbss*) 190 *(.scommon) 191 *(.scommon*) 192 *(.dynsbss*) 193 *(COMMON) 194 . = ALIGN(8); 195 _end = .; 196 __bss_end__ = .; 197 } > AXI_SRAM 198 199 /* Note: the .tbss and .tdata section should be adjacent */ 200 .tbss(NOLOAD) : { 201 . = ALIGN(8); 202 __tbss_start__ = .; 203 *(.tbss*) 204 *(.tcommon*) 205 _end = .; 206 __tbss_end__ = .; 207 } > AXI_SRAM 208 209 .tdata : AT(etext) { 210 . = ALIGN(8); 211 __tdata_start__ = .; 212 __thread_pointer = .; 213 *(.tdata) 214 *(.tdata*) 215 . = ALIGN(8); 216 __tdata_end__ = .; 217 } > AXI_SRAM 218 219 .data : AT(etext + __tdata_end__ - __tdata_start__) { 220 . = ALIGN(8); 221 __data_start__ = .; 222 __global_pointer$ = . + 0x800; 223 *(.data) 224 *(.data*) 225 *(.sdata) 226 *(.sdata*) 227 228 KEEP(*(.jcr)) 229 KEEP(*(.dynamic)) 230 KEEP(*(.got*)) 231 KEEP(*(.got)) 232 KEEP(*(.gcc_except_table)) 233 KEEP(*(.gcc_except_table.*)) 234 235 . = ALIGN(8); 236 PROVIDE(__preinit_array_start = .); 237 KEEP(*(.preinit_array)) 238 PROVIDE(__preinit_array_end = .); 239 240 . = ALIGN(8); 241 PROVIDE(__init_array_start = .); 242 KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*))) 243 KEEP(*(.init_array)) 244 PROVIDE(__init_array_end = .); 245 246 . = ALIGN(8); 247 PROVIDE(__finit_array_start = .); 248 KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*))) 249 KEEP(*(.finit_array)) 250 PROVIDE(__finit_array_end = .); 251 252 . = ALIGN(8); 253 PROVIDE(__ctors_start__ = .); 254 KEEP(*crtbegin*.o(.ctors)) 255 KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors)) 256 KEEP(*(SORT(.ctors.*))) 257 KEEP(*(.ctors)) 258 PROVIDE(__ctors_end__ = .); 259 260 . = ALIGN(8); 261 KEEP(*crtbegin*.o(.dtors)) 262 KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors)) 263 KEEP(*(SORT(.dtors.*))) 264 KEEP(*(.dtors)) 265 . = ALIGN(8); 266 __data_end__ = .; 267 PROVIDE (__edata = .); 268 PROVIDE (_edata = .); 269 PROVIDE (edata = .); 270 } > AXI_SRAM 271 __fw_size__ = __data_end__ - __tdata_start__ + etext - __app_load_addr__; 272 273 .heap(NOLOAD) : { 274 . = ALIGN(8); 275 __heap_start__ = .; 276 . += HEAP_SIZE; 277 __heap_end__ = .; 278 } > AXI_SRAM 279 280 .framebuffer (NOLOAD) : { 281 . = ALIGN(8); 282 KEEP(*(.framebuffer)) 283 . = ALIGN(8); 284 } > AXI_SRAM 285 286 .stack(NOLOAD) : { 287 . = ALIGN(8); 288 __stack_base__ = .; 289 . += STACK_SIZE; 290 . = ALIGN(8); 291 PROVIDE (_stack = .); 292 PROVIDE (_stack_in_dlm = .); 293 PROVIDE( __rt_rvstack = . ); 294 } > AXI_SRAM 295 296 .noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) { 297 . = ALIGN(8); 298 __noncacheable_init_start__ = .; 299 KEEP(*(.noncacheable.init)) 300 __noncacheable_init_end__ = .; 301 . = ALIGN(8); 302 } > NONCACHEABLE_RAM 303 304 .noncacheable.bss (NOLOAD) : { 305 . = ALIGN(8); 306 KEEP(*(.noncacheable)) 307 __noncacheable_bss_start__ = .; 308 KEEP(*(.noncacheable.bss)) 309 __noncacheable_bss_end__ = .; 310 . = ALIGN(8); 311 } > NONCACHEABLE_RAM 312 313 .ahb_sram (NOLOAD) : { 314 KEEP(*(.ahb_sram)) 315 } > AHB_SRAM 316 317 .apb_sram (NOLOAD) : { 318 KEEP(*(.backup_sram)) 319 } > APB_SRAM 320 321 __noncacheable_start__ = ORIGIN(NONCACHEABLE_RAM); 322 __noncacheable_end__ = ORIGIN(NONCACHEABLE_RAM) + LENGTH(NONCACHEABLE_RAM); 323 324 .sdram (NOLOAD) : { 325 . = ALIGN(8); 326 __sdram_start__ = .; 327 . += SDRAM_SIZE; 328 __sdram_end__ = .; 329 } > SDRAM 330} 331