1 /*
2  * Copyright (c) 2022 hpmicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  * Change Logs:
7  * Date         Author      Notes
8  * 2022-03-09   hpmicro     First implementation
9  * 2022-08-01   hpmicro     Fixed random crashing during kvdb_init
10  * 2022-08-03   hpmicro     Improved erase speed
11  * 2023-05-15   hpmicro     Disable global interrupt during FLASH operation for FLASH build
12  *
13  */
14 #include <rtthread.h>
15 #include <rthw.h>
16 #ifdef RT_USING_FAL
17 #include "fal.h"
18 #include "hpm_romapi.h"
19 #include "board.h"
20 #include "hpm_l1c_drv.h"
21 
22 #if defined(FLASH_XIP) && (FLASH_XIP == 1)
23 
24 static rt_base_t s_interrupt_level;
25 #define FAL_ENTER_CRITICAL() do {\
26         rt_exit_critical();\
27         fencei();\
28         s_interrupt_level = rt_hw_interrupt_disable();\
29     } while(0)
30 
31 #define FAL_EXIT_CRITICAL() do {\
32         ROM_API_TABLE_ROOT->xpi_driver_if->software_reset(BOARD_APP_XPI_NOR_XPI_BASE);\
33         fencei();\
34         rt_exit_critical();\
35         rt_hw_interrupt_enable(s_interrupt_level);\
36     } while(0)
37 
38 #define FAL_RAMFUNC __attribute__((section(".isr_vector")))
39 
40 #else
41 #define FAL_ENTER_CRITICAL() rt_enter_critical()
42 
43 #define FAL_EXIT_CRITICAL() rt_exit_critical()
44 
45 #define FAL_RAMFUNC
46 
47 #endif
48 
49 /***************************************************************************************************
50  *      FAL Porting Guide
51  *
52  *      1. Most FLASH devices do not support RWW (Read-while-Write), the codes to access the FLASH
53  *         must be placed at RAM or ROM code
54  *      2. During FLASH erase/program, it is recommended to disable the interrupt, or place the
55  *         interrupt related codes to RAM
56  *
57  ***************************************************************************************************/
58 
59 static int init(void);
60 static int read(long offset, rt_uint8_t *buf, rt_size_t size);
61 static int write(long offset, const rt_uint8_t *buf, rt_size_t size);
62 static int erase(long offset, rt_size_t size);
63 
64 static xpi_nor_config_t s_flashcfg;
65 
66 /**
67  * @brief FAL Flash device context
68  */
69 struct fal_flash_dev nor_flash0 =
70     {
71             .name = NOR_FLASH_DEV_NAME,
72             /* If porting this code to the device with FLASH connected to XPI1, the address must be changed to 0x90000000 */
73             .addr = NOR_FLASH_MEM_BASE,
74             .len = 8 * 1024 * 1024,
75             .blk_size = 4096,
76             .ops = { .init = init, .read = read, .write = write, .erase = erase },
77             .write_gran = 1
78     };
79 
80 /**
81  * @brief FAL initialization
82  *        This function probes the FLASH using the ROM API
83  */
init(void)84 FAL_RAMFUNC static int init(void)
85 {
86     int ret = RT_EOK;
87     xpi_nor_config_option_t cfg_option;
88     cfg_option.header.U = BOARD_APP_XPI_NOR_CFG_OPT_HDR;
89     cfg_option.option0.U = BOARD_APP_XPI_NOR_CFG_OPT_OPT0;
90     cfg_option.option1.U = BOARD_APP_XPI_NOR_CFG_OPT_OPT1;
91 
92     FAL_ENTER_CRITICAL();
93     hpm_stat_t status = rom_xpi_nor_auto_config(BOARD_APP_XPI_NOR_XPI_BASE, &s_flashcfg, &cfg_option);
94     FAL_EXIT_CRITICAL();
95     if (status != status_success)
96     {
97         ret = -RT_ERROR;
98     }
99     else
100     {
101         /* update the flash chip information */
102         rt_uint32_t sector_size;
103         rom_xpi_nor_get_property(BOARD_APP_XPI_NOR_XPI_BASE, &s_flashcfg, xpi_nor_property_sector_size, &sector_size);
104         rt_uint32_t flash_size;
105         rom_xpi_nor_get_property(BOARD_APP_XPI_NOR_XPI_BASE, &s_flashcfg, xpi_nor_property_total_size, &flash_size);
106         nor_flash0.blk_size = sector_size;
107         nor_flash0.len = flash_size;
108     }
109 
110     return ret;
111 }
112 
113 /**
114  * @brief FAL read function
115  *        Read data from FLASH
116  * @param offset FLASH offset
117  * @param buf Buffer to hold data read by this API
118  * @param size Size of data to be read
119  * @return actual read bytes
120  */
read(long offset,rt_uint8_t * buf,rt_size_t size)121 FAL_RAMFUNC static int read(long offset, rt_uint8_t *buf, rt_size_t size)
122 {
123     rt_uint32_t flash_addr = nor_flash0.addr + offset;
124     rt_uint32_t aligned_start = HPM_L1C_CACHELINE_ALIGN_DOWN(flash_addr);
125     rt_uint32_t aligned_end = HPM_L1C_CACHELINE_ALIGN_UP(flash_addr + size);
126     rt_uint32_t aligned_size = aligned_end - aligned_start;
127     rt_base_t level = rt_hw_interrupt_disable();
128     l1c_dc_invalidate(aligned_start, aligned_size);
129     rt_hw_interrupt_enable(level);
130 
131     (void) rt_memcpy(buf, (void*) flash_addr, size);
132 
133     return size;
134 }
135 
136 /**
137  * @brief Write unaligned data to the page
138  * @param offset FLASH offset
139  * @param buf Data buffer
140  * @param size Size of data to be written
141  * @return actual size of written data or error code
142  */
write_unaligned_page_data(long offset,const rt_uint32_t * buf,rt_size_t size)143 FAL_RAMFUNC static int write_unaligned_page_data(long offset, const rt_uint32_t *buf, rt_size_t size)
144 {
145     hpm_stat_t status;
146 
147     FAL_ENTER_CRITICAL();
148     status = rom_xpi_nor_program(BOARD_APP_XPI_NOR_XPI_BASE, xpi_xfer_channel_auto, &s_flashcfg, buf, offset, size);
149     FAL_EXIT_CRITICAL();
150 
151     if (status != status_success)
152     {
153         return -RT_ERROR;
154         rt_kprintf("write failed, status=%d\n", status);
155     }
156 
157     return size;
158 }
159 
160 /**
161  * @brief FAL write function
162  *        Write data to specified FLASH address
163  * @param offset FLASH offset
164  * @param buf Data buffer
165  * @param size Size of data to be written
166  * @return actual size of written data or error code
167  */
write(long offset,const rt_uint8_t * buf,rt_size_t size)168 FAL_RAMFUNC static int write(long offset, const rt_uint8_t *buf, rt_size_t size)
169 {
170     rt_uint32_t *src = NULL;
171     rt_uint32_t buf_32[64];
172     rt_uint32_t write_size;
173     rt_size_t remaining_size = size;
174     int ret = (int)size;
175 
176     rt_uint32_t page_size;
177     rom_xpi_nor_get_property(BOARD_APP_XPI_NOR_XPI_BASE, &s_flashcfg, xpi_nor_property_page_size, &page_size);
178     rt_uint32_t offset_in_page = offset % page_size;
179     if (offset_in_page != 0)
180     {
181         rt_uint32_t write_size_in_page = page_size - offset_in_page;
182         rt_uint32_t write_page_size = MIN(write_size_in_page, size);
183         (void) rt_memcpy(buf_32, buf, write_page_size);
184         write_size = write_unaligned_page_data(offset, buf_32, write_page_size);
185         if (write_size < 0)
186         {
187             ret = -RT_ERROR;
188             goto write_quit;
189         }
190 
191         remaining_size -= write_page_size;
192         offset += write_page_size;
193         buf += write_page_size;
194     }
195 
196     while (remaining_size > 0)
197     {
198         write_size = MIN(remaining_size, sizeof(buf_32));
199         rt_memcpy(buf_32, buf, write_size);
200         src = &buf_32[0];
201 
202         FAL_ENTER_CRITICAL();
203         hpm_stat_t status = rom_xpi_nor_program(BOARD_APP_XPI_NOR_XPI_BASE, xpi_xfer_channel_auto, &s_flashcfg, src,
204                 offset, write_size);
205         FAL_EXIT_CRITICAL();
206 
207         if (status != status_success)
208         {
209             ret = -RT_ERROR;
210             rt_kprintf("write failed, status=%d\n", status);
211             break;
212         }
213 
214         remaining_size -= write_size;
215         buf += write_size;
216         offset += write_size;
217     }
218 
219 write_quit:
220     return ret;
221 }
222 
223 /**
224  * @brief FAL erase function
225  *        Erase specified FLASH region
226  * @param offset the start FLASH address to be erased
227  * @param size size of the region to be erased
228  * @ret RT_EOK Erase operation is successful
229  * @retval -RT_ERROR Erase operation failed
230  */
erase(long offset,rt_size_t size)231 FAL_RAMFUNC static int erase(long offset, rt_size_t size)
232 {
233     rt_uint32_t aligned_size = (size + nor_flash0.blk_size - 1U) & ~(nor_flash0.blk_size - 1U);
234     hpm_stat_t status;
235     int ret = (int)size;
236 
237     rt_uint32_t block_size;
238     rt_uint32_t sector_size;
239     (void) rom_xpi_nor_get_property(BOARD_APP_XPI_NOR_XPI_BASE, &s_flashcfg, xpi_nor_property_sector_size, &sector_size);
240     (void) rom_xpi_nor_get_property(BOARD_APP_XPI_NOR_XPI_BASE, &s_flashcfg, xpi_nor_property_block_size, &block_size);
241     rt_uint32_t erase_unit;
242     while (aligned_size > 0)
243     {
244         FAL_ENTER_CRITICAL();
245         if ((offset % block_size == 0) && (aligned_size >= block_size))
246         {
247             erase_unit = block_size;
248             status = rom_xpi_nor_erase_block(BOARD_APP_XPI_NOR_XPI_BASE, xpi_xfer_channel_auto, &s_flashcfg, offset);
249         }
250         else
251         {
252             erase_unit = sector_size;
253             status = rom_xpi_nor_erase_sector(BOARD_APP_XPI_NOR_XPI_BASE, xpi_xfer_channel_auto, &s_flashcfg, offset);
254         }
255         FAL_EXIT_CRITICAL();
256 
257         if (status != status_success)
258         {
259             ret = -RT_ERROR;
260             break;
261         }
262         offset += erase_unit;
263         aligned_size -= erase_unit;
264     }
265 
266     return ret;
267 }
268 #endif /* RT_USING_FAL */
269