1/*
2 * Copyright 2021-2023 HPMicro
3 * SPDX-License-Identifier: BSD-3-Clause
4 */
5
6ENTRY(_start)
7
8STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x4000;
9HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 1M;
10FLASH_SIZE = DEFINED(_flash_size) ? _flash_size : 16M;
11SDRAM_SIZE = DEFINED(_sdram_size) ? _sdram_size : 32M;
12NONCACHEABLE_SIZE = DEFINED(_noncacheable_size) ? _noncacheable_size : 4M;
13
14MEMORY
15{
16    XPI0 (rx) : ORIGIN = 0x80000000, LENGTH = FLASH_SIZE
17    ILM (wx) : ORIGIN = 0, LENGTH = 256K
18    DLM (w) : ORIGIN = 0x80000, LENGTH = 256K
19    AXI_SRAM (wx) : ORIGIN = 0x1080000, LENGTH = 1536K
20    SDRAM (wx) : ORIGIN = 0x40000000, LENGTH = SDRAM_SIZE - NONCACHEABLE_SIZE
21    NONCACHEABLE_RAM (wx) : ORIGIN = 0x40000000 + SDRAM_SIZE - NONCACHEABLE_SIZE, LENGTH = NONCACHEABLE_SIZE
22    AHB_SRAM (w) : ORIGIN = 0xF0300000, LENGTH = 32k
23    APB_SRAM (w): ORIGIN = 0xF40F0000, LENGTH = 8k
24}
25
26__nor_cfg_option_load_addr__ = ORIGIN(XPI0) + 0x400;
27__boot_header_load_addr__ = ORIGIN(XPI0) + 0x1000;
28__app_load_addr__ = ORIGIN(XPI0) + 0x3000;
29__boot_header_length__ = __boot_header_end__ - __boot_header_start__;
30__app_offset__ = __app_load_addr__ - __boot_header_load_addr__;
31
32SECTIONS
33{
34    .nor_cfg_option __nor_cfg_option_load_addr__ : {
35        KEEP(*(.nor_cfg_option))
36    } > XPI0
37
38    .boot_header __boot_header_load_addr__ : {
39        __boot_header_start__ = .;
40        KEEP(*(.boot_header))
41        KEEP(*(.fw_info_table))
42        KEEP(*(.dc_info))
43        __boot_header_end__ = .;
44    } > XPI0
45
46    .start __app_load_addr__ : {
47        . = ALIGN(8);
48        KEEP(*(.start))
49    } > XPI0
50
51    __vector_load_addr__ = ADDR(.start) + SIZEOF(.start);
52    .vectors : AT(__vector_load_addr__) {
53        . = ALIGN(8);
54        __vector_ram_start__ = .;
55        KEEP(*(.vector_table))
56        KEEP(*(.isr_vector))
57
58        . = ALIGN(8);
59        __vector_ram_end__ = .;
60    } > AXI_SRAM
61
62    .fast : AT(etext + __data_end__ - __tdata_start__) {
63        . = ALIGN(8);
64        __ramfunc_start__ = .;
65        *(.fast)
66
67        /* RT-Thread Core Start */
68        KEEP(*context_gcc.o(.text* .rodata*))
69        KEEP(*port*.o (.text .text* .rodata .rodata*))
70        KEEP(*interrupt_gcc.o (.text .text* .rodata .rodata*))
71        KEEP(*trap_common.o (.text .text* .rodata .rodata*))
72        KEEP(*irq.o (.text .text* .rodata .rodata*))
73        KEEP(*clock.o (.text .text* .rodata .rodata*))
74        KEEP(*kservice.o (.text .text* .rodata .rodata*))
75        KEEP(*scheduler.o (.text .text* .rodata .rodata*))
76        KEEP(*trap*.o (.text .text* .rodata .rodata*))
77        KEEP(*idle.o (.text .text* .rodata .rodata*))
78        KEEP(*ipc.o (.text .text* .rodata .rodata*))
79        KEEP(*thread.o (.text .text* .rodata .rodata*))
80        KEEP(*object.o (.text .text* .rodata .rodata*))
81        KEEP(*timer.o (.text .text* .rodata .rodata*))
82        KEEP(*mem.o (.text .text* .rodata .rodata*))
83        KEEP(*mempool.o (.text .text* .rodata .rodata*))
84        /* RT-Thread Core End */
85
86        /* HPMicro Driver Wrapper */
87        KEEP(*drv_*.o (.text .text* .rodata .rodata*))
88
89        . = ALIGN(8);
90        __ramfunc_end__ = .;
91    } > AXI_SRAM
92
93    .text (__vector_load_addr__ + __vector_ram_end__ - __vector_ram_start__) : {
94        . = ALIGN(8);
95        *(.text)
96        *(.text*)
97        *(.rodata)
98        *(.rodata*)
99        *(.srodata)
100        *(.srodata*)
101
102        *(.hash)
103        *(.dyn*)
104        *(.gnu*)
105        *(.pl*)
106
107        KEEP(*(.eh_frame))
108        *(.eh_frame*)
109
110        KEEP (*(.init))
111        KEEP (*(.fini))
112        . = ALIGN(8);
113
114        /*********************************************
115         *
116         *      RT-Thread related sections - Start
117         *
118        *********************************************/
119        /* section information for finsh shell */
120        . = ALIGN(4);
121        __fsymtab_start = .;
122        KEEP(*(FSymTab))
123        __fsymtab_end = .;
124        . = ALIGN(4);
125        __vsymtab_start = .;
126        KEEP(*(VSymTab))
127        __vsymtab_end = .;
128        . = ALIGN(4);
129
130        . = ALIGN(4);
131        __rt_init_start = .;
132        KEEP(*(SORT(.rti_fn*)))
133        __rt_init_end = .;
134        . = ALIGN(4);
135
136        /* section information for modules */
137        . = ALIGN(4);
138        __rtmsymtab_start = .;
139        KEEP(*(RTMSymTab))
140        __rtmsymtab_end = .;
141
142        /* RT-Thread related sections - end */
143
144
145        /* section information for usbh class */
146        . = ALIGN(8);
147        __usbh_class_info_start__ = .;
148        KEEP(*(.usbh_class_info))
149        __usbh_class_info_end__ = .;
150
151    } > XPI0
152
153    .rel : {
154        KEEP(*(.rel*))
155    } > XPI0
156
157    PROVIDE (__etext = .);
158    PROVIDE (_etext = .);
159    PROVIDE (etext = .);
160
161    .fast_ram (NOLOAD) : {
162        KEEP(*(.fast_ram))
163    } > DLM
164
165    .bss(NOLOAD) : {
166        . = ALIGN(8);
167        __bss_start__ = .;
168        *(.bss)
169        *(.bss*)
170        *(.sbss*)
171        *(.scommon)
172        *(.scommon*)
173        *(.dynsbss*)
174        *(COMMON)
175        . = ALIGN(8);
176        _end = .;
177        __bss_end__ = .;
178    } > AXI_SRAM
179
180    .tbss(NOLOAD) : {
181        . = ALIGN(8);
182        __tbss_start__ = .;
183        *(.tbss*)
184        *(.tcommon*)
185        _end = .;
186        __tbss_end__ = .;
187    } > AXI_SRAM
188
189    .tdata : AT(etext) {
190        . = ALIGN(8);
191        __tdata_start__ = .;
192        __thread_pointer = .;
193        *(.tdata)
194        *(.tdata*)
195        . = ALIGN(8);
196        __tdata_end__ = .;
197    } > AXI_SRAM
198
199    .data : AT(etext + __tdata_end__ - __tdata_start__) {
200        . = ALIGN(8);
201        __data_start__ = .;
202        __global_pointer$ = . + 0x800;
203        *(.data)
204        *(.data*)
205        *(.sdata)
206        *(.sdata*)
207
208        KEEP(*(.jcr))
209        KEEP(*(.dynamic))
210        KEEP(*(.got*))
211        KEEP(*(.got))
212        KEEP(*(.gcc_except_table))
213        KEEP(*(.gcc_except_table.*))
214
215        . = ALIGN(8);
216        PROVIDE(__preinit_array_start = .);
217        KEEP(*(.preinit_array))
218        PROVIDE(__preinit_array_end = .);
219
220        . = ALIGN(8);
221        PROVIDE(__init_array_start = .);
222        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)))
223        KEEP(*(.init_array))
224        PROVIDE(__init_array_end = .);
225
226        . = ALIGN(8);
227        PROVIDE(__finit_array_start = .);
228        KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
229        KEEP(*(.finit_array))
230        PROVIDE(__finit_array_end = .);
231
232        . = ALIGN(8);
233        PROVIDE(__ctors_start__ = .);
234        KEEP(*crtbegin*.o(.ctors))
235        KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors))
236        KEEP(*(SORT(.ctors.*)))
237        KEEP(*(.ctors))
238        PROVIDE(__ctors_end__ = .);
239
240        . = ALIGN(8);
241        KEEP(*crtbegin*.o(.dtors))
242        KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors))
243        KEEP(*(SORT(.dtors.*)))
244        KEEP(*(.dtors))
245        . = ALIGN(8);
246        __data_end__ = .;
247        PROVIDE (__edata = .);
248        PROVIDE (_edata = .);
249        PROVIDE (edata = .);
250    } > AXI_SRAM
251    __fw_size__ = __data_end__ - __tdata_start__ + etext - __app_load_addr__;
252
253    .noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) {
254        . = ALIGN(8);
255        __noncacheable_init_start__ = .;
256        KEEP(*(.noncacheable.init))
257        __noncacheable_init_end__ = .;
258        . = ALIGN(8);
259    } > NONCACHEABLE_RAM
260
261    .noncacheable.bss (NOLOAD) : {
262        . = ALIGN(8);
263        KEEP(*(.noncacheable))
264        __noncacheable_bss_start__ = .;
265        KEEP(*(.noncacheable.bss))
266        __noncacheable_bss_end__ = .;
267        . = ALIGN(8);
268    } > NONCACHEABLE_RAM
269
270    .ahb_sram (NOLOAD) : {
271        KEEP(*(.ahb_sram))
272    } > AHB_SRAM
273
274    .apb_sram (NOLOAD) : {
275        KEEP(*(.backup_sram))
276    } > APB_SRAM
277
278
279    .heap(NOLOAD) : {
280        . = ALIGN(8);
281        __heap_start__ = .;
282        . += HEAP_SIZE;
283        __heap_end__ = .;
284    } > SDRAM
285
286    .framebuffer (NOLOAD) : {
287        . = ALIGN(8);
288        KEEP(*(.framebuffer))
289        . = ALIGN(8);
290    } > SDRAM
291
292    .stack(NOLOAD) : {
293        . = ALIGN(8);
294        __stack_base__ = .;
295        . += STACK_SIZE;
296        . = ALIGN(8);
297        PROVIDE (_stack = .);
298        PROVIDE (_stack_in_dlm = .);
299        PROVIDE( __rt_rvstack = . );
300    } > AXI_SRAM
301
302    __noncacheable_start__ = ORIGIN(NONCACHEABLE_RAM);
303    __noncacheable_end__ = ORIGIN(NONCACHEABLE_RAM) + LENGTH(NONCACHEABLE_RAM);
304}
305