1/* 2 * Copyright 2021-2023 HPMicro 3 * SPDX-License-Identifier: BSD-3-Clause 4 */ 5 6ENTRY(_start) 7 8STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x4000; 9HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 256K; 10SDRAM_SIZE = DEFINED(_sdram_size) ? _sdram_size : 32M; 11NONCACHEABLE_SIZE = DEFINED(_noncacheable_size) ? _noncacheable_size : 4M; 12 13MEMORY 14{ 15 ILM (wx) : ORIGIN = 0, LENGTH = 256K 16 DLM (w) : ORIGIN = 0x80000, LENGTH = 256K 17 AXI_SRAM (wx) : ORIGIN = 0x1080000, LENGTH = 1536K 18 NONCACHEABLE_RAM (wx) : ORIGIN = 0x40000000 + SDRAM_SIZE - NONCACHEABLE_SIZE, LENGTH = NONCACHEABLE_SIZE 19 SDRAM (wx) : ORIGIN = 0x40000000, LENGTH = SDRAM_SIZE - NONCACHEABLE_SIZE 20 AHB_SRAM (w) : ORIGIN = 0xF0300000, LENGTH = 32k 21 APB_SRAM (w): ORIGIN = 0xF40F0000, LENGTH = 8k 22} 23 24SECTIONS 25{ 26 .start : { 27 . = ALIGN(8); 28 KEEP(*(.start)) 29 } > AXI_SRAM 30 31 .vectors : { 32 . = ALIGN(8); 33 KEEP(*(.isr_vector)) 34 KEEP(*(.vector_table)) 35 . = ALIGN(8); 36 } > AXI_SRAM 37 38 .text : { 39 . = ALIGN(8); 40 *(.text) 41 *(.text*) 42 *(.rodata) 43 *(.rodata*) 44 *(.srodata) 45 *(.srodata*) 46 47 *(.hash) 48 *(.dyn*) 49 *(.gnu*) 50 *(.pl*) 51 *(FalPartTable) 52 53 KEEP(*(.eh_frame)) 54 *(.eh_frame*) 55 56 KEEP (*(.init)) 57 KEEP (*(.fini)) 58 . = ALIGN(8); 59 60 /********************************************* 61 * 62 * RT-Thread related sections - Start 63 * 64 *********************************************/ 65 /* section information for finsh shell */ 66 . = ALIGN(4); 67 __fsymtab_start = .; 68 KEEP(*(FSymTab)) 69 __fsymtab_end = .; 70 . = ALIGN(4); 71 __vsymtab_start = .; 72 KEEP(*(VSymTab)) 73 __vsymtab_end = .; 74 . = ALIGN(4); 75 76 . = ALIGN(4); 77 __rt_init_start = .; 78 KEEP(*(SORT(.rti_fn*))) 79 __rt_init_end = .; 80 . = ALIGN(4); 81 82 /* section information for modules */ 83 . = ALIGN(4); 84 __rtmsymtab_start = .; 85 KEEP(*(RTMSymTab)) 86 __rtmsymtab_end = .; 87 88 /* RT-Thread related sections - end */ 89 90 91 /* section information for usbh class */ 92 . = ALIGN(8); 93 __usbh_class_info_start__ = .; 94 KEEP(*(.usbh_class_info)) 95 __usbh_class_info_end__ = .; 96 97 PROVIDE (__etext = .); 98 PROVIDE (_etext = .); 99 PROVIDE (etext = .); 100 } > AXI_SRAM 101 102 .rel : { 103 KEEP(*(.rel*)) 104 } > AXI_SRAM 105 106 .fast_ram (NOLOAD) : { 107 KEEP(*(.fast_ram)) 108 } > DLM 109 110 .bss(NOLOAD) : { 111 . = ALIGN(8); 112 __bss_start__ = .; 113 *(.bss) 114 *(.bss*) 115 *(.sbss*) 116 *(.scommon) 117 *(.scommon*) 118 *(.dynsbss*) 119 *(COMMON) 120 . = ALIGN(8); 121 _end = .; 122 __bss_end__ = .; 123 } > AXI_SRAM 124 125 /* Note: .tbss and .tdata should be adjacent */ 126 .tbss(NOLOAD) : { 127 . = ALIGN(8); 128 __tbss_start__ = .; 129 *(.tbss*) 130 *(.tcommon*) 131 _end = .; 132 __tbss_end__ = .; 133 } > AXI_SRAM 134 135 .tdata : AT(etext) { 136 . = ALIGN(8); 137 __tdata_start__ = .; 138 __thread_pointer = .; 139 *(.tdata) 140 *(.tdata*) 141 . = ALIGN(8); 142 __tdata_end__ = .; 143 } > AXI_SRAM 144 145 .data : AT(etext + __tdata_end__ - __tdata_start__) { 146 . = ALIGN(8); 147 __data_start__ = .; 148 __global_pointer$ = . + 0x800; 149 *(.data) 150 *(.data*) 151 *(.sdata) 152 *(.sdata*) 153 154 KEEP(*(.jcr)) 155 KEEP(*(.dynamic)) 156 KEEP(*(.got*)) 157 KEEP(*(.got)) 158 KEEP(*(.gcc_except_table)) 159 KEEP(*(.gcc_except_table.*)) 160 161 . = ALIGN(8); 162 PROVIDE(__preinit_array_start = .); 163 KEEP(*(.preinit_array)) 164 PROVIDE(__preinit_array_end = .); 165 166 . = ALIGN(8); 167 PROVIDE(__init_array_start = .); 168 KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*))) 169 KEEP(*(.init_array)) 170 PROVIDE(__init_array_end = .); 171 172 . = ALIGN(8); 173 PROVIDE(__finit_array_start = .); 174 KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*))) 175 KEEP(*(.finit_array)) 176 PROVIDE(__finit_array_end = .); 177 178 . = ALIGN(8); 179 PROVIDE(__ctors_start__ = .); 180 KEEP(*crtbegin*.o(.ctors)) 181 KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors)) 182 KEEP(*(SORT(.ctors.*))) 183 KEEP(*(.ctors)) 184 PROVIDE(__ctors_end__ = .); 185 186 . = ALIGN(8); 187 KEEP(*crtbegin*.o(.dtors)) 188 KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors)) 189 KEEP(*(SORT(.dtors.*))) 190 KEEP(*(.dtors)) 191 192 . = ALIGN(8); 193 __data_end__ = .; 194 PROVIDE (__edata = .); 195 PROVIDE (_edata = .); 196 PROVIDE (edata = .); 197 } > AXI_SRAM 198 199 .fast : AT(etext + __data_end__ - __tdata_start__) { 200 . = ALIGN(8); 201 PROVIDE(__ramfunc_start__ = .); 202 *(.fast) 203 . = ALIGN(8); 204 PROVIDE(__ramfunc_end__ = .); 205 } > AXI_SRAM 206 207 .noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) { 208 . = ALIGN(8); 209 __noncacheable_init_start__ = .; 210 KEEP(*(.noncacheable.init)) 211 __noncacheable_init_end__ = .; 212 . = ALIGN(8); 213 } > NONCACHEABLE_RAM 214 215 .noncacheable.bss (NOLOAD) : { 216 . = ALIGN(8); 217 KEEP(*(.noncacheable)) 218 __noncacheable_bss_start__ = .; 219 KEEP(*(.noncacheable.bss)) 220 __noncacheable_bss_end__ = .; 221 . = ALIGN(8); 222 } > NONCACHEABLE_RAM 223 224 __noncacheable_start__ = ORIGIN(NONCACHEABLE_RAM); 225 __noncacheable_end__ = ORIGIN(NONCACHEABLE_RAM) + LENGTH(NONCACHEABLE_RAM); 226 227 .ahb_sram (NOLOAD) : { 228 KEEP(*(.ahb_sram)) 229 } > AHB_SRAM 230 231 .apb_sram (NOLOAD) : { 232 KEEP(*(.backup_sram)) 233 } > APB_SRAM 234 235 .stack(NOLOAD) : { 236 . = ALIGN(8); 237 __stack_base__ = .; 238 . += STACK_SIZE; 239 PROVIDE (_stack = .); 240 PROVIDE (_stack_in_dlm = .); 241 PROVIDE (__rt_rvstack = .); 242 } > AXI_SRAM 243 244 .framebuffer (NOLOAD) : { 245 KEEP(*(.framebuffer)) 246 } > SDRAM 247 248 .heap (NOLOAD) : { 249 . = ALIGN(8); 250 __heap_start__ = .; 251 . += HEAP_SIZE; 252 __heap_end__ = .; 253 254 } > SDRAM 255} 256