1 /* 2 * Copyright (c) 2023 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 #ifndef _HPM_BOARD_H 9 #define _HPM_BOARD_H 10 #include <stdio.h> 11 #include "hpm_common.h" 12 #include "hpm_clock_drv.h" 13 #include "hpm_lcdc_drv.h" 14 #include "hpm_soc.h" 15 #include "hpm_soc_feature.h" 16 #include "pinmux.h" 17 #ifdef CONFIG_HPM_PANEL 18 #include "hpm_panel.h" 19 #endif 20 #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE 21 #include "hpm_debug_console.h" 22 #endif 23 24 #define BOARD_NAME "hpm6800evk" 25 #define BOARD_UF2_SIGNATURE (0x0A4D5048UL) 26 27 /* dma section */ 28 #define BOARD_APP_XDMA HPM_XDMA 29 #define BOARD_APP_HDMA HPM_HDMA 30 #define BOARD_APP_XDMA_IRQ IRQn_XDMA 31 #define BOARD_APP_HDMA_IRQ IRQn_HDMA 32 #define BOARD_APP_DMAMUX HPM_DMAMUX 33 #define TEST_DMA_CONTROLLER HPM_HDMA 34 #define TEST_DMA_IRQ IRQn_HDMA 35 36 #ifndef BOARD_RUNNING_CORE 37 #define BOARD_RUNNING_CORE HPM_CORE0 38 #endif 39 40 /* uart section */ 41 #ifndef BOARD_APP_UART_BASE 42 #define BOARD_APP_UART_BASE HPM_UART3 43 #define BOARD_APP_UART_IRQ IRQn_UART3 44 #define BOARD_APP_UART_BAUDRATE (115200UL) 45 #define BOARD_APP_UART_CLK_NAME clock_uart3 46 #define BOARD_APP_UART_RX_DMA_REQ HPM_DMA_SRC_UART3_RX 47 #define BOARD_APP_UART_TX_DMA_REQ HPM_DMA_SRC_UART3_TX 48 #endif 49 50 /* uart lin sample section */ 51 #define BOARD_UART_LIN BOARD_APP_UART_BASE 52 #define BOARD_UART_LIN_IRQ BOARD_APP_UART_IRQ 53 #define BOARD_UART_LIN_CLK_NAME BOARD_APP_UART_CLK_NAME 54 #define BOARD_UART_LIN_TX_PORT GPIO_DI_GPIOE 55 #define BOARD_UART_LIN_TX_PIN (15U) /* PE15 should align with used pin in pinmux configuration */ 56 57 58 #if !defined(CONFIG_NDEBUG_CONSOLE) || !CONFIG_NDEBUG_CONSOLE 59 #ifndef BOARD_CONSOLE_TYPE 60 #define BOARD_CONSOLE_TYPE CONSOLE_TYPE_UART 61 #endif 62 #if BOARD_CONSOLE_TYPE == CONSOLE_TYPE_UART 63 #ifndef BOARD_CONSOLE_UART_BASE 64 #define BOARD_CONSOLE_UART_BASE HPM_UART0 65 #define BOARD_CONSOLE_UART_CLK_NAME clock_uart0 66 #define BOARD_CONSOLE_UART_IRQ IRQn_UART0 67 #define BOARD_CONSOLE_UART_TX_DMA_REQ HPM_DMA_SRC_UART0_TX 68 #define BOARD_CONSOLE_UART_RX_DMA_REQ HPM_DMA_SRC_UART0_RX 69 #endif 70 #define BOARD_CONSOLE_UART_BAUDRATE (115200UL) 71 #endif 72 #endif 73 74 /* uart microros sample section */ 75 #define BOARD_MICROROS_UART_BASE BOARD_APP_UART_BASE 76 #define BOARD_MICROROS_UART_IRQ BOARD_APP_UART_IRQ 77 #define BOARD_MICROROS_UART_CLK_NAME BOARD_APP_UART_CLK_NAME 78 79 /* rtthread-nano finsh section */ 80 #define BOARD_RT_CONSOLE_BASE BOARD_CONSOLE_UART_BASE 81 82 /* usb cdc acm uart section */ 83 #define BOARD_USB_CDC_ACM_UART BOARD_APP_UART_BASE 84 #define BOARD_USB_CDC_ACM_UART_CLK_NAME BOARD_APP_UART_CLK_NAME 85 #define BOARD_USB_CDC_ACM_UART_TX_DMA_SRC BOARD_APP_UART_TX_DMA_REQ 86 #define BOARD_USB_CDC_ACM_UART_RX_DMA_SRC BOARD_APP_UART_RX_DMA_REQ 87 88 /* modbus sample section */ 89 #define BOARD_MODBUS_UART_BASE BOARD_APP_UART_BASE 90 #define BOARD_MODBUS_UART_CLK_NAME BOARD_APP_UART_CLK_NAME 91 #define BOARD_MODBUS_UART_RX_DMA_REQ BOARD_APP_UART_RX_DMA_REQ 92 #define BOARD_MODBUS_UART_TX_DMA_REQ BOARD_APP_UART_TX_DMA_REQ 93 94 /* lin section */ 95 #define BOARD_LIN HPM_LIN0 96 #define BOARD_LIN_CLK_NAME clock_lin0 97 #define BOARD_LIN_IRQ IRQn_LIN0 98 #define BOARD_LIN_BAUDRATE (19200U) 99 100 /* nor flash section */ 101 #define BOARD_FLASH_BASE_ADDRESS (0x80000000UL) 102 #define BOARD_FLASH_SIZE (16 * SIZE_1MB) 103 104 /* i2c section */ 105 #define BOARD_APP_I2C_BASE HPM_I2C1 106 #define BOARD_APP_I2C_IRQ IRQn_I2C1 107 #define BOARD_APP_I2C_CLK_NAME clock_i2c1 108 #define BOARD_APP_I2C_DMA HPM_HDMA 109 #define BOARD_APP_I2C_DMAMUX HPM_DMAMUX 110 #define BOARD_APP_I2C_DMA_SRC HPM_DMA_SRC_I2C1 111 #define BOARD_APP_I2C_DMAMUX_CH DMAMUX_MUXCFG_HDMA_MUX0 112 113 /* cam */ 114 #define BOARD_CAM_I2C_BASE HPM_I2C0 115 #define BOARD_CAM_I2C_CLK_NAME clock_i2c0 116 #define BOARD_SUPPORT_CAM_RESET 117 #define BOARD_SUPPORT_CAM_PWDN 118 #define BOARD_CAM_RST_GPIO_CTRL HPM_GPIO0 119 #define BOARD_CAM_RST_GPIO_INDEX GPIO_DI_GPIOA 120 #define BOARD_CAM_RST_GPIO_PIN 22 121 #define BOARD_CAM_PWDN_GPIO_CTRL HPM_GPIO0 122 #define BOARD_CAM_PWDN_GPIO_INDEX GPIO_DI_GPIOA 123 #define BOARD_CAM_PWDN_GPIO_PIN 21 124 125 /* touch panel */ 126 #define BOARD_CAP_I2C_BASE (HPM_I2C0) 127 #define BOARD_CAP_I2C_CLK_NAME clock_i2c0 128 #define BOARD_CAP_RST_GPIO (HPM_GPIO0) 129 #define BOARD_CAP_RST_GPIO_INDEX (GPIO_DI_GPIOY) 130 #define BOARD_CAP_RST_GPIO_PIN (7) 131 #define BOARD_CAP_RST_GPIO_IRQ (IRQn_GPIO0_Y) 132 #define BOARD_CAP_INTR_GPIO (HPM_GPIO0) 133 #define BOARD_CAP_INTR_GPIO_INDEX (GPIO_DI_GPIOY) 134 #define BOARD_CAP_INTR_GPIO_PIN (6) 135 #define BOARD_CAP_INTR_GPIO_IRQ (IRQn_GPIO0_Y) 136 #define BOARD_CAP_I2C_GPIO HPM_GPIO0 137 #define BOARD_CAP_I2C_SDA_GPIO_INDEX (GPIO_DI_GPIOF) 138 #define BOARD_CAP_I2C_SDA_GPIO_PIN (9) 139 #define BOARD_CAP_I2C_CLK_GPIO_INDEX (GPIO_DI_GPIOF) 140 #define BOARD_CAP_I2C_CLK_GPIO_PIN (8) 141 142 /* i2s section */ 143 #define BOARD_APP_I2S_BASE HPM_I2S3 144 #define BOARD_APP_I2S_DATA_LINE (2U) 145 #define BOARD_APP_I2S_CLK_NAME clock_i2s3 146 #define BOARD_APP_I2S_TX_DMA_REQ HPM_DMA_SRC_I2S3_TX 147 #define BOARD_APP_I2S_IRQ IRQn_I2S3 148 #define BOARD_APP_AUDIO_CLK_SRC clock_source_pll3_clk0 149 #define BOARD_APP_AUDIO_CLK_SRC_NAME clk_pll3clk0 150 #define BOARD_PDM_SINGLE_CHANNEL_MASK (0x02U) 151 #define BOARD_PDM_DUAL_CHANNEL_MASK (0x22U) 152 153 /* i2c for i2s codec section */ 154 #define BOARD_CODEC_I2C_BASE HPM_I2C3 155 #define BOARD_CODEC_I2C_CLK_NAME clock_i2c3 156 157 /* dma section */ 158 #define BOARD_APP_XDMA HPM_XDMA 159 #define BOARD_APP_HDMA HPM_HDMA 160 #define BOARD_APP_XDMA_IRQ IRQn_XDMA 161 #define BOARD_APP_HDMA_IRQ IRQn_HDMA 162 #define BOARD_APP_DMAMUX HPM_DMAMUX 163 164 /* gptmr section */ 165 #define BOARD_GPTMR HPM_GPTMR2 166 #define BOARD_GPTMR_IRQ IRQn_GPTMR2 167 #define BOARD_GPTMR_CHANNEL 0 168 #define BOARD_GPTMR_DMA_SRC HPM_DMA_SRC_GPTMR2_0 169 #define BOARD_GPTMR_CLK_NAME clock_gptmr2 170 #define BOARD_GPTMR_PWM HPM_GPTMR2 171 #define BOARD_GPTMR_PWM_CHANNEL 0 172 #define BOARD_GPTMR_PWM_DMA_SRC HPM_DMA_SRC_GPTMR2_0 173 #define BOARD_GPTMR_PWM_CLK_NAME clock_gptmr2 174 #define BOARD_GPTMR_PWM_IRQ IRQn_GPTMR2 175 #define BOARD_GPTMR_PWM_SYNC HPM_GPTMR2 176 #define BOARD_GPTMR_PWM_SYNC_CHANNEL 1 177 #define BOARD_GPTMR_PWM_SYNC_CLK_NAME clock_gptmr2 178 179 /* pinmux section */ 180 #define USING_GPIO0_FOR_GPIOZ 181 #ifndef USING_GPIO0_FOR_GPIOZ 182 #define BOARD_APP_GPIO_CTRL HPM_BGPIO 183 #define BOARD_APP_GPIO_IRQ IRQn_BGPIO 184 #else 185 #define BOARD_APP_GPIO_CTRL HPM_GPIO0 186 #define BOARD_APP_GPIO_IRQ IRQn_GPIO0_F 187 #endif 188 189 /* gpiom section */ 190 #define BOARD_APP_GPIOM_BASE HPM_GPIOM 191 #define BOARD_APP_GPIOM_USING_CTRL HPM_FGPIO 192 #define BOARD_APP_GPIOM_USING_CTRL_NAME gpiom_core0_fast 193 /* 194 * in errata, for gpiom, setting the ASSIGN register of GPIOF is invalid. 195 * so need to configure GPIOE to make it effective at the same time. 196 */ 197 #define BOARD_LED_GPIOM_GPIO_INDEX GPIO_DI_GPIOE 198 199 /* spi section */ 200 #define BOARD_APP_SPI_BASE HPM_SPI3 201 #define BOARD_APP_SPI_CLK_NAME clock_spi3 202 #define BOARD_APP_SPI_IRQ IRQn_SPI3 203 #define BOARD_APP_SPI_SCLK_FREQ (20000000UL) 204 #define BOARD_APP_SPI_ADDR_LEN_IN_BYTES (1U) 205 #define BOARD_APP_SPI_DATA_LEN_IN_BITS (8U) 206 #define BOARD_APP_SPI_RX_DMA HPM_DMA_SRC_SPI3_RX 207 #define BOARD_APP_SPI_TX_DMA HPM_DMA_SRC_SPI3_TX 208 #define BOARD_SPI_CS_GPIO_CTRL HPM_GPIO0 209 #define BOARD_SPI_CS_PIN IOC_PAD_PE04 210 #define BOARD_SPI_CS_ACTIVE_LEVEL (0U) 211 212 /* Flash section */ 213 #define BOARD_APP_XPI_NOR_XPI_BASE (HPM_XPI0) 214 #define BOARD_APP_XPI_NOR_CFG_OPT_HDR (0xfcf90001U) 215 #define BOARD_APP_XPI_NOR_CFG_OPT_OPT0 (0x00000005U) 216 #define BOARD_APP_XPI_NOR_CFG_OPT_OPT1 (0x00001000U) 217 218 /* ADC section */ 219 #define BOARD_APP_ADC16_NAME "ADC0" 220 #define BOARD_APP_ADC16_BASE HPM_ADC0 221 #define BOARD_APP_ADC16_IRQn IRQn_ADC0 222 #define BOARD_APP_ADC16_CH_1 (8U) 223 #define BOARD_APP_ADC16_CLK_NAME (clock_adc0) 224 225 #define BOARD_APP_ADC16_PMT_TRIG_CH ADC16_CONFIG_TRG0A 226 227 /* CAN section */ 228 #define BOARD_APP_CAN_BASE HPM_MCAN3 229 #define BOARD_APP_CAN_IRQn IRQn_MCAN3 230 231 /* 232 * timer for board delay 233 */ 234 #define BOARD_DELAY_TIMER (HPM_GPTMR3) 235 #define BOARD_DELAY_TIMER_CH 0 236 #define BOARD_DELAY_TIMER_CLK_NAME (clock_gptmr3) 237 238 #define BOARD_CALLBACK_TIMER (HPM_GPTMR3) 239 #define BOARD_CALLBACK_TIMER_CH 1 240 #define BOARD_CALLBACK_TIMER_IRQ IRQn_GPTMR3 241 #define BOARD_CALLBACK_TIMER_CLK_NAME (clock_gptmr3) 242 243 #define BOARD_CPU_FREQ (500000000UL) 244 245 /* LED */ 246 #define BOARD_R_GPIO_CTRL HPM_GPIO0 247 #define BOARD_R_GPIO_INDEX GPIO_DI_GPIOF 248 #define BOARD_R_GPIO_PIN 1 249 #define BOARD_G_GPIO_CTRL HPM_GPIO0 250 #define BOARD_G_GPIO_INDEX GPIO_DI_GPIOF 251 #define BOARD_G_GPIO_PIN 2 252 #define BOARD_B_GPIO_CTRL HPM_GPIO0 253 #define BOARD_B_GPIO_INDEX GPIO_DI_GPIOF 254 #define BOARD_B_GPIO_PIN 5 255 256 #define BOARD_RGB_RED 0 257 #define BOARD_RGB_GREEN (BOARD_RGB_RED + 1) 258 #define BOARD_RGB_BLUE (BOARD_RGB_RED + 2) 259 260 #define BOARD_LED_GPIO_CTRL BOARD_G_GPIO_CTRL 261 #define BOARD_LED_GPIO_INDEX BOARD_G_GPIO_INDEX 262 #define BOARD_LED_GPIO_PIN BOARD_G_GPIO_PIN 263 264 #define BOARD_LED_OFF_LEVEL 0 265 #define BOARD_LED_ON_LEVEL !BOARD_LED_OFF_LEVEL 266 #define BOARD_LED_TOGGLE_RGB 1 267 268 /* Key */ 269 #define BOARD_APP_GPIO_INDEX GPIO_DI_GPIOF 270 #define BOARD_APP_GPIO_PIN 6 271 272 /* ACMP desction */ 273 #define BOARD_ACMP 0 274 #define BOARD_ACMP_CHANNEL ACMP_CHANNEL_CHN1 275 #define BOARD_ACMP_IRQ 0 276 #define BOARD_ACMP_PLUS_INPUT ACMP_INPUT_DAC_OUT /* use internal DAC */ 277 #define BOARD_ACMP_MINUS_INPUT ACMP_INPUT_ANALOG_6 /* align with used pin */ 278 279 #define BOARD_GWC_BASE HPM_GWC0 280 #define BOARD_GWC_FUNC_IRQ IRQn_GWCK0_FUNC 281 #define BOARD_GWC_ERR_IRQ IRQn_GWCK0_ERR 282 #define BOARD_GWC_PIXEL_WIDTH 1920 283 #define BOARD_GWC_PIXEL_HEIGHT 1080 284 285 /* lcd section */ 286 #define BOARD_LCD_BASE HPM_LCDC 287 #define BOARD_LCD_IRQ IRQn_LCDC 288 #define clock_display clock_lcd0 289 290 #ifndef BOARD_LCD_WIDTH 291 #define BOARD_LCD_WIDTH PANEL_SIZE_WIDTH 292 #endif 293 #ifndef BOARD_LCD_HEIGHT 294 #define BOARD_LCD_HEIGHT PANEL_SIZE_HEIGHT 295 #endif 296 297 /* pdma section */ 298 #define BOARD_PDMA_BASE HPM_PDMA 299 #ifndef IRQn_PDMA_D0 300 #define IRQn_PDMA_D0 IRQn_PDMA 301 #endif 302 303 #ifndef BOARD_SHOW_CLOCK 304 #define BOARD_SHOW_CLOCK 1 305 #endif 306 #ifndef BOARD_SHOW_BANNER 307 #define BOARD_SHOW_BANNER 1 308 #endif 309 310 /* USB */ 311 #define BOARD_USB HPM_USB0 312 313 /* FreeRTOS Definitions */ 314 #define BOARD_FREERTOS_TIMER HPM_GPTMR2 315 #define BOARD_FREERTOS_TIMER_CHANNEL 1 316 #define BOARD_FREERTOS_TIMER_IRQ IRQn_GPTMR2 317 #define BOARD_FREERTOS_TIMER_CLK_NAME clock_gptmr2 318 319 /* Threadx Definitions */ 320 #define BOARD_THREADX_TIMER HPM_GPTMR2 321 #define BOARD_THREADX_TIMER_CHANNEL 1 322 #define BOARD_THREADX_TIMER_IRQ IRQn_GPTMR2 323 #define BOARD_THREADX_TIMER_CLK_NAME clock_gptmr2 324 /* SDXC section */ 325 #define BOARD_APP_SDCARD_SDXC_BASE (HPM_SDXC1) 326 #define BOARD_APP_SDCARD_SUPPORT_3V3 (1) 327 #define BOARD_APP_SDCARD_SUPPORT_1V8 (1) 328 #define BOARD_APP_SDCARD_SUPPORT_4BIT (1) 329 #define BOARD_APP_SDCARD_SUPPORT_CARD_DETECTION (1) 330 #define BOARD_APP_SDCARD_SUPPORT_POWER_SWITCH (1) 331 #define BOARD_APP_SDCARD_SUPPORT_VOLTAGE_SWITCH (1) 332 333 #define BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO (1) 334 #define BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO (1) 335 #define BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO (1) 336 #if BOARD_APP_SDCARD_CARD_DETECTION_USING_GPIO 337 #define BOARD_APP_SDCARD_CARD_DETECTION_PIN IOC_PAD_PD05 338 #define BOARD_APP_SDCARD_CARD_DETECTION_PIN_POL (1) /* pin value 0 means card was detected*/ 339 #endif 340 #ifdef BOARD_APP_SDCARD_POWER_SWITCH_USING_GPIO 341 #define BOARD_APP_SDCARD_POWER_SWITCH_PIN IOC_PAD_PD07 342 #endif 343 #ifdef BOARD_APP_SDCARD_VOLTAGE_SWITCH_USING_GPIO 344 #define BOARD_APP_SDCARD_VSEL_PIN IOC_PAD_PD12 345 #endif 346 347 #define BOARD_APP_EMMC_SDXC_BASE (HPM_SDXC0) 348 #define BOARD_APP_EMMC_SUPPORT_3V3 (0) 349 #define BOARD_APP_EMMC_SUPPORT_1V8 (1) 350 #define BOARD_APP_EMMC_SUPPORT_4BIT (1) 351 #define BOARD_APP_EMMC_SUPPORT_8BIT (1) 352 #define BOARD_APP_EMMC_SUPPORT_DS (1) 353 #define BOARD_APP_EMMC_HOST_USING_IRQ (0) 354 355 /* enet section */ 356 #define BOARD_ENET_COUNT (1U) 357 #define BOARD_ENET_PPS HPM_ENET0 358 #define BOARD_ENET_PPS_IDX enet_pps_0 359 #define BOARD_ENET_PPS_PTP_CLOCK clock_ptp0 360 361 #define BOARD_ENET_RGMII_PHY_ITF enet_inf_rgmii 362 #define BOARD_ENET_RGMII_RST_GPIO HPM_GPIO0 363 #define BOARD_ENET_RGMII_RST_GPIO_INDEX GPIO_DO_GPIOD 364 #define BOARD_ENET_RGMII_RST_GPIO_PIN (18U) 365 #define BOARD_ENET_RGMII HPM_ENET0 366 #define BOARD_ENET_RGMII_TX_DLY (0U) 367 #define BOARD_ENET_RGMII_RX_DLY (0U) 368 #define BOARD_ENET_RGMII_PTP_CLOCK clock_ptp0 369 #define BOARD_ENET_RGMII_PPS0_PINOUT (1) 370 371 #define BOARD_ENET0_INF (1U) /* 0: RMII, 1: RGMII */ 372 #define BOARD_ENET0_INT_REF_CLK (0U) 373 #define BOARD_ENET0_PHY_RST_TIME (30) 374 #if BOARD_ENET0_INF 375 #define BOARD_ENET0_TX_DLY (0U) 376 #define BOARD_ENET0_RX_DLY (0U) 377 #endif 378 #if __USE_ENET_PTP 379 #define BOARD_ENET0_PTP_CLOCK (clock_ptp0) 380 #endif 381 382 383 /* dram section */ 384 #define DDR_TYPE_DDR2 (0U) 385 #define DDR_TYPE_DDR3L (1U) 386 #define BOARD_DDR_TYPE DDR_TYPE_DDR3L 387 388 #define BOARD_SDRAM_ADDRESS (0x40000000UL) 389 #if (BOARD_DDR_TYPE == DDR_TYPE_DDR2) 390 #define BOARD_SDRAM_SIZE (256UL * 1024UL * 1024UL) 391 #else 392 #define BOARD_SDRAM_SIZE (512UL * 1024UL * 1024UL) 393 #endif 394 395 /* Tamper Section */ 396 #define BOARD_TAMP_ACTIVE_CH 4 397 #define BOARD_TAMP_LOW_LEVEL_CH 6 398 399 #if defined(__cplusplus) 400 extern "C" { 401 #endif /* __cplusplus */ 402 403 typedef void (*board_timer_cb)(void); 404 405 void board_init(void); 406 void board_init_console(void); 407 408 void board_init_uart(UART_Type *ptr); 409 void board_init_i2c(I2C_Type *ptr); 410 void board_init_can(MCAN_Type *ptr); 411 412 void board_init_gpio_pins(void); 413 void board_init_spi_pins(SPI_Type *ptr); 414 void board_init_spi_pins_with_gpio_as_cs(SPI_Type *ptr); 415 void board_write_spi_cs(uint32_t pin, uint8_t state); 416 uint8_t board_get_led_gpio_off_level(void); 417 void board_init_led_pins(void); 418 void board_disable_output_rgb_led(uint8_t color); 419 void board_enable_output_rgb_led(uint8_t color); 420 421 void board_led_write(uint8_t state); 422 void board_led_toggle(void); 423 424 /* Initialize SoC overall clocks */ 425 void board_init_clock(void); 426 427 uint32_t board_init_spi_clock(SPI_Type *ptr); 428 uint32_t board_init_can_clock(MCAN_Type *ptr); 429 430 void board_init_enet_pps_pins(ENET_Type *ptr); 431 uint8_t board_get_enet_dma_pbl(ENET_Type *ptr); 432 hpm_stat_t board_reset_enet_phy(ENET_Type *ptr); 433 hpm_stat_t board_init_enet_pins(ENET_Type *ptr); 434 hpm_stat_t board_init_enet_rmii_reference_clock(ENET_Type *ptr, bool internal); 435 hpm_stat_t board_init_enet_rgmii_clock_delay(ENET_Type *ptr); 436 hpm_stat_t board_init_enet_ptp_clock(ENET_Type *ptr); 437 hpm_stat_t board_enable_enet_irq(ENET_Type *ptr); 438 hpm_stat_t board_disable_enet_irq(ENET_Type *ptr); 439 440 /* 441 * @brief Initialize PMP and PMA for but not limited to the following purposes: 442 * -- non-cacheable memory initialization 443 */ 444 void board_init_pmp(void); 445 446 void board_delay_us(uint32_t us); 447 void board_delay_ms(uint32_t ms); 448 449 void board_timer_create(uint32_t ms, board_timer_cb cb); 450 void board_ungate_mchtmr_at_lp_mode(void); 451 452 /* Initialize the UART clock */ 453 uint32_t board_init_uart_clock(UART_Type *ptr); 454 455 void board_lcd_backlight(bool is_on); 456 void board_init_lcd(void); 457 void board_panel_para_to_lcdc(lcdc_config_t *config); 458 void board_init_gwc(void); 459 void board_init_cap_touch(void); 460 void board_init_usb_pins(void); 461 void board_usb_vbus_ctrl(uint8_t usb_index, uint8_t level); 462 463 void board_init_sd_pins(SDXC_Type *ptr); 464 uint32_t board_sd_configure_clock(SDXC_Type *ptr, uint32_t freq, bool need_inverse); 465 void board_sd_switch_pins_to_1v8(SDXC_Type *ptr); 466 bool board_sd_detect_card(SDXC_Type *ptr); 467 468 uint32_t board_init_dao_clock(void); 469 uint32_t board_init_pdm_clock(void); 470 uint32_t board_init_i2s_clock(I2S_Type *ptr); 471 uint32_t board_config_i2s_clock(I2S_Type *ptr, uint32_t sample_rate); 472 473 void board_init_adc16_pins(void); 474 uint32_t board_init_adc16_clock(ADC16_Type *ptr, bool clk_src_ahb); 475 476 void board_init_cam_pins(void); 477 void board_write_cam_rst(uint8_t state); 478 void board_write_cam_pwdn(uint8_t state); 479 uint32_t board_init_cam_clock(CAM_Type *ptr); 480 481 void board_init_mipi_csi_cam_pins(void); 482 void board_write_mipi_csi_cam_rst(uint8_t state); 483 uint32_t board_init_gptmr_clock(GPTMR_Type *ptr); 484 485 void board_sd_power_switch(SDXC_Type *ptr, bool on_off); 486 487 #if defined(__cplusplus) 488 } 489 #endif /* __cplusplus */ 490 #endif /* _HPM_BOARD_H */ 491