1/*
2 * Copyright 2021-2023 HPMicro
3 * SPDX-License-Identifier: BSD-3-Clause
4 */
5
6ENTRY(_start)
7
8STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x4000;
9HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 8M;
10FLASH_SIZE = DEFINED(_flash_size) ? _flash_size : 16M;
11SDRAM_SIZE = DEFINED(_sdram_size) ? _sdram_size : 256M;
12NONCACHEABLE_SIZE = DEFINED(_noncacheable_size) ? _noncacheable_size : 32M;
13
14MEMORY
15{
16    XPI0 (rx) : ORIGIN = 0x80000000, LENGTH = FLASH_SIZE
17    ILM (wx) : ORIGIN = 0, LENGTH = 256K
18    DLM (w) : ORIGIN = 0x80000, LENGTH = 256K
19    AXI_SRAM (wx) : ORIGIN = 0x1200000, LENGTH = 512K
20    SDRAM (wx) : ORIGIN = 0x40000000, LENGTH = SDRAM_SIZE - NONCACHEABLE_SIZE
21    NONCACHEABLE_RAM (wx) : ORIGIN = 0x40000000 + SDRAM_SIZE - NONCACHEABLE_SIZE, LENGTH = NONCACHEABLE_SIZE
22    AHB_SRAM (w) : ORIGIN = 0xF0400000, LENGTH = 32k
23    APB_SRAM (w): ORIGIN = 0xF4130000, LENGTH = 16k
24}
25
26__nor_cfg_option_load_addr__ = ORIGIN(XPI0) + 0x400;
27__boot_header_load_addr__ = ORIGIN(XPI0) + 0x1000;
28__app_load_addr__ = ORIGIN(XPI0) + 0x3000;
29__boot_header_length__ = __boot_header_end__ - __boot_header_start__;
30__app_offset__ = __app_load_addr__ - __boot_header_load_addr__;
31
32SECTIONS
33{
34    .nor_cfg_option __nor_cfg_option_load_addr__ : {
35        KEEP(*(.nor_cfg_option))
36    } > XPI0
37
38    .boot_header __boot_header_load_addr__ : {
39        __boot_header_start__ = .;
40        KEEP(*(.boot_header))
41        KEEP(*(.fw_info_table))
42        KEEP(*(.dc_info))
43        __boot_header_end__ = .;
44    } > XPI0
45
46    .start __app_load_addr__ : {
47        . = ALIGN(8);
48        KEEP(*(.start))
49    } > XPI0
50
51    __vector_load_addr__ = ADDR(.start) + SIZEOF(.start);
52    .vectors : AT(__vector_load_addr__) {
53        . = ALIGN(8);
54        __vector_ram_start__ = .;
55        KEEP(*(.vector_table))
56        KEEP(*(.isr_vector))
57
58        . = ALIGN(8);
59        __vector_ram_end__ = .;
60    } > ILM
61
62    .fast : AT(etext + __data_end__ - __tdata_start__) {
63        . = ALIGN(8);
64        __ramfunc_start__ = .;
65        *(.fast)
66
67        /* RT-Thread Core Start */
68        KEEP(*context_gcc.o(.text* .rodata*))
69        KEEP(*port*.o (.text .text* .rodata .rodata*))
70        KEEP(*interrupt_gcc.o (.text .text* .rodata .rodata*))
71        KEEP(*trap_common.o (.text .text* .rodata .rodata*))
72        KEEP(*irq.o (.text .text* .rodata .rodata*))
73        KEEP(*clock.o (.text .text* .rodata .rodata*))
74        KEEP(*kservice.o (.text .text* .rodata .rodata*))
75        KEEP(*scheduler.o (.text .text* .rodata .rodata*))
76        KEEP(*trap*.o (.text .text* .rodata .rodata*))
77        KEEP(*idle.o (.text .text* .rodata .rodata*))
78        KEEP(*ipc.o (.text .text* .rodata .rodata*))
79        KEEP(*thread.o (.text .text* .rodata .rodata*))
80        KEEP(*object.o (.text .text* .rodata .rodata*))
81        KEEP(*timer.o (.text .text* .rodata .rodata*))
82        KEEP(*mem.o (.text .text* .rodata .rodata*))
83        KEEP(*mempool.o (.text .text* .rodata .rodata*))
84        /* RT-Thread Core End */
85
86        /* HPMicro Driver Wrapper */
87        KEEP(*drv_*.o (.text .text* .rodata .rodata*))
88
89        . = ALIGN(8);
90        __ramfunc_end__ = .;
91    } > ILM
92
93    .text (__vector_load_addr__ + __vector_ram_end__ - __vector_ram_start__) : {
94        . = ALIGN(8);
95        *(.text)
96        *(.text*)
97        *(.rodata)
98        *(.rodata*)
99        *(.srodata)
100        *(.srodata*)
101
102        *(.hash)
103        *(.dyn*)
104        *(.gnu*)
105        *(.pl*)
106
107        KEEP(*(.eh_frame))
108        *(.eh_frame*)
109
110        KEEP (*(.init))
111        KEEP (*(.fini))
112        . = ALIGN(8);
113
114        /*********************************************
115         *
116         *      RT-Thread related sections - Start
117         *
118        *********************************************/
119        /* section information for finsh shell */
120        . = ALIGN(4);
121        __fsymtab_start = .;
122        KEEP(*(FSymTab))
123        __fsymtab_end = .;
124        . = ALIGN(4);
125        __vsymtab_start = .;
126        KEEP(*(VSymTab))
127        __vsymtab_end = .;
128        . = ALIGN(4);
129
130        . = ALIGN(4);
131        __rt_init_start = .;
132        KEEP(*(SORT(.rti_fn*)))
133        __rt_init_end = .;
134        . = ALIGN(4);
135
136        /* section information for modules */
137        . = ALIGN(4);
138        __rtmsymtab_start = .;
139        KEEP(*(RTMSymTab))
140        __rtmsymtab_end = .;
141
142        /* RT-Thread related sections - end */
143
144        /* section information for usbh class */
145        . = ALIGN(8);
146        __usbh_class_info_start__ = .;
147        KEEP(*(.usbh_class_info))
148        __usbh_class_info_end__ = .;
149
150    } > XPI0
151
152    .rel : {
153        KEEP(*(.rel*))
154    } > XPI0
155
156    PROVIDE (__etext = .);
157    PROVIDE (_etext = .);
158    PROVIDE (etext = .);
159
160    .fast_ram (NOLOAD) : {
161        KEEP(*(.fast_ram))
162    } > DLM
163
164    .bss(NOLOAD) : {
165        . = ALIGN(8);
166        __bss_start__ = .;
167        *(.bss)
168        *(.bss*)
169        *(.sbss*)
170        *(.scommon)
171        *(.scommon*)
172        *(.dynsbss*)
173        *(COMMON)
174        . = ALIGN(8);
175        _end = .;
176        __bss_end__ = .;
177    } > DLM
178
179    .tbss(NOLOAD) : {
180        . = ALIGN(8);
181        __tbss_start__ = .;
182        *(.tbss*)
183        *(.tcommon*)
184        _end = .;
185        __tbss_end__ = .;
186    } > DLM
187
188    .tdata : AT(etext) {
189        . = ALIGN(8);
190        __tdata_start__ = .;
191        __thread_pointer = .;
192        *(.tdata)
193        *(.tdata*)
194        . = ALIGN(8);
195        __tdata_end__ = .;
196    } > DLM
197
198    .data : AT(etext + __tdata_end__ - __tdata_start__) {
199        . = ALIGN(8);
200        __data_start__ = .;
201        __global_pointer$ = . + 0x800;
202        *(.data)
203        *(.data*)
204        *(.sdata)
205        *(.sdata*)
206
207        KEEP(*(.jcr))
208        KEEP(*(.dynamic))
209        KEEP(*(.got*))
210        KEEP(*(.got))
211        KEEP(*(.gcc_except_table))
212        KEEP(*(.gcc_except_table.*))
213
214        . = ALIGN(8);
215        PROVIDE(__preinit_array_start = .);
216        KEEP(*(.preinit_array))
217        PROVIDE(__preinit_array_end = .);
218
219        . = ALIGN(8);
220        PROVIDE(__init_array_start = .);
221        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)))
222        KEEP(*(.init_array))
223        PROVIDE(__init_array_end = .);
224
225        . = ALIGN(8);
226        PROVIDE(__finit_array_start = .);
227        KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
228        KEEP(*(.finit_array))
229        PROVIDE(__finit_array_end = .);
230
231        . = ALIGN(8);
232        PROVIDE(__ctors_start__ = .);
233        KEEP(*crtbegin*.o(.ctors))
234        KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors))
235        KEEP(*(SORT(.ctors.*)))
236        KEEP(*(.ctors))
237        PROVIDE(__ctors_end__ = .);
238
239        . = ALIGN(8);
240        KEEP(*crtbegin*.o(.dtors))
241        KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors))
242        KEEP(*(SORT(.dtors.*)))
243        KEEP(*(.dtors))
244        . = ALIGN(8);
245        __data_end__ = .;
246        PROVIDE (__edata = .);
247        PROVIDE (_edata = .);
248        PROVIDE (edata = .);
249    } > DLM
250    __fw_size__ = __data_end__ - __tdata_start__ + etext - __app_load_addr__;
251
252    .noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) {
253        . = ALIGN(8);
254        __noncacheable_init_start__ = .;
255        KEEP(*(.noncacheable.init))
256        __noncacheable_init_end__ = .;
257        . = ALIGN(8);
258    } > NONCACHEABLE_RAM
259
260    .noncacheable.bss (NOLOAD) : {
261        . = ALIGN(8);
262        KEEP(*(.noncacheable))
263        __noncacheable_bss_start__ = .;
264        KEEP(*(.noncacheable.bss))
265        __noncacheable_bss_end__ = .;
266        . = ALIGN(8);
267    } > NONCACHEABLE_RAM
268
269    .ahb_sram (NOLOAD) : {
270        KEEP(*(.ahb_sram))
271    } > AHB_SRAM
272
273    .apb_sram (NOLOAD) : {
274        KEEP(*(.backup_sram))
275    } > APB_SRAM
276
277
278    .heap(NOLOAD) : {
279        . = ALIGN(8);
280        __heap_start__ = .;
281        . += HEAP_SIZE;
282        __heap_end__ = .;
283    } > SDRAM
284
285    .framebuffer (NOLOAD) : {
286        . = ALIGN(8);
287        KEEP(*(.framebuffer))
288        . = ALIGN(8);
289    } > SDRAM
290
291    .stack(NOLOAD) : {
292        . = ALIGN(8);
293        __stack_base__ = .;
294        . += STACK_SIZE;
295        . = ALIGN(8);
296        PROVIDE (_stack = .);
297        PROVIDE (_stack_in_dlm = .);
298        PROVIDE( __rt_rvstack = . );
299    } > AXI_SRAM
300
301    __noncacheable_start__ = ORIGIN(NONCACHEABLE_RAM);
302    __noncacheable_end__ = ORIGIN(NONCACHEABLE_RAM) + LENGTH(NONCACHEABLE_RAM);
303}
304