1/* 2 * Copyright 2021-2023 HPMicro 3 * SPDX-License-Identifier: BSD-3-Clause 4 */ 5 6ENTRY(_start) 7 8STACK_SIZE = DEFINED(_stack_size) ? _stack_size : 0x4000; 9HEAP_SIZE = DEFINED(_heap_size) ? _heap_size : 256K; 10SDRAM_SIZE = DEFINED(_sdram_size) ? _sdram_size : 256M; 11NONCACHEABLE_SIZE = DEFINED(_noncacheable_size) ? _noncacheable_size : 32M; 12 13MEMORY 14{ 15 ILM (wx) : ORIGIN = 0, LENGTH = 256K 16 DLM (w) : ORIGIN = 0x80000, LENGTH = 256K 17 AXI_SRAM (wx) : ORIGIN = 0x01200000, LENGTH = 512K 18 NONCACHEABLE_RAM (wx) : ORIGIN = 0x40000000 + SDRAM_SIZE - NONCACHEABLE_SIZE, LENGTH = NONCACHEABLE_SIZE 19 SDRAM (wx) : ORIGIN = 0x40000000, LENGTH = SDRAM_SIZE - NONCACHEABLE_SIZE 20 AHB_SRAM (w) : ORIGIN = 0xF0400000, LENGTH = 32k 21 APB_SRAM (w): ORIGIN = 0xF4130000, LENGTH = 16k 22} 23 24SECTIONS 25{ 26 .start : { 27 . = ALIGN(8); 28 KEEP(*(.start)) 29 } > AXI_SRAM 30 31 .vectors : { 32 . = ALIGN(8); 33 KEEP(*(.isr_vector)) 34 KEEP(*(.vector_table)) 35 . = ALIGN(8); 36 } > AXI_SRAM 37 38 .text : { 39 . = ALIGN(8); 40 *(.text) 41 *(.text*) 42 *(.rodata) 43 *(.rodata*) 44 *(.srodata) 45 *(.srodata*) 46 47 *(.hash) 48 *(.dyn*) 49 *(.gnu*) 50 *(.pl*) 51 *(FalPartTable) 52 53 KEEP(*(.eh_frame)) 54 *(.eh_frame*) 55 56 KEEP (*(.init)) 57 KEEP (*(.fini)) 58 . = ALIGN(8); 59 60 /********************************************* 61 * 62 * RT-Thread related sections - Start 63 * 64 *********************************************/ 65 /* section information for finsh shell */ 66 . = ALIGN(4); 67 __fsymtab_start = .; 68 KEEP(*(FSymTab)) 69 __fsymtab_end = .; 70 . = ALIGN(4); 71 __vsymtab_start = .; 72 KEEP(*(VSymTab)) 73 __vsymtab_end = .; 74 . = ALIGN(4); 75 76 . = ALIGN(4); 77 __rt_init_start = .; 78 KEEP(*(SORT(.rti_fn*))) 79 __rt_init_end = .; 80 . = ALIGN(4); 81 82 /* section information for modules */ 83 . = ALIGN(4); 84 __rtmsymtab_start = .; 85 KEEP(*(RTMSymTab)) 86 __rtmsymtab_end = .; 87 88 /* RT-Thread related sections - end */ 89 90 /* section information for usbh class */ 91 . = ALIGN(8); 92 __usbh_class_info_start__ = .; 93 KEEP(*(.usbh_class_info)) 94 __usbh_class_info_end__ = .; 95 96 PROVIDE (__etext = .); 97 PROVIDE (_etext = .); 98 PROVIDE (etext = .); 99 } > AXI_SRAM 100 101 .rel : { 102 KEEP(*(.rel*)) 103 } > AXI_SRAM 104 105 .fast_ram (NOLOAD) : { 106 KEEP(*(.fast_ram)) 107 } > DLM 108 109 .bss(NOLOAD) : { 110 . = ALIGN(8); 111 __bss_start__ = .; 112 *(.bss) 113 *(.bss*) 114 *(.sbss*) 115 *(.scommon) 116 *(.scommon*) 117 *(.dynsbss*) 118 *(COMMON) 119 . = ALIGN(8); 120 _end = .; 121 __bss_end__ = .; 122 } > AXI_SRAM 123 124 /* Note: .tbss and .tdata should be adjacent */ 125 .tbss(NOLOAD) : { 126 . = ALIGN(8); 127 __tbss_start__ = .; 128 *(.tbss*) 129 *(.tcommon*) 130 _end = .; 131 __tbss_end__ = .; 132 } > AXI_SRAM 133 134 .tdata : AT(etext) { 135 . = ALIGN(8); 136 __tdata_start__ = .; 137 __thread_pointer = .; 138 *(.tdata) 139 *(.tdata*) 140 . = ALIGN(8); 141 __tdata_end__ = .; 142 } > AXI_SRAM 143 144 .data : AT(etext + __tdata_end__ - __tdata_start__) { 145 . = ALIGN(8); 146 __data_start__ = .; 147 __global_pointer$ = . + 0x800; 148 *(.data) 149 *(.data*) 150 *(.sdata) 151 *(.sdata*) 152 153 KEEP(*(.jcr)) 154 KEEP(*(.dynamic)) 155 KEEP(*(.got*)) 156 KEEP(*(.got)) 157 KEEP(*(.gcc_except_table)) 158 KEEP(*(.gcc_except_table.*)) 159 160 . = ALIGN(8); 161 PROVIDE(__preinit_array_start = .); 162 KEEP(*(.preinit_array)) 163 PROVIDE(__preinit_array_end = .); 164 165 . = ALIGN(8); 166 PROVIDE(__init_array_start = .); 167 KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*))) 168 KEEP(*(.init_array)) 169 PROVIDE(__init_array_end = .); 170 171 . = ALIGN(8); 172 PROVIDE(__finit_array_start = .); 173 KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*))) 174 KEEP(*(.finit_array)) 175 PROVIDE(__finit_array_end = .); 176 177 . = ALIGN(8); 178 PROVIDE(__ctors_start__ = .); 179 KEEP(*crtbegin*.o(.ctors)) 180 KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors)) 181 KEEP(*(SORT(.ctors.*))) 182 KEEP(*(.ctors)) 183 PROVIDE(__ctors_end__ = .); 184 185 . = ALIGN(8); 186 KEEP(*crtbegin*.o(.dtors)) 187 KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors)) 188 KEEP(*(SORT(.dtors.*))) 189 KEEP(*(.dtors)) 190 191 . = ALIGN(8); 192 __data_end__ = .; 193 PROVIDE (__edata = .); 194 PROVIDE (_edata = .); 195 PROVIDE (edata = .); 196 } > AXI_SRAM 197 198 .fast : AT(etext + __data_end__ - __tdata_start__) { 199 . = ALIGN(8); 200 PROVIDE(__ramfunc_start__ = .); 201 *(.fast) 202 . = ALIGN(8); 203 PROVIDE(__ramfunc_end__ = .); 204 } > AXI_SRAM 205 206 .noncacheable.init : AT(etext + __data_end__ - __tdata_start__ + __ramfunc_end__ - __ramfunc_start__) { 207 . = ALIGN(8); 208 __noncacheable_init_start__ = .; 209 KEEP(*(.noncacheable.init)) 210 __noncacheable_init_end__ = .; 211 . = ALIGN(8); 212 } > NONCACHEABLE_RAM 213 214 .noncacheable.bss (NOLOAD) : { 215 . = ALIGN(8); 216 KEEP(*(.noncacheable)) 217 __noncacheable_bss_start__ = .; 218 KEEP(*(.noncacheable.bss)) 219 __noncacheable_bss_end__ = .; 220 . = ALIGN(8); 221 } > NONCACHEABLE_RAM 222 223 __noncacheable_start__ = ORIGIN(NONCACHEABLE_RAM); 224 __noncacheable_end__ = ORIGIN(NONCACHEABLE_RAM) + LENGTH(NONCACHEABLE_RAM); 225 226 .ahb_sram (NOLOAD) : { 227 KEEP(*(.ahb_sram)) 228 } > AHB_SRAM 229 230 .apb_sram (NOLOAD) : { 231 KEEP(*(.backup_sram)) 232 } > APB_SRAM 233 234 .stack(NOLOAD) : { 235 . = ALIGN(8); 236 __stack_base__ = .; 237 . += STACK_SIZE; 238 PROVIDE (_stack = .); 239 PROVIDE (_stack_in_dlm = .); 240 PROVIDE (__rt_rvstack = .); 241 } > AXI_SRAM 242 243 .framebuffer (NOLOAD) : { 244 KEEP(*(.framebuffer)) 245 } > SDRAM 246 247 .heap (NOLOAD) : { 248 . = ALIGN(8); 249 __heap_start__ = .; 250 . += HEAP_SIZE; 251 __heap_end__ = .; 252 253 } > SDRAM 254} 255