1 /*
2 * Copyright (c) 2021-2024 HPMicro
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8 #ifndef HPM_ADC16_DRV_H
9 #define HPM_ADC16_DRV_H
10
11 #include "hpm_common.h"
12 #include "hpm_adc16_regs.h"
13 #include "hpm_soc_feature.h"
14
15 /**
16 * @brief ADC16 driver APIs
17 * @defgroup adc16_interface ADC16 driver APIs
18 * @ingroup adc_interfaces
19 * @{
20 */
21
22 /** @brief Define ADC16 validity check for the channel number */
23 #if defined (ADC16_SOC_TEMP_CH_EN) && ADC16_SOC_TEMP_CH_EN
24 #define ADC16_IS_CHANNEL_INVALID(CH) (CH > ADC16_SOC_MAX_CH_NUM && CH != ADC16_SOC_TEMP_CH_NUM)
25 #else
26 #define ADC16_IS_CHANNEL_INVALID(CH) (CH > ADC16_SOC_MAX_CH_NUM)
27 #endif
28
29 /** @brief Define ADC16 validity check for the channel sample cycle */
30 #define ADC16_IS_CHANNEL_SAMPLE_CYCLE_INVALID(CYC) (CYC == 0)
31
32 /** @brief Define ADC16 validity check for the trigger number */
33 #define ADC16_IS_TRIG_CH_INVLAID(CH) (CH > ADC_SOC_MAX_TRIG_CH_NUM)
34
35 /** @brief Define ADC16 validity check for the trigger length */
36 #define ADC16_IS_TRIG_LEN_INVLAID(TRIG_LEN) (TRIG_LEN > ADC_SOC_MAX_TRIG_CH_LEN)
37
38 /** @brief Define ADC16 validity check for the sequence length */
39 #define ADC16_IS_SEQ_LEN_INVLAID(LEN) ((LEN == 0) || (LEN > ADC_SOC_SEQ_MAX_LEN))
40
41 /** @brief Define ADC16 validity check for the DMA buffer length in the sequence mode */
42 #define ADC16_IS_SEQ_DMA_BUFF_LEN_INVLAID(LEN) ((LEN == 0) || (LEN > ADC_SOC_SEQ_MAX_DMA_BUFF_LEN_IN_4BYTES))
43
44 /** @brief Define ADC16 validity check for the DMA buffer length in the preemption mode */
45 #define ADC16_IS_PMT_DMA_BUFF_LEN_INVLAID(LEN) ((LEN == 0) || (LEN > ADC_SOC_PMT_MAX_DMA_BUFF_LEN_IN_4BYTES))
46
47 /** @brief Define ADC16 resolutions. */
48 typedef enum {
49 adc16_res_8_bits = 9,
50 adc16_res_10_bits = 11,
51 adc16_res_12_bits = 14,
52 adc16_res_16_bits = 21
53 } adc16_resolution_t;
54
55 /** @brief Define ADC16 conversion modes. */
56 typedef enum {
57 adc16_conv_mode_oneshot = 0,
58 adc16_conv_mode_period,
59 adc16_conv_mode_sequence,
60 adc16_conv_mode_preemption
61 } adc16_conversion_mode_t;
62
63 /** @brief Define ADC16 Clock Divider */
64 typedef enum {
65 adc16_clock_divider_1 = 1,
66 adc16_clock_divider_2,
67 adc16_clock_divider_3,
68 adc16_clock_divider_4,
69 adc16_clock_divider_5,
70 adc16_clock_divider_6,
71 adc16_clock_divider_7,
72 adc16_clock_divider_8,
73 adc16_clock_divider_9,
74 adc16_clock_divider_10,
75 adc16_clock_divider_11,
76 adc16_clock_divider_12,
77 adc16_clock_divider_13,
78 adc16_clock_divider_14,
79 adc16_clock_divider_15,
80 adc16_clock_divider_16,
81 } adc16_clock_divider_t;
82
83 /** @brief Define ADC16 irq events. */
84 typedef enum {
85 /** This mask indicates that a trigger conversion is complete. */
86 adc16_event_trig_complete = ADC16_INT_STS_TRIG_CMPT_MASK,
87
88 /** This mask indicates that a conflict caused by software-triggered conversions. */
89 adc16_event_trig_sw_conflict = ADC16_INT_STS_TRIG_SW_CFLCT_MASK,
90
91 /** This mask indicates that a conflict caused by hardware-triggered conversions. */
92 adc16_event_trig_hw_conflict = ADC16_INT_STS_TRIG_HW_CFLCT_MASK,
93
94 /** This mask indicates that a conflict caused when bus reading from different channels. */
95 adc16_event_read_conflict = ADC16_INT_STS_READ_CFLCT_MASK,
96
97 /** This mask indicates that a conflict caused by sequence-triggered conversions. */
98 adc16_event_seq_sw_conflict = ADC16_INT_STS_SEQ_SW_CFLCT_MASK,
99
100 /** This mask indicates that a conflict caused by hardware-triggered conversions. */
101 adc16_event_seq_hw_conflict = ADC16_INT_STS_SEQ_HW_CFLCT_MASK,
102
103 /** This mask indicates that DMA is stopped currently. */
104 adc16_event_seq_dma_abort = ADC16_INT_STS_SEQ_DMAABT_MASK,
105
106 /** This mask indicates that all of the configured conversion(s) in a queue is(are) complete. */
107 adc16_event_seq_full_complete = ADC16_INT_STS_SEQ_CMPT_MASK,
108
109 /** This mask indicates that one of the configured conversion(s) in a queue is complete. */
110 adc16_event_seq_single_complete = ADC16_INT_STS_SEQ_CVC_MASK,
111
112 /** This mask indicates that DMA FIFO is full currently. */
113 adc16_event_dma_fifo_full = ADC16_INT_STS_DMA_FIFO_FULL_MASK
114 } adc16_irq_event_t;
115
116 /** @brief ADC16 common configuration struct. */
117 typedef struct {
118 uint8_t res;
119 uint8_t conv_mode;
120 uint32_t adc_clk_div;
121 bool port3_realtime;
122 bool wait_dis;
123 bool sel_sync_ahb;
124 bool adc_ahb_en;
125 } adc16_config_t;
126
127 /** @brief ADC16 channel configuration struct. */
128 typedef struct {
129 uint8_t ch;
130 uint16_t thshdh;
131 uint16_t thshdl;
132 bool wdog_int_en;
133 uint8_t sample_cycle_shift;
134 uint32_t sample_cycle;
135 } adc16_channel_config_t;
136
137 /** @brief ADC16 channel configuration struct. */
138 typedef struct {
139 uint8_t ch;
140 uint16_t thshdh;
141 uint16_t thshdl;
142 } adc16_channel_threshold_t;
143
144 /** @brief ADC16 DMA configuration struct. */
145 typedef struct {
146 uint32_t *start_addr;
147 uint32_t buff_len_in_4bytes;
148 uint32_t stop_pos;
149 bool stop_en;
150 } adc16_dma_config_t;
151
152 /** @brief ADC16 DMA configuration struct for the sequence mode. */
153 #if defined(ADC_SOC_IP_VERSION) && (ADC_SOC_IP_VERSION < 2)
154 typedef struct {
155 uint32_t result :16;
156 uint32_t seq_num :4;
157 uint32_t :4;
158 uint32_t adc_ch :5;
159 uint32_t :2;
160 uint32_t cycle_bit :1;
161 } adc16_seq_dma_data_t;
162 #else
163 typedef struct {
164 uint32_t result :16;
165 uint32_t seq_num :4;
166 uint32_t adc_ch :5;
167 uint32_t :6;
168 uint32_t cycle_bit :1;
169 } adc16_seq_dma_data_t;
170 #endif
171
172 /** @brief ADC16 DMA configuration struct for the preemption mode. */
173 #if defined(ADC_SOC_IP_VERSION) && (ADC_SOC_IP_VERSION < 2)
174 typedef struct {
175 uint32_t result :16;
176 uint32_t seq_num :2;
177 uint32_t :2;
178 uint32_t trig_ch :4;
179 uint32_t adc_ch :5;
180 uint32_t :2;
181 uint32_t cycle_bit :1;
182 } adc16_pmt_dma_data_t;
183 #else
184 typedef struct {
185 uint32_t result :16;
186 uint32_t :4;
187 uint32_t adc_ch :5;
188 uint32_t trig_ch :4;
189 uint32_t seq_num :2;
190 uint32_t cycle_bit :1;
191 } adc16_pmt_dma_data_t;
192 #endif
193
194 /** @brief ADC16 configuration struct for the period mode. */
195 typedef struct {
196 uint8_t ch;
197 uint8_t prescale;
198 uint8_t period_count;
199 } adc16_prd_config_t;
200
201 /** @brief ADC16 queue configuration struct for the sequence mode. */
202 typedef struct {
203 bool seq_int_en;
204 uint8_t ch;
205 } adc16_seq_queue_config_t;
206
207 /** @brief ADC16 configuration struct for the sequence mode. */
208 typedef struct {
209 adc16_seq_queue_config_t queue[ADC_SOC_SEQ_MAX_LEN];
210 bool restart_en;
211 bool cont_en;
212 bool sw_trig_en;
213 bool hw_trig_en;
214 uint8_t seq_len;
215 } adc16_seq_config_t;
216
217 /** @brief ADC16 trigger configuration struct for the preemption mode. */
218 typedef struct {
219 bool inten[ADC_SOC_MAX_TRIG_CH_LEN];
220 uint8_t adc_ch[ADC_SOC_MAX_TRIG_CH_LEN];
221 uint8_t trig_ch;
222 uint8_t trig_len;
223 } adc16_pmt_config_t;
224
225 #ifdef __cplusplus
226 extern "C" {
227 #endif
228 /**
229 * @name Initialization and Deinitialization
230 * @{
231 */
232
233 /**
234 * @brief Get a default configuration for an ADC16 instance.
235 *
236 * @param[out] config A pointer to the configuration struct of @ref adc16_config_t.
237 *
238 */
239 void adc16_get_default_config(adc16_config_t *config);
240
241 /**
242 * @brief Get a default configuration for an ADC16 Channel.
243 *
244 * @param[out] config A pointer to the configuration struct of @ref adc16_channel_config_t.
245 */
246 void adc16_get_channel_default_config(adc16_channel_config_t *config);
247
248 /**
249 * @brief De-initialize an ADC16 instance.
250 *
251 * @param[in] ptr An ADC16 peripheral base address.
252 * @return A result of de-initializing an ADC16 instance.
253 * @retval status_success De-initialize an ADC16 instance successfully. Please refer to @ref hpm_stat_t.
254 * @retval status_invalid_argument De-initialize an ADC16 instance unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
255 */
256 hpm_stat_t adc16_deinit(ADC16_Type *ptr);
257
258 /**
259 * @brief Initialize an ADC16 instance.
260 *
261 * @param[in] ptr An ADC16 peripheral base address.
262 * @param[in] config A pointer to the configuration struct of @ref adc16_config_t.
263 * @return A result of initializing an ADC16 instance.
264 * @retval status_success Initialize an ADC16 instance successfully. Please refer to @ref hpm_stat_t.
265 * @retval status_invalid_argument Initialize an ADC16 instance unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
266 */
267 hpm_stat_t adc16_init(ADC16_Type *ptr, adc16_config_t *config);
268
269 /**
270 * @brief Initialize an ADC16 channel
271 *
272 * @param[in] ptr An ADC16 peripheral base address.
273 * @param[in] config A pointer to the configuration struct of @ref adc16_channel_config_t.
274 * @return A result of initializing an ADC16 channel.
275 * @retval status_success Initialize an ADC16 channel successfully. Please refer to @ref hpm_stat_t.
276 * @retval status_invalid_argument Initialize an ADC16 channel unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
277 */
278 hpm_stat_t adc16_init_channel(ADC16_Type *ptr, adc16_channel_config_t *config);
279
280 /**
281 * @brief Get thresholds of an ADC16 channel
282 *
283 * @param[in] ptr An ADC16 peripheral base address.
284 * @param[in] ch An ADC16 channel number
285 * @param[out] config A pointer to the structure of channel threshold
286 * @return A result of getting thresholds of an ADC16 channel .
287 * @retval status_success Initialize an ADC16 channel successfully. Please refer to @ref hpm_stat_t.
288 * @retval status_invalid_argument Initialize an ADC16 channel unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
289 */
290 hpm_stat_t adc16_get_channel_threshold(ADC16_Type *ptr, uint8_t ch, adc16_channel_threshold_t *config);
291
292 #if defined (ADC_SOC_BUSMODE_ENABLE_CTRL_SUPPORT) && ADC_SOC_BUSMODE_ENABLE_CTRL_SUPPORT
293 /**
294 * @brief Enable oneshot mode (bus mode)
295 *
296 * @param[in] ptr An ADC16 peripheral base address.
297 */
298 void adc16_enable_oneshot_mode(ADC16_Type *ptr);
299
300 /**
301 * @brief Disable oneshot mode (bus mode)
302 *
303 * @param[in] ptr An ADC16 peripheral base address.
304 */
305 void adc16_disable_oneshot_mode(ADC16_Type *ptr);
306 #endif
307
308 /**
309 * @brief Configure the the period mode for an ADC16 instance.
310 *
311 * @param[in] ptr An ADC16 peripheral base address.
312 * @param[in] config A pointer to the configuration struct of @ref adc16_prd_config_t.
313 * @return A result of configuring the the period mode for an ADC16 instance.
314 * @retval status_success Configure the the period mode successfully. Please refer to @ref hpm_stat_t.
315 * @retval status_invalid_argument Configure the the period mode unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
316 */
317 hpm_stat_t adc16_set_prd_config(ADC16_Type *ptr, adc16_prd_config_t *config);
318
319 /**
320 * @brief Configure the sequence mode for an ADC16 instance.
321 *
322 * @param[in] ptr An ADC16 peripheral base address.
323 * @param[in] config A pointer to configuration struct of @ref adc16_seq_config_t.
324 * @return A result of configuring the sequence mode for an ADC16 instance.
325 * @retval status_success Configure the sequence mode successfully. Please refer to @ref hpm_stat_t.
326 * @retval status_invalid_argument Configure the sequence mode unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
327 */
328 hpm_stat_t adc16_set_seq_config(ADC16_Type *ptr, adc16_seq_config_t *config);
329
330 /**
331 * @brief Configure the preemption mode for an ADC16 instance.
332 *
333 * @param[in] ptr An ADC16 peripheral base address.
334 * @param[in] config A pointer to configuration struct of @ref adc16_pmt_config_t.
335 * @return A result of configuring the preemption mode for an ADC16 instance.
336 * @retval status_success Configure the preemption mode successfully. Please refer to @ref hpm_stat_t.
337 * @retval status_invalid_argument Configure the preemption mode unsuccessfully due to passing one or more invalid arguments. Please refer to @ref hpm_stat_t.
338 */
339 hpm_stat_t adc16_set_pmt_config(ADC16_Type *ptr, adc16_pmt_config_t *config);
340
341 /**
342 * @brief Set the queue enable control.
343 *
344 * @param[in] ptr An ADC16 peripheral base address.
345 * @param[in] trig_ch An ADC16 peripheral trigger channel.
346 * @param[in] enable Set true to enable and false to disable.
347 * @return A result of setting queue enable in preemption.
348 * @retval status_success Get the result of an ADC16 conversion in oneshot mode successfully.
349 * @retval status_invalid_argument Get the result of an ADC16 conversion in oneshot mode unsuccessfully due to passing invalid arguments.
350 */
351 hpm_stat_t adc16_set_pmt_queue_enable(ADC16_Type *ptr, uint8_t trig_ch, bool enable);
352
353 /** @} */
354
355 /**
356 * @name Enablement Control
357 * @{
358 */
359 /**
360 * @brief Enable the hw trigger control for the sequence mode.
361 *
362 * @param[in] ptr An ADC16 peripheral base address.
363 *
364 */
adc16_seq_enable_hw_trigger(ADC16_Type * ptr)365 static inline void adc16_seq_enable_hw_trigger(ADC16_Type *ptr)
366 {
367 ptr->SEQ_CFG0 |= ADC16_SEQ_CFG0_HW_TRIG_EN_MASK;
368 }
369 /**
370 * @brief Disable the hw trigger control for the sequence mode.
371 *
372 * @param[in] ptr An ADC16 peripheral base address.
373 *
374 */
adc16_seq_disable_hw_trigger(ADC16_Type * ptr)375 static inline void adc16_seq_disable_hw_trigger(ADC16_Type *ptr)
376 {
377 ptr->SEQ_CFG0 &= ~ADC16_SEQ_CFG0_HW_TRIG_EN_MASK;
378 }
379 /** @} */
380
381 /**
382 * @name DMA Control
383 * @{
384 */
385
386 /**
387 * @brief Configure the stop position offset in the specified memory of DMA write operation for the sequence mode.
388 *
389 * @param[in] ptr An ADC16 peripheral base address.
390 * @param[in] stop_pos A stop position offset.
391 */
adc16_set_seq_stop_pos(ADC16_Type * ptr,uint16_t stop_pos)392 static inline void adc16_set_seq_stop_pos(ADC16_Type *ptr, uint16_t stop_pos)
393 {
394 ptr->SEQ_DMA_CFG = (ptr->SEQ_DMA_CFG & ~ADC16_SEQ_DMA_CFG_STOP_POS_MASK)
395 | ADC16_SEQ_DMA_CFG_STOP_POS_SET(stop_pos);
396 }
397
398 /**
399 * @brief Configure the start address of DMA write operation for the preemption mode.
400 *
401 * @param[in] ptr An ADC16 peripheral base address.
402 * @param[in] addr A start address of DMA write operation.
403 */
adc16_init_pmt_dma(ADC16_Type * ptr,uint32_t addr)404 static inline void adc16_init_pmt_dma(ADC16_Type *ptr, uint32_t addr)
405 {
406 ptr->TRG_DMA_ADDR = addr & ADC16_TRG_DMA_ADDR_TRG_DMA_ADDR_MASK;
407 }
408
409 /**
410 * @brief Configure the start address of DMA write operation for the sequence mode.
411 *
412 * @param[in] ptr An ADC16 peripheral base address.
413 * @param[in] config A pointer to configuration struct of @ref adc16_dma_config_t.
414 * @return An implementation result of DMA initializing for the sequence mode
415 * @retval status_success ADC16 initialize in sequence mode successfully. Please refert to @ref hpm_stat_t.
416 * @retval status_invalid_argument ADC16 initialize in sequence mode unsuccessfully due to passing invalid arguments. Please refert to @ref hpm_stat_t.
417 */
418 hpm_stat_t adc16_init_seq_dma(ADC16_Type *ptr, adc16_dma_config_t *config);
419
420 /** @} */
421
422 /**
423 * @name Status
424 * @{
425 */
426
427 /**
428 * @brief Get all ADC16 status flags.
429 *
430 * @param[in] ptr An ADC16 peripheral base address.
431 * @return A mask indicating all corresponding interrupt statuses.
432 * @retval A mask. Please refer to @ref adc16_irq_event_t.
433 */
adc16_get_status_flags(ADC16_Type * ptr)434 static inline uint32_t adc16_get_status_flags(ADC16_Type *ptr)
435 {
436 return ptr->INT_STS;
437 }
438
439 /**
440 * @brief Set value of the WAIT_DIS bit. The ADC does not block access to the associated peripheral bus
441 * until the ADC has completed its conversion.
442 *
443 * @param[in] ptr An ADC16 peripheral base address.
444 * @deprecated This API will be removed from V2.0.x
445 */
adc16_disable_busywait(ADC16_Type * ptr)446 static inline void adc16_disable_busywait(ADC16_Type *ptr)
447 {
448 ptr->BUF_CFG0 |= ADC16_BUF_CFG0_WAIT_DIS_SET(1);
449 }
450
451 /**
452 * @brief Set value of the WAIT_DIS bit. ADC blocks access to the associated peripheral bus
453 * until the ADC completes the conversion.
454 *
455 * @param[in] ptr An ADC16 peripheral base address.
456 * @deprecated This API will be removed from V2.0.x
457 */
adc16_enable_busywait(ADC16_Type * ptr)458 static inline void adc16_enable_busywait(ADC16_Type *ptr)
459 {
460 ptr->BUF_CFG0 &= ~ADC16_BUF_CFG0_WAIT_DIS_MASK;
461 }
462
463 /**
464 * @brief Set nonblocking read in oneshot mode.
465 * @note An ADC does not block access to the associated peripheral whether it completes a conversion or not.
466 *
467 * @param[in] ptr An ADC16 peripheral base address.
468 */
adc16_set_nonblocking_read(ADC16_Type * ptr)469 static inline void adc16_set_nonblocking_read(ADC16_Type *ptr)
470 {
471 ptr->BUF_CFG0 |= ADC16_BUF_CFG0_WAIT_DIS_MASK;
472 }
473
474 /**
475 * @brief Set blocking read in oneshot mode.
476 * @note An ADC blocks access to the associated peripheral bus until it completes a conversion.
477 *
478 * @param[in] ptr An ADC16 peripheral base address.
479 */
adc16_set_blocking_read(ADC16_Type * ptr)480 static inline void adc16_set_blocking_read(ADC16_Type *ptr)
481 {
482 ptr->BUF_CFG0 &= ~ADC16_BUF_CFG0_WAIT_DIS_MASK;
483 }
484
485 /**
486 * @brief Judge whether the current setting is none-blocking mode or not.
487 *
488 * @param[in] ptr An ADC16 peripheral base address.
489 * @return A result indicating the status of bus waiting.
490 * @retval True means that nonblocking reading.
491 * @retval False means that blocking reading.
492 *
493 */
adc16_is_nonblocking_mode(ADC16_Type * ptr)494 static inline bool adc16_is_nonblocking_mode(ADC16_Type *ptr)
495 {
496 return (ADC16_BUF_CFG0_WAIT_DIS_GET(ptr->BUF_CFG0) ? true : false);
497 }
498
499 /**
500 * @brief Get the status of a conversion validity.
501 *
502 * @param[in] ptr An ADC16 peripheral base address.
503 * @param[in] ch An ADC16 peripheral channel.
504 * @return Status indicating the validity of the current conversion result.
505 *
506 * @note This function is only used when the WAIT_DIS bit in the BUF_RESULT register is 1.
507 */
adc16_get_conv_valid_status(ADC16_Type * ptr,uint8_t ch)508 static inline bool adc16_get_conv_valid_status(ADC16_Type *ptr, uint8_t ch)
509 {
510 return ADC16_BUS_RESULT_VALID_GET(ptr->BUS_RESULT[ch]);
511 }
512
513 /**
514 * @brief Clear the status flags.
515 *
516 *
517 * @param[in] ptr An ADC16 peripheral base address.
518 * @param[in] mask A mask that means the specified flags to be cleared. Please refer to @ref adc16_irq_event_t.
519 *
520 * @note Only the specified flags can be cleared by writing the INT_STS register.
521 */
adc16_clear_status_flags(ADC16_Type * ptr,uint32_t mask)522 static inline void adc16_clear_status_flags(ADC16_Type *ptr, uint32_t mask)
523 {
524 ptr->INT_STS = mask;
525 }
526
527 /** @} */
528
529 /**
530 * @name Interrupts
531 * @{
532 */
533
534 /**
535 * @brief Enable interrupts.
536 *
537 * @param[in] ptr An ADC16 peripheral base address.
538 * @param[in] mask A mask indicating the specified ADC interrupt events. Please refer to @ref adc16_irq_event_t.
539 */
adc16_enable_interrupts(ADC16_Type * ptr,uint32_t mask)540 static inline void adc16_enable_interrupts(ADC16_Type *ptr, uint32_t mask)
541 {
542 ptr->INT_EN |= mask;
543 }
544
545 /**
546 * @brief Disable interrupts.
547 *
548 * @param[in] ptr An ADC16 peripheral base address.
549 * @param[in] mask A mask indicating the specified interrupt events. Please refer to @ref adc16_irq_event_t.
550 */
adc16_disable_interrupts(ADC16_Type * ptr,uint32_t mask)551 static inline void adc16_disable_interrupts(ADC16_Type *ptr, uint32_t mask)
552 {
553 ptr->INT_EN &= ~mask;
554 }
555
556 /** @} */
557
558 /**
559 * @name Trigger and Conversion
560 * @{
561 */
562
563 /**
564 * @brief Trigger ADC conversions by software in sequence mode
565 *
566 * @param[in] ptr An ADC16 peripheral base address.
567 * @return An implementation result of getting an ADC16 software trigger.
568 * @retval status_success ADC16 software triggers successfully. Please refer to @ref hpm_stat_t.
569 * @retval status_fail ADC16 software triggers unsuccessfully. Please refer to @ref hpm_stat_t.
570 */
571 hpm_stat_t adc16_trigger_seq_by_sw(ADC16_Type *ptr);
572
573 /**
574 * @brief Trigger ADC conversions by software in preemption mode
575 *
576 * @param[in] ptr An ADC16 peripheral base address.
577 * @param[in] trig_ch A trigger channel number(e.g. TRIG0A,TRIG0B,TRIG0C...).
578 * @return An implementation result of getting an ADC16 software trigger.
579 * @retval status_success ADC16 software triggers successfully. Please refer to @ref hpm_stat_t.
580 * @retval status_fail ADC16 software triggers unsuccessfully. Please refer to @ref hpm_stat_t.
581 */
582 hpm_stat_t adc16_trigger_pmt_by_sw(ADC16_Type *ptr, uint8_t trig_ch);
583
584 /**
585 * @brief Get the result in oneshot mode.
586 *
587 * @param[in] ptr An ADC16 peripheral base address.
588 * @param[in] ch An ADC16 peripheral channel.
589 * @param[out] result A pointer to an ADC16 conversion result.
590 * @return An implementation result of getting an ADC16 conversion result in oneshot mode.
591 * @retval status_success Get the result of an ADC16 conversion in oneshot mode successfully. Please refer to @ref hpm_stat_t.
592 * @retval status_invalid_argument Get the result of an ADC16 conversion in oneshot mode unsuccessfully due to passing invalid arguments. Please refer to @ref hpm_stat_t.
593 */
594 hpm_stat_t adc16_get_oneshot_result(ADC16_Type *ptr, uint8_t ch, uint16_t *result);
595
596 /**
597 * @brief Get the result in the period mode.
598 *
599 * @param[in] ptr An ADC16 peripheral base address.
600 * @param[in] ch An ADC16 peripheral channel.
601 * @param[out] result A pointer to a specified ADC16 conversion result
602 * @return An implementation of getting an ADC16 conversion result in the period mode.
603 * @retval status_success Get the result of an ADC16 conversion in the period mode successfully. Please refer to @ref hpm_stat_t.
604 * @retval status_invalid_argument Get the result of an ADC16 conversion in the period mode unsuccessfully due to passing invalid arguments. Please refer to @ref hpm_stat_t.
605 */
606 hpm_stat_t adc16_get_prd_result(ADC16_Type *ptr, uint8_t ch, uint16_t *result);
607
608 #if defined(ADC16_SOC_TEMP_CH_EN) && ADC16_SOC_TEMP_CH_EN
609 /**
610 * @brief Enable the temperature sensor
611 *
612 * @param[in] ptr An ADC16 peripheral base address.
613 */
614 void adc16_enable_temp_sensor(ADC16_Type *ptr);
615
616 /**
617 * @brief Disable the temperature sensor
618 *
619 * @param[in] ptr An ADC16 peripheral base address.
620 */
621 void adc16_disable_temp_sensor(ADC16_Type *ptr);
622 #endif
623
624 /**
625 * @brief enable the transmission of adc data to the motor sensor unit.
626 *
627 * @param[in] ptr An ADC16 peripheral base address.
628 */
629 #if defined(HPM_IP_FEATURE_ADC16_HAS_MOT_EN) && HPM_IP_FEATURE_ADC16_HAS_MOT_EN
adc16_enable_motor(ADC16_Type * ptr)630 static inline void adc16_enable_motor(ADC16_Type *ptr)
631 {
632 ptr->ANA_CTRL0 |= ADC16_ANA_CTRL0_MOTO_EN_MASK;
633 }
634 #endif
635
636 /** @} */
637
638 #ifdef __cplusplus
639 }
640 #endif
641
642 /** @} */
643 #endif /* HPM_ADC16_DRV_H */
644