1 /*
2 * Copyright (c) 2021 HPMicro
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7
8 #ifndef HPM_PPOR_DRV_H
9 #define HPM_PPOR_DRV_H
10 #include "hpm_ppor_regs.h"
11
12 typedef enum {
13 ppor_reset_brownout = 1 << 0,
14 ppor_reset_debug = 1 << 4,
15 ppor_reset_wdog0 = 1 << 16,
16 ppor_reset_wdog1 = 1 << 17,
17 ppor_reset_pmic_wdog = 1 << 24,
18 ppor_reset_software = 1 << 31,
19 } ppor_reset_source_t;
20
21 #ifdef __cplusplus
22 extern "C" {
23 #endif
24
25 /*
26 * perform software reset in counter * (1/24Mhz) seconds
27 */
ppor_sw_reset(PPOR_Type * ptr,uint32_t counter)28 static inline void ppor_sw_reset(PPOR_Type *ptr, uint32_t counter)
29 {
30 ptr->SOFTWARE_RESET = PPOR_SOFTWARE_RESET_COUNTER_SET(counter); }
31
32 /*
33 * clear enable reset source according to the given mask
34 */
ppor_reset_mask_clear_source_enable(PPOR_Type * ptr,uint32_t mask)35 static inline void ppor_reset_mask_clear_source_enable(PPOR_Type *ptr, uint32_t mask)
36 {
37 ptr->RESET_ENABLE &= ~mask;
38 }
39
40 /*
41 * set enable reset source according to the given mask
42 */
ppor_reset_mask_set_source_enable(PPOR_Type * ptr,uint32_t mask)43 static inline void ppor_reset_mask_set_source_enable(PPOR_Type *ptr, uint32_t mask)
44 {
45 ptr->RESET_ENABLE |= mask;
46 }
47
48 /*
49 * set enable reset source
50 */
ppor_reset_set_source_enable(PPOR_Type * ptr,uint32_t reset_sources)51 static inline void ppor_reset_set_source_enable(PPOR_Type *ptr, uint32_t reset_sources)
52 {
53 ptr->RESET_ENABLE = reset_sources;
54 }
55
56 /*
57 * get enabled reset source
58 */
ppor_reset_get_enabled_source(PPOR_Type * ptr)59 static inline uint32_t ppor_reset_get_enabled_source(PPOR_Type *ptr)
60 {
61 return ptr->RESET_ENABLE;
62 }
63
64 /*
65 * get reset status
66 */
ppor_reset_get_status(PPOR_Type * ptr)67 static inline uint32_t ppor_reset_get_status(PPOR_Type *ptr)
68 {
69 return ptr->RESET_STATUS;
70 }
71
72 /*
73 * get reset flags
74 */
ppor_reset_get_flags(PPOR_Type * ptr)75 static inline uint32_t ppor_reset_get_flags(PPOR_Type *ptr)
76 {
77 return ptr->RESET_FLAG;
78 }
79
80 /*
81 * clear reset flags
82 */
ppor_reset_clear_flags(PPOR_Type * ptr,uint32_t mask)83 static inline void ppor_reset_clear_flags(PPOR_Type *ptr, uint32_t mask)
84 {
85 ptr->RESET_FLAG = mask;
86 }
87
88 /*
89 * get reset hold
90 */
ppor_reset_get_hold(PPOR_Type * ptr)91 static inline uint32_t ppor_reset_get_hold(PPOR_Type *ptr)
92 {
93 return ptr->RESET_HOLD;
94 }
95
96 /*
97 * set reset hold
98 */
ppor_reset_set_hold_enable(PPOR_Type * ptr,uint32_t mask)99 static inline void ppor_reset_set_hold_enable(PPOR_Type *ptr, uint32_t mask)
100 {
101 ptr->RESET_HOLD |= mask;
102 }
103
104 /*
105 * clear reset hold
106 */
ppor_reset_clear_hold_enable(PPOR_Type * ptr,uint32_t mask)107 static inline void ppor_reset_clear_hold_enable(PPOR_Type *ptr, uint32_t mask)
108 {
109 ptr->RESET_HOLD &= ~mask;
110 }
111
112 /*
113 * set cold reset
114 */
ppor_reset_set_cold_reset_enable(PPOR_Type * ptr,uint32_t mask)115 static inline void ppor_reset_set_cold_reset_enable(PPOR_Type *ptr, uint32_t mask)
116 {
117 ptr->RESET_TYPE &= ~mask;
118 }
119
120 /*
121 * clear cold reset
122 */
ppor_reset_clear_cold_reset_enable(PPOR_Type * ptr,uint32_t mask)123 static inline void ppor_reset_clear_cold_reset_enable(PPOR_Type *ptr, uint32_t mask)
124 {
125 ptr->RESET_TYPE |= mask;
126 }
127
128 /*
129 * set hot reset
130 */
ppor_reset_set_hot_reset_enable(PPOR_Type * ptr,uint32_t mask)131 static inline void ppor_reset_set_hot_reset_enable(PPOR_Type *ptr, uint32_t mask)
132 {
133 ptr->RESET_TYPE |= mask;
134 }
135
136 /*
137 * clear hot reset
138 */
ppor_reset_clear_hot_reset_enable(PPOR_Type * ptr,uint32_t mask)139 static inline void ppor_reset_clear_hot_reset_enable(PPOR_Type *ptr, uint32_t mask)
140 {
141 ptr->RESET_TYPE &= ~mask;
142 }
143
144
145 #ifdef __cplusplus
146 }
147 #endif
148 #endif
149