1 /*
2  * Copyright (c) 2021-2024 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_IOMUX_H
10 #define HPM_IOMUX_H
11 
12 /* IOC_PA00_FUNC_CTL function mux definitions */
13 #define IOC_PA00_FUNC_CTL_GPIO_A_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
14 #define IOC_PA00_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
15 #define IOC_PA00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
16 #define IOC_PA00_FUNC_CTL_MCAN0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
17 #define IOC_PA00_FUNC_CTL_PWM0_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
18 #define IOC_PA00_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
19 #define IOC_PA00_FUNC_CTL_TRGM0_P_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
20 #define IOC_PA00_FUNC_CTL_PWM1_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
21 #define IOC_PA00_FUNC_CTL_SYSCTL_CLK_OBS_0     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
22 
23 /* IOC_PA01_FUNC_CTL function mux definitions */
24 #define IOC_PA01_FUNC_CTL_GPIO_A_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
25 #define IOC_PA01_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
26 #define IOC_PA01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
27 #define IOC_PA01_FUNC_CTL_MCAN0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
28 #define IOC_PA01_FUNC_CTL_PWM0_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
29 #define IOC_PA01_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
30 #define IOC_PA01_FUNC_CTL_TRGM0_P_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
31 #define IOC_PA01_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
32 #define IOC_PA01_FUNC_CTL_SYSCTL_CLK_OBS_1     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
33 
34 /* IOC_PA02_FUNC_CTL function mux definitions */
35 #define IOC_PA02_FUNC_CTL_GPIO_A_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
36 #define IOC_PA02_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
37 #define IOC_PA02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
38 #define IOC_PA02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
39 #define IOC_PA02_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
40 #define IOC_PA02_FUNC_CTL_MCAN0_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
41 #define IOC_PA02_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
42 #define IOC_PA02_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
43 #define IOC_PA02_FUNC_CTL_TRGM0_P_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
44 #define IOC_PA02_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
45 #define IOC_PA02_FUNC_CTL_QEI1_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
46 #define IOC_PA02_FUNC_CTL_SYSCTL_CLK_OBS_2     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
47 
48 /* IOC_PA03_FUNC_CTL function mux definitions */
49 #define IOC_PA03_FUNC_CTL_GPIO_A_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
50 #define IOC_PA03_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
51 #define IOC_PA03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
52 #define IOC_PA03_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
53 #define IOC_PA03_FUNC_CTL_SPI3_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
54 #define IOC_PA03_FUNC_CTL_MCAN1_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
55 #define IOC_PA03_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
56 #define IOC_PA03_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
57 #define IOC_PA03_FUNC_CTL_TRGM0_P_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
58 #define IOC_PA03_FUNC_CTL_PWM1_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
59 #define IOC_PA03_FUNC_CTL_QEI1_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
60 #define IOC_PA03_FUNC_CTL_SYSCTL_CLK_OBS_3     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
61 
62 /* IOC_PA04_FUNC_CTL function mux definitions */
63 #define IOC_PA04_FUNC_CTL_GPIO_A_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
64 #define IOC_PA04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
65 #define IOC_PA04_FUNC_CTL_SPI0_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
66 #define IOC_PA04_FUNC_CTL_MCAN1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
67 #define IOC_PA04_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
68 #define IOC_PA04_FUNC_CTL_PWM1_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
69 #define IOC_PA04_FUNC_CTL_TRGM0_P_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
70 #define IOC_PA04_FUNC_CTL_RDC0_EXC_P           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
71 #define IOC_PA04_FUNC_CTL_QEI1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
72 #define IOC_PA04_FUNC_CTL_QEO1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
73 #define IOC_PA04_FUNC_CTL_SEI1_DE              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
74 #define IOC_PA04_FUNC_CTL_JTAG_TDO             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
75 
76 /* IOC_PA05_FUNC_CTL function mux definitions */
77 #define IOC_PA05_FUNC_CTL_GPIO_A_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
78 #define IOC_PA05_FUNC_CTL_GPTMR1_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
79 #define IOC_PA05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
80 #define IOC_PA05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
81 #define IOC_PA05_FUNC_CTL_SPI0_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
82 #define IOC_PA05_FUNC_CTL_MCAN1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
83 #define IOC_PA05_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
84 #define IOC_PA05_FUNC_CTL_PWM1_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
85 #define IOC_PA05_FUNC_CTL_TRGM0_P_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
86 #define IOC_PA05_FUNC_CTL_RDC0_EXC_N           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
87 #define IOC_PA05_FUNC_CTL_QEI1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
88 #define IOC_PA05_FUNC_CTL_QEO1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
89 #define IOC_PA05_FUNC_CTL_SEI1_CK              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
90 #define IOC_PA05_FUNC_CTL_JTAG_TDI             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
91 
92 /* IOC_PA06_FUNC_CTL function mux definitions */
93 #define IOC_PA06_FUNC_CTL_GPIO_A_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
94 #define IOC_PA06_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
95 #define IOC_PA06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
96 #define IOC_PA06_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
97 #define IOC_PA06_FUNC_CTL_SPI0_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
98 #define IOC_PA06_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
99 #define IOC_PA06_FUNC_CTL_PWM1_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
100 #define IOC_PA06_FUNC_CTL_TRGM0_P_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
101 #define IOC_PA06_FUNC_CTL_QEI1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
102 #define IOC_PA06_FUNC_CTL_QEO1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
103 #define IOC_PA06_FUNC_CTL_SEI1_TX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
104 #define IOC_PA06_FUNC_CTL_JTAG_TCK             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
105 
106 /* IOC_PA07_FUNC_CTL function mux definitions */
107 #define IOC_PA07_FUNC_CTL_GPIO_A_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
108 #define IOC_PA07_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
109 #define IOC_PA07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
110 #define IOC_PA07_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
111 #define IOC_PA07_FUNC_CTL_SPI0_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
112 #define IOC_PA07_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
113 #define IOC_PA07_FUNC_CTL_PWM1_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
114 #define IOC_PA07_FUNC_CTL_TRGM0_P_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
115 #define IOC_PA07_FUNC_CTL_QEI1_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
116 #define IOC_PA07_FUNC_CTL_SEI1_RX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
117 #define IOC_PA07_FUNC_CTL_JTAG_TMS             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
118 
119 /* IOC_PA08_FUNC_CTL function mux definitions */
120 #define IOC_PA08_FUNC_CTL_GPIO_A_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
121 #define IOC_PA08_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
122 #define IOC_PA08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
123 #define IOC_PA08_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
124 #define IOC_PA08_FUNC_CTL_SPI3_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
125 #define IOC_PA08_FUNC_CTL_MCAN2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
126 #define IOC_PA08_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
127 #define IOC_PA08_FUNC_CTL_PWM0_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
128 #define IOC_PA08_FUNC_CTL_JTAG_TRST            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
129 
130 /* IOC_PA09_FUNC_CTL function mux definitions */
131 #define IOC_PA09_FUNC_CTL_GPIO_A_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
132 #define IOC_PA09_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
133 #define IOC_PA09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
134 #define IOC_PA09_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
135 #define IOC_PA09_FUNC_CTL_SPI3_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
136 #define IOC_PA09_FUNC_CTL_MCAN2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
137 #define IOC_PA09_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
138 #define IOC_PA09_FUNC_CTL_PWM0_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
139 #define IOC_PA09_FUNC_CTL_SOC_REF0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
140 
141 /* IOC_PA10_FUNC_CTL function mux definitions */
142 #define IOC_PA10_FUNC_CTL_GPIO_A_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
143 #define IOC_PA10_FUNC_CTL_GPTMR0_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
144 #define IOC_PA10_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
145 #define IOC_PA10_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
146 #define IOC_PA10_FUNC_CTL_SPI3_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
147 #define IOC_PA10_FUNC_CTL_MCAN2_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
148 #define IOC_PA10_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
149 #define IOC_PA10_FUNC_CTL_PWM1_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
150 #define IOC_PA10_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
151 #define IOC_PA10_FUNC_CTL_QEI1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
152 #define IOC_PA10_FUNC_CTL_QEO0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
153 #define IOC_PA10_FUNC_CTL_SEI1_DE              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
154 
155 /* IOC_PA11_FUNC_CTL function mux definitions */
156 #define IOC_PA11_FUNC_CTL_GPIO_A_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
157 #define IOC_PA11_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
158 #define IOC_PA11_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
159 #define IOC_PA11_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
160 #define IOC_PA11_FUNC_CTL_PWM1_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
161 #define IOC_PA11_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
162 #define IOC_PA11_FUNC_CTL_QEI1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
163 #define IOC_PA11_FUNC_CTL_QEO0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
164 #define IOC_PA11_FUNC_CTL_SEI1_CK              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
165 #define IOC_PA11_FUNC_CTL_EWDG0_RST            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
166 
167 /* IOC_PA12_FUNC_CTL function mux definitions */
168 #define IOC_PA12_FUNC_CTL_GPIO_A_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
169 #define IOC_PA12_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
170 #define IOC_PA12_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
171 #define IOC_PA12_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
172 #define IOC_PA12_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
173 #define IOC_PA12_FUNC_CTL_PWM1_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
174 #define IOC_PA12_FUNC_CTL_PWM0_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
175 #define IOC_PA12_FUNC_CTL_RDC0_EXC_P           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
176 #define IOC_PA12_FUNC_CTL_QEI1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
177 #define IOC_PA12_FUNC_CTL_QEO0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
178 #define IOC_PA12_FUNC_CTL_SEI1_TX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
179 
180 /* IOC_PA13_FUNC_CTL function mux definitions */
181 #define IOC_PA13_FUNC_CTL_GPIO_A_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
182 #define IOC_PA13_FUNC_CTL_GPTMR1_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
183 #define IOC_PA13_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
184 #define IOC_PA13_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
185 #define IOC_PA13_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
186 #define IOC_PA13_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
187 #define IOC_PA13_FUNC_CTL_MCAN3_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
188 #define IOC_PA13_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
189 #define IOC_PA13_FUNC_CTL_PWM1_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
190 #define IOC_PA13_FUNC_CTL_PWM0_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
191 #define IOC_PA13_FUNC_CTL_RDC0_EXC_N           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
192 #define IOC_PA13_FUNC_CTL_QEI1_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
193 #define IOC_PA13_FUNC_CTL_SEI1_RX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
194 
195 /* IOC_PA14_FUNC_CTL function mux definitions */
196 #define IOC_PA14_FUNC_CTL_GPIO_A_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
197 #define IOC_PA14_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
198 #define IOC_PA14_FUNC_CTL_SPI3_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
199 #define IOC_PA14_FUNC_CTL_MCAN3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
200 #define IOC_PA14_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
201 #define IOC_PA14_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
202 #define IOC_PA14_FUNC_CTL_QEI1_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
203 #define IOC_PA14_FUNC_CTL_EWDG1_RST            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
204 
205 /* IOC_PA15_FUNC_CTL function mux definitions */
206 #define IOC_PA15_FUNC_CTL_GPIO_A_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
207 #define IOC_PA15_FUNC_CTL_GPTMR0_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
208 #define IOC_PA15_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
209 #define IOC_PA15_FUNC_CTL_SPI3_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
210 #define IOC_PA15_FUNC_CTL_MCAN3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
211 #define IOC_PA15_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
212 #define IOC_PA15_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
213 #define IOC_PA15_FUNC_CTL_QEI1_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
214 #define IOC_PA15_FUNC_CTL_SOC_REF0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
215 
216 /* IOC_PA16_FUNC_CTL function mux definitions */
217 #define IOC_PA16_FUNC_CTL_GPIO_A_16            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
218 #define IOC_PA16_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
219 #define IOC_PA16_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
220 #define IOC_PA16_FUNC_CTL_MCAN0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
221 #define IOC_PA16_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
222 #define IOC_PA16_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
223 #define IOC_PA16_FUNC_CTL_TRGM0_P_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
224 #define IOC_PA16_FUNC_CTL_QEO0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
225 #define IOC_PA16_FUNC_CTL_SEI1_DE              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
226 
227 /* IOC_PA17_FUNC_CTL function mux definitions */
228 #define IOC_PA17_FUNC_CTL_GPIO_A_17            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
229 #define IOC_PA17_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
230 #define IOC_PA17_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
231 #define IOC_PA17_FUNC_CTL_MCAN0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
232 #define IOC_PA17_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
233 #define IOC_PA17_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
234 #define IOC_PA17_FUNC_CTL_TRGM0_P_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
235 #define IOC_PA17_FUNC_CTL_QEO0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
236 #define IOC_PA17_FUNC_CTL_SEI1_CK              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
237 
238 /* IOC_PA18_FUNC_CTL function mux definitions */
239 #define IOC_PA18_FUNC_CTL_GPIO_A_18            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
240 #define IOC_PA18_FUNC_CTL_GPTMR3_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
241 #define IOC_PA18_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
242 #define IOC_PA18_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
243 #define IOC_PA18_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
244 #define IOC_PA18_FUNC_CTL_MCAN0_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
245 #define IOC_PA18_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
246 #define IOC_PA18_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
247 #define IOC_PA18_FUNC_CTL_TRGM0_P_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
248 #define IOC_PA18_FUNC_CTL_QEO0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
249 #define IOC_PA18_FUNC_CTL_SEI1_TX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
250 
251 /* IOC_PA19_FUNC_CTL function mux definitions */
252 #define IOC_PA19_FUNC_CTL_GPIO_A_19            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
253 #define IOC_PA19_FUNC_CTL_GPTMR3_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
254 #define IOC_PA19_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
255 #define IOC_PA19_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
256 #define IOC_PA19_FUNC_CTL_SPI1_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
257 #define IOC_PA19_FUNC_CTL_MCAN1_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
258 #define IOC_PA19_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
259 #define IOC_PA19_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
260 #define IOC_PA19_FUNC_CTL_TRGM0_P_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
261 #define IOC_PA19_FUNC_CTL_SEI1_RX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
262 
263 /* IOC_PA20_FUNC_CTL function mux definitions */
264 #define IOC_PA20_FUNC_CTL_GPIO_A_20            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
265 #define IOC_PA20_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
266 #define IOC_PA20_FUNC_CTL_SPI2_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
267 #define IOC_PA20_FUNC_CTL_MCAN1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
268 #define IOC_PA20_FUNC_CTL_PWM0_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
269 #define IOC_PA20_FUNC_CTL_PWM1_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
270 #define IOC_PA20_FUNC_CTL_TRGM0_P_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
271 #define IOC_PA20_FUNC_CTL_QEI0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
272 #define IOC_PA20_FUNC_CTL_QEO0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
273 #define IOC_PA20_FUNC_CTL_SEI0_DE              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
274 
275 /* IOC_PA21_FUNC_CTL function mux definitions */
276 #define IOC_PA21_FUNC_CTL_GPIO_A_21            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
277 #define IOC_PA21_FUNC_CTL_GPTMR3_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
278 #define IOC_PA21_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
279 #define IOC_PA21_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
280 #define IOC_PA21_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
281 #define IOC_PA21_FUNC_CTL_MCAN1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
282 #define IOC_PA21_FUNC_CTL_PWM0_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
283 #define IOC_PA21_FUNC_CTL_PWM1_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
284 #define IOC_PA21_FUNC_CTL_TRGM0_P_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
285 #define IOC_PA21_FUNC_CTL_QEI0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
286 #define IOC_PA21_FUNC_CTL_QEO0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
287 #define IOC_PA21_FUNC_CTL_SEI0_CK              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
288 
289 /* IOC_PA22_FUNC_CTL function mux definitions */
290 #define IOC_PA22_FUNC_CTL_GPIO_A_22            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
291 #define IOC_PA22_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
292 #define IOC_PA22_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
293 #define IOC_PA22_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
294 #define IOC_PA22_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
295 #define IOC_PA22_FUNC_CTL_PWM1_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
296 #define IOC_PA22_FUNC_CTL_TRGM0_P_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
297 #define IOC_PA22_FUNC_CTL_PWM1_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
298 #define IOC_PA22_FUNC_CTL_QEI0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
299 #define IOC_PA22_FUNC_CTL_QEO0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
300 #define IOC_PA22_FUNC_CTL_SEI0_TX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
301 
302 /* IOC_PA23_FUNC_CTL function mux definitions */
303 #define IOC_PA23_FUNC_CTL_GPIO_A_23            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
304 #define IOC_PA23_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
305 #define IOC_PA23_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
306 #define IOC_PA23_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
307 #define IOC_PA23_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
308 #define IOC_PA23_FUNC_CTL_PWM1_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
309 #define IOC_PA23_FUNC_CTL_TRGM0_P_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
310 #define IOC_PA23_FUNC_CTL_PWM1_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
311 #define IOC_PA23_FUNC_CTL_QEI0_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
312 #define IOC_PA23_FUNC_CTL_SEI0_RX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
313 
314 /* IOC_PA24_FUNC_CTL function mux definitions */
315 #define IOC_PA24_FUNC_CTL_GPIO_A_24            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
316 #define IOC_PA24_FUNC_CTL_GPTMR2_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
317 #define IOC_PA24_FUNC_CTL_UART6_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
318 #define IOC_PA24_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
319 #define IOC_PA24_FUNC_CTL_SPI1_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
320 #define IOC_PA24_FUNC_CTL_MCAN2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
321 #define IOC_PA24_FUNC_CTL_XPI0_CA_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
322 #define IOC_PA24_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
323 #define IOC_PA24_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
324 #define IOC_PA24_FUNC_CTL_TRGM0_P_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
325 #define IOC_PA24_FUNC_CTL_QEI0_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
326 
327 /* IOC_PA25_FUNC_CTL function mux definitions */
328 #define IOC_PA25_FUNC_CTL_GPIO_A_25            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
329 #define IOC_PA25_FUNC_CTL_GPTMR2_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
330 #define IOC_PA25_FUNC_CTL_UART6_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
331 #define IOC_PA25_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
332 #define IOC_PA25_FUNC_CTL_SPI1_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
333 #define IOC_PA25_FUNC_CTL_MCAN2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
334 #define IOC_PA25_FUNC_CTL_XPI0_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
335 #define IOC_PA25_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
336 #define IOC_PA25_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
337 #define IOC_PA25_FUNC_CTL_TRGM0_P_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
338 #define IOC_PA25_FUNC_CTL_QEI0_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
339 
340 /* IOC_PA26_FUNC_CTL function mux definitions */
341 #define IOC_PA26_FUNC_CTL_GPIO_A_26            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
342 #define IOC_PA26_FUNC_CTL_GPTMR2_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
343 #define IOC_PA26_FUNC_CTL_UART6_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
344 #define IOC_PA26_FUNC_CTL_UART6_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
345 #define IOC_PA26_FUNC_CTL_SPI1_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
346 #define IOC_PA26_FUNC_CTL_MCAN2_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
347 #define IOC_PA26_FUNC_CTL_XPI0_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
348 #define IOC_PA26_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
349 #define IOC_PA26_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
350 #define IOC_PA26_FUNC_CTL_TRGM0_P_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
351 #define IOC_PA26_FUNC_CTL_QEI0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
352 #define IOC_PA26_FUNC_CTL_QEO0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
353 #define IOC_PA26_FUNC_CTL_SEI0_DE              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
354 #define IOC_PA26_FUNC_CTL_SYSCTL_CLK_OBS_0     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
355 
356 /* IOC_PA27_FUNC_CTL function mux definitions */
357 #define IOC_PA27_FUNC_CTL_GPIO_A_27            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
358 #define IOC_PA27_FUNC_CTL_UART6_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
359 #define IOC_PA27_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
360 #define IOC_PA27_FUNC_CTL_XPI0_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
361 #define IOC_PA27_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
362 #define IOC_PA27_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
363 #define IOC_PA27_FUNC_CTL_TRGM0_P_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
364 #define IOC_PA27_FUNC_CTL_QEI0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
365 #define IOC_PA27_FUNC_CTL_QEO0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
366 #define IOC_PA27_FUNC_CTL_SEI0_CK              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
367 #define IOC_PA27_FUNC_CTL_SYSCTL_CLK_OBS_1     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
368 
369 /* IOC_PA28_FUNC_CTL function mux definitions */
370 #define IOC_PA28_FUNC_CTL_GPIO_A_28            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
371 #define IOC_PA28_FUNC_CTL_UART7_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
372 #define IOC_PA28_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
373 #define IOC_PA28_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
374 #define IOC_PA28_FUNC_CTL_XPI0_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
375 #define IOC_PA28_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
376 #define IOC_PA28_FUNC_CTL_PWM1_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
377 #define IOC_PA28_FUNC_CTL_TRGM0_P_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
378 #define IOC_PA28_FUNC_CTL_RDC0_EXC_P           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
379 #define IOC_PA28_FUNC_CTL_QEI0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
380 #define IOC_PA28_FUNC_CTL_QEO0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
381 #define IOC_PA28_FUNC_CTL_SEI0_TX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
382 #define IOC_PA28_FUNC_CTL_SYSCTL_CLK_OBS_2     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
383 
384 /* IOC_PA29_FUNC_CTL function mux definitions */
385 #define IOC_PA29_FUNC_CTL_GPIO_A_29            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
386 #define IOC_PA29_FUNC_CTL_GPTMR3_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
387 #define IOC_PA29_FUNC_CTL_UART7_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
388 #define IOC_PA29_FUNC_CTL_UART7_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
389 #define IOC_PA29_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
390 #define IOC_PA29_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
391 #define IOC_PA29_FUNC_CTL_MCAN3_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
392 #define IOC_PA29_FUNC_CTL_XPI0_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
393 #define IOC_PA29_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
394 #define IOC_PA29_FUNC_CTL_PWM1_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
395 #define IOC_PA29_FUNC_CTL_TRGM0_P_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
396 #define IOC_PA29_FUNC_CTL_RDC0_EXC_N           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
397 #define IOC_PA29_FUNC_CTL_QEI0_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
398 #define IOC_PA29_FUNC_CTL_SEI0_RX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
399 #define IOC_PA29_FUNC_CTL_SYSCTL_CLK_OBS_3     IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
400 #define IOC_PA29_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)
401 
402 /* IOC_PA30_FUNC_CTL function mux definitions */
403 #define IOC_PA30_FUNC_CTL_GPIO_A_30            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
404 #define IOC_PA30_FUNC_CTL_UART7_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
405 #define IOC_PA30_FUNC_CTL_SPI1_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
406 #define IOC_PA30_FUNC_CTL_MCAN3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
407 #define IOC_PA30_FUNC_CTL_XPI0_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
408 #define IOC_PA30_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
409 #define IOC_PA30_FUNC_CTL_PWM1_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
410 #define IOC_PA30_FUNC_CTL_TRGM0_P_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
411 #define IOC_PA30_FUNC_CTL_QEI0_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
412 #define IOC_PA30_FUNC_CTL_SOC_REF0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
413 #define IOC_PA30_FUNC_CTL_USB0_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)
414 
415 /* IOC_PA31_FUNC_CTL function mux definitions */
416 #define IOC_PA31_FUNC_CTL_GPIO_A_31            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
417 #define IOC_PA31_FUNC_CTL_GPTMR2_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
418 #define IOC_PA31_FUNC_CTL_UART7_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
419 #define IOC_PA31_FUNC_CTL_SPI1_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
420 #define IOC_PA31_FUNC_CTL_MCAN3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
421 #define IOC_PA31_FUNC_CTL_XPI0_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
422 #define IOC_PA31_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
423 #define IOC_PA31_FUNC_CTL_PWM1_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
424 #define IOC_PA31_FUNC_CTL_TRGM0_P_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
425 #define IOC_PA31_FUNC_CTL_QEI0_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
426 #define IOC_PA31_FUNC_CTL_USB0_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)
427 
428 /* IOC_PB00_FUNC_CTL function mux definitions */
429 #define IOC_PB00_FUNC_CTL_GPIO_B_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
430 #define IOC_PB00_FUNC_CTL_GPTMR1_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
431 #define IOC_PB00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
432 #define IOC_PB00_FUNC_CTL_MCAN0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
433 #define IOC_PB00_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
434 #define IOC_PB00_FUNC_CTL_PWM1_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
435 #define IOC_PB00_FUNC_CTL_TRGM0_P_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
436 #define IOC_PB00_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
437 
438 /* IOC_PB01_FUNC_CTL function mux definitions */
439 #define IOC_PB01_FUNC_CTL_GPIO_B_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
440 #define IOC_PB01_FUNC_CTL_GPTMR1_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
441 #define IOC_PB01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
442 #define IOC_PB01_FUNC_CTL_MCAN0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
443 #define IOC_PB01_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
444 #define IOC_PB01_FUNC_CTL_PWM1_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
445 #define IOC_PB01_FUNC_CTL_TRGM0_P_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
446 #define IOC_PB01_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
447 
448 /* IOC_PB02_FUNC_CTL function mux definitions */
449 #define IOC_PB02_FUNC_CTL_GPIO_B_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
450 #define IOC_PB02_FUNC_CTL_GPTMR1_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
451 #define IOC_PB02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
452 #define IOC_PB02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
453 #define IOC_PB02_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
454 #define IOC_PB02_FUNC_CTL_MCAN0_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
455 #define IOC_PB02_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
456 #define IOC_PB02_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
457 #define IOC_PB02_FUNC_CTL_TRGM0_P_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
458 #define IOC_PB02_FUNC_CTL_PWM0_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
459 
460 /* IOC_PB03_FUNC_CTL function mux definitions */
461 #define IOC_PB03_FUNC_CTL_GPIO_B_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
462 #define IOC_PB03_FUNC_CTL_GPTMR1_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
463 #define IOC_PB03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
464 #define IOC_PB03_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
465 #define IOC_PB03_FUNC_CTL_SPI2_CS_3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
466 #define IOC_PB03_FUNC_CTL_MCAN1_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
467 #define IOC_PB03_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
468 #define IOC_PB03_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
469 #define IOC_PB03_FUNC_CTL_TRGM0_P_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
470 #define IOC_PB03_FUNC_CTL_PWM0_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
471 
472 /* IOC_PB04_FUNC_CTL function mux definitions */
473 #define IOC_PB04_FUNC_CTL_GPIO_B_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
474 #define IOC_PB04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
475 #define IOC_PB04_FUNC_CTL_SPI3_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
476 #define IOC_PB04_FUNC_CTL_MCAN1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
477 #define IOC_PB04_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
478 #define IOC_PB04_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
479 #define IOC_PB04_FUNC_CTL_TRGM0_P_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
480 #define IOC_PB04_FUNC_CTL_QEI1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
481 #define IOC_PB04_FUNC_CTL_QEO1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
482 #define IOC_PB04_FUNC_CTL_SEI0_DE              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
483 
484 /* IOC_PB05_FUNC_CTL function mux definitions */
485 #define IOC_PB05_FUNC_CTL_GPIO_B_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
486 #define IOC_PB05_FUNC_CTL_GPTMR1_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
487 #define IOC_PB05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
488 #define IOC_PB05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
489 #define IOC_PB05_FUNC_CTL_SPI3_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
490 #define IOC_PB05_FUNC_CTL_MCAN1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
491 #define IOC_PB05_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
492 #define IOC_PB05_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
493 #define IOC_PB05_FUNC_CTL_TRGM0_P_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
494 #define IOC_PB05_FUNC_CTL_QEI1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
495 #define IOC_PB05_FUNC_CTL_QEO1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
496 #define IOC_PB05_FUNC_CTL_SEI0_CK              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
497 
498 /* IOC_PB06_FUNC_CTL function mux definitions */
499 #define IOC_PB06_FUNC_CTL_GPIO_B_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
500 #define IOC_PB06_FUNC_CTL_GPTMR0_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
501 #define IOC_PB06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
502 #define IOC_PB06_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
503 #define IOC_PB06_FUNC_CTL_SPI3_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
504 #define IOC_PB06_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
505 #define IOC_PB06_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
506 #define IOC_PB06_FUNC_CTL_TRGM0_P_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
507 #define IOC_PB06_FUNC_CTL_RDC0_EXC_P           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
508 #define IOC_PB06_FUNC_CTL_QEI1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
509 #define IOC_PB06_FUNC_CTL_QEO1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
510 #define IOC_PB06_FUNC_CTL_SEI0_TX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
511 
512 /* IOC_PB07_FUNC_CTL function mux definitions */
513 #define IOC_PB07_FUNC_CTL_GPIO_B_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
514 #define IOC_PB07_FUNC_CTL_GPTMR0_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
515 #define IOC_PB07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
516 #define IOC_PB07_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
517 #define IOC_PB07_FUNC_CTL_SPI3_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
518 #define IOC_PB07_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
519 #define IOC_PB07_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
520 #define IOC_PB07_FUNC_CTL_TRGM0_P_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
521 #define IOC_PB07_FUNC_CTL_RDC0_EXC_N           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
522 #define IOC_PB07_FUNC_CTL_QEI1_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
523 #define IOC_PB07_FUNC_CTL_SEI0_RX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
524 
525 /* IOC_PB08_FUNC_CTL function mux definitions */
526 #define IOC_PB08_FUNC_CTL_GPIO_B_08            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
527 #define IOC_PB08_FUNC_CTL_GPTMR0_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
528 #define IOC_PB08_FUNC_CTL_UART2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
529 #define IOC_PB08_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
530 #define IOC_PB08_FUNC_CTL_SPI2_CS_2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
531 #define IOC_PB08_FUNC_CTL_MCAN2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
532 #define IOC_PB08_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
533 #define IOC_PB08_FUNC_CTL_PWM1_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
534 #define IOC_PB08_FUNC_CTL_QEI1_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
535 #define IOC_PB08_FUNC_CTL_QEO1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
536 #define IOC_PB08_FUNC_CTL_SEI1_DE              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
537 #define IOC_PB08_FUNC_CTL_USB0_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)
538 
539 /* IOC_PB09_FUNC_CTL function mux definitions */
540 #define IOC_PB09_FUNC_CTL_GPIO_B_09            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
541 #define IOC_PB09_FUNC_CTL_GPTMR0_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
542 #define IOC_PB09_FUNC_CTL_UART2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
543 #define IOC_PB09_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
544 #define IOC_PB09_FUNC_CTL_SPI2_CS_1            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
545 #define IOC_PB09_FUNC_CTL_MCAN2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
546 #define IOC_PB09_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
547 #define IOC_PB09_FUNC_CTL_PWM1_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
548 #define IOC_PB09_FUNC_CTL_QEI1_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
549 #define IOC_PB09_FUNC_CTL_QEO1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
550 #define IOC_PB09_FUNC_CTL_SEI1_CK              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
551 #define IOC_PB09_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)
552 
553 /* IOC_PB10_FUNC_CTL function mux definitions */
554 #define IOC_PB10_FUNC_CTL_GPIO_B_10            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
555 #define IOC_PB10_FUNC_CTL_GPTMR0_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
556 #define IOC_PB10_FUNC_CTL_UART2_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
557 #define IOC_PB10_FUNC_CTL_UART2_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
558 #define IOC_PB10_FUNC_CTL_SPI2_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
559 #define IOC_PB10_FUNC_CTL_MCAN2_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
560 #define IOC_PB10_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
561 #define IOC_PB10_FUNC_CTL_PWM1_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
562 #define IOC_PB10_FUNC_CTL_QEI0_H1              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
563 #define IOC_PB10_FUNC_CTL_QEO1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
564 #define IOC_PB10_FUNC_CTL_SEI1_TX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
565 #define IOC_PB10_FUNC_CTL_USB0_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)
566 
567 /* IOC_PB11_FUNC_CTL function mux definitions */
568 #define IOC_PB11_FUNC_CTL_GPIO_B_11            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
569 #define IOC_PB11_FUNC_CTL_UART2_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
570 #define IOC_PB11_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
571 #define IOC_PB11_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
572 #define IOC_PB11_FUNC_CTL_PWM1_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
573 #define IOC_PB11_FUNC_CTL_QEI0_F               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
574 #define IOC_PB11_FUNC_CTL_SEI1_RX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
575 
576 /* IOC_PB12_FUNC_CTL function mux definitions */
577 #define IOC_PB12_FUNC_CTL_GPIO_B_12            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
578 #define IOC_PB12_FUNC_CTL_UART3_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
579 #define IOC_PB12_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
580 #define IOC_PB12_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
581 #define IOC_PB12_FUNC_CTL_PWM1_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
582 #define IOC_PB12_FUNC_CTL_PWM1_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
583 #define IOC_PB12_FUNC_CTL_TRGM0_P_00           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
584 #define IOC_PB12_FUNC_CTL_QEI0_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
585 #define IOC_PB12_FUNC_CTL_QEO1_A               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
586 #define IOC_PB12_FUNC_CTL_SEI0_DE              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
587 
588 /* IOC_PB13_FUNC_CTL function mux definitions */
589 #define IOC_PB13_FUNC_CTL_GPIO_B_13            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
590 #define IOC_PB13_FUNC_CTL_GPTMR1_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
591 #define IOC_PB13_FUNC_CTL_UART3_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
592 #define IOC_PB13_FUNC_CTL_UART3_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
593 #define IOC_PB13_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
594 #define IOC_PB13_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
595 #define IOC_PB13_FUNC_CTL_MCAN3_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
596 #define IOC_PB13_FUNC_CTL_PWM1_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
597 #define IOC_PB13_FUNC_CTL_PWM1_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
598 #define IOC_PB13_FUNC_CTL_TRGM0_P_01           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
599 #define IOC_PB13_FUNC_CTL_QEI0_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
600 #define IOC_PB13_FUNC_CTL_QEO1_B               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
601 #define IOC_PB13_FUNC_CTL_SEI0_CK              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
602 
603 /* IOC_PB14_FUNC_CTL function mux definitions */
604 #define IOC_PB14_FUNC_CTL_GPIO_B_14            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
605 #define IOC_PB14_FUNC_CTL_UART3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
606 #define IOC_PB14_FUNC_CTL_SPI2_DAT2            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
607 #define IOC_PB14_FUNC_CTL_MCAN3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
608 #define IOC_PB14_FUNC_CTL_PWM0_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
609 #define IOC_PB14_FUNC_CTL_PWM1_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
610 #define IOC_PB14_FUNC_CTL_TRGM0_P_02           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
611 #define IOC_PB14_FUNC_CTL_RDC0_EXC_P           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
612 #define IOC_PB14_FUNC_CTL_QEI0_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
613 #define IOC_PB14_FUNC_CTL_QEO1_Z               IOC_PAD_FUNC_CTL_ALT_SELECT_SET(21)
614 #define IOC_PB14_FUNC_CTL_SEI0_TX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
615 
616 /* IOC_PB15_FUNC_CTL function mux definitions */
617 #define IOC_PB15_FUNC_CTL_GPIO_B_15            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
618 #define IOC_PB15_FUNC_CTL_GPTMR0_COMP_3        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
619 #define IOC_PB15_FUNC_CTL_UART3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
620 #define IOC_PB15_FUNC_CTL_SPI2_DAT3            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
621 #define IOC_PB15_FUNC_CTL_MCAN3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
622 #define IOC_PB15_FUNC_CTL_PWM0_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
623 #define IOC_PB15_FUNC_CTL_PWM1_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
624 #define IOC_PB15_FUNC_CTL_TRGM0_P_03           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
625 #define IOC_PB15_FUNC_CTL_RDC0_EXC_N           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
626 #define IOC_PB15_FUNC_CTL_QEI0_H0              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(20)
627 #define IOC_PB15_FUNC_CTL_SEI0_RX              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(22)
628 
629 /* IOC_PX00_FUNC_CTL function mux definitions */
630 #define IOC_PX00_FUNC_CTL_GPIO_X_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
631 #define IOC_PX00_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
632 #define IOC_PX00_FUNC_CTL_UART4_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
633 #define IOC_PX00_FUNC_CTL_MCAN0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
634 #define IOC_PX00_FUNC_CTL_XPI0_CA_D_2          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
635 
636 /* IOC_PX01_FUNC_CTL function mux definitions */
637 #define IOC_PX01_FUNC_CTL_GPIO_X_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
638 #define IOC_PX01_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
639 #define IOC_PX01_FUNC_CTL_UART4_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
640 #define IOC_PX01_FUNC_CTL_MCAN0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
641 #define IOC_PX01_FUNC_CTL_XPI0_CA_D_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
642 
643 /* IOC_PX02_FUNC_CTL function mux definitions */
644 #define IOC_PX02_FUNC_CTL_GPIO_X_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
645 #define IOC_PX02_FUNC_CTL_GPTMR2_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
646 #define IOC_PX02_FUNC_CTL_UART4_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
647 #define IOC_PX02_FUNC_CTL_UART4_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
648 #define IOC_PX02_FUNC_CTL_I2C0_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
649 #define IOC_PX02_FUNC_CTL_MCAN0_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
650 #define IOC_PX02_FUNC_CTL_XPI0_CA_CS0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
651 
652 /* IOC_PX03_FUNC_CTL function mux definitions */
653 #define IOC_PX03_FUNC_CTL_GPIO_X_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
654 #define IOC_PX03_FUNC_CTL_GPTMR2_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
655 #define IOC_PX03_FUNC_CTL_UART4_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
656 #define IOC_PX03_FUNC_CTL_I2C0_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
657 #define IOC_PX03_FUNC_CTL_MCAN1_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
658 #define IOC_PX03_FUNC_CTL_XPI0_CA_DQS          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
659 
660 /* IOC_PX04_FUNC_CTL function mux definitions */
661 #define IOC_PX04_FUNC_CTL_GPIO_X_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
662 #define IOC_PX04_FUNC_CTL_UART5_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
663 #define IOC_PX04_FUNC_CTL_SPI1_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
664 #define IOC_PX04_FUNC_CTL_MCAN1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
665 #define IOC_PX04_FUNC_CTL_XPI0_CA_CS1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
666 
667 /* IOC_PX05_FUNC_CTL function mux definitions */
668 #define IOC_PX05_FUNC_CTL_GPIO_X_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
669 #define IOC_PX05_FUNC_CTL_GPTMR2_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
670 #define IOC_PX05_FUNC_CTL_UART5_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
671 #define IOC_PX05_FUNC_CTL_UART5_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
672 #define IOC_PX05_FUNC_CTL_SPI1_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
673 #define IOC_PX05_FUNC_CTL_MCAN1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
674 #define IOC_PX05_FUNC_CTL_XPI0_CA_D_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
675 
676 /* IOC_PX06_FUNC_CTL function mux definitions */
677 #define IOC_PX06_FUNC_CTL_GPIO_X_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
678 #define IOC_PX06_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
679 #define IOC_PX06_FUNC_CTL_UART5_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
680 #define IOC_PX06_FUNC_CTL_I2C1_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
681 #define IOC_PX06_FUNC_CTL_SPI1_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
682 #define IOC_PX06_FUNC_CTL_XPI0_CA_SCLK         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
683 
684 /* IOC_PX07_FUNC_CTL function mux definitions */
685 #define IOC_PX07_FUNC_CTL_GPIO_X_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
686 #define IOC_PX07_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
687 #define IOC_PX07_FUNC_CTL_UART5_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
688 #define IOC_PX07_FUNC_CTL_I2C1_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
689 #define IOC_PX07_FUNC_CTL_SPI1_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
690 #define IOC_PX07_FUNC_CTL_XPI0_CA_D_3          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(14)
691 
692 /* IOC_PY00_FUNC_CTL function mux definitions */
693 #define IOC_PY00_FUNC_CTL_GPIO_Y_00            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
694 #define IOC_PY00_FUNC_CTL_GPTMR3_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
695 #define IOC_PY00_FUNC_CTL_UART0_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
696 #define IOC_PY00_FUNC_CTL_MCAN2_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
697 #define IOC_PY00_FUNC_CTL_PWM0_P_0             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
698 #define IOC_PY00_FUNC_CTL_PWM1_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
699 #define IOC_PY00_FUNC_CTL_PWM0_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
700 #define IOC_PY00_FUNC_CTL_USB0_ID              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)
701 
702 /* IOC_PY01_FUNC_CTL function mux definitions */
703 #define IOC_PY01_FUNC_CTL_GPIO_Y_01            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
704 #define IOC_PY01_FUNC_CTL_GPTMR3_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
705 #define IOC_PY01_FUNC_CTL_UART0_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
706 #define IOC_PY01_FUNC_CTL_MCAN2_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
707 #define IOC_PY01_FUNC_CTL_PWM0_P_1             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
708 #define IOC_PY01_FUNC_CTL_PWM1_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
709 #define IOC_PY01_FUNC_CTL_PWM0_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
710 #define IOC_PY01_FUNC_CTL_EWDG0_RST            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
711 #define IOC_PY01_FUNC_CTL_USB0_OC              IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)
712 
713 /* IOC_PY02_FUNC_CTL function mux definitions */
714 #define IOC_PY02_FUNC_CTL_GPIO_Y_02            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
715 #define IOC_PY02_FUNC_CTL_GPTMR3_COMP_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
716 #define IOC_PY02_FUNC_CTL_UART0_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
717 #define IOC_PY02_FUNC_CTL_UART0_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
718 #define IOC_PY02_FUNC_CTL_I2C2_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
719 #define IOC_PY02_FUNC_CTL_MCAN2_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
720 #define IOC_PY02_FUNC_CTL_PWM0_P_2             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
721 #define IOC_PY02_FUNC_CTL_PWM1_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
722 #define IOC_PY02_FUNC_CTL_ACMP_COMP_0          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
723 #define IOC_PY02_FUNC_CTL_PWM1_FAULT_0         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
724 #define IOC_PY02_FUNC_CTL_EWDG1_RST            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
725 #define IOC_PY02_FUNC_CTL_USB0_PWR             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(25)
726 
727 /* IOC_PY03_FUNC_CTL function mux definitions */
728 #define IOC_PY03_FUNC_CTL_GPIO_Y_03            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
729 #define IOC_PY03_FUNC_CTL_GPTMR3_CAPT_1        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
730 #define IOC_PY03_FUNC_CTL_UART0_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
731 #define IOC_PY03_FUNC_CTL_I2C2_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
732 #define IOC_PY03_FUNC_CTL_MCAN3_STBY           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
733 #define IOC_PY03_FUNC_CTL_PWM0_P_3             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
734 #define IOC_PY03_FUNC_CTL_PWM1_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(17)
735 #define IOC_PY03_FUNC_CTL_ACMP_COMP_1          IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
736 #define IOC_PY03_FUNC_CTL_PWM1_FAULT_1         IOC_PAD_FUNC_CTL_ALT_SELECT_SET(19)
737 
738 /* IOC_PY04_FUNC_CTL function mux definitions */
739 #define IOC_PY04_FUNC_CTL_GPIO_Y_04            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
740 #define IOC_PY04_FUNC_CTL_UART1_CTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
741 #define IOC_PY04_FUNC_CTL_SPI2_CS_0            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
742 #define IOC_PY04_FUNC_CTL_MCAN3_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
743 #define IOC_PY04_FUNC_CTL_PWM0_P_4             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
744 #define IOC_PY04_FUNC_CTL_TRGM0_P_04           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
745 
746 /* IOC_PY05_FUNC_CTL function mux definitions */
747 #define IOC_PY05_FUNC_CTL_GPIO_Y_05            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
748 #define IOC_PY05_FUNC_CTL_GPTMR3_COMP_2        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
749 #define IOC_PY05_FUNC_CTL_UART1_DE             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
750 #define IOC_PY05_FUNC_CTL_UART1_RTS            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(3)
751 #define IOC_PY05_FUNC_CTL_SPI2_SCLK            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
752 #define IOC_PY05_FUNC_CTL_MCAN3_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(7)
753 #define IOC_PY05_FUNC_CTL_PWM0_P_5             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
754 #define IOC_PY05_FUNC_CTL_TRGM0_P_05           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
755 #define IOC_PY05_FUNC_CTL_EWDG0_RST            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
756 
757 /* IOC_PY06_FUNC_CTL function mux definitions */
758 #define IOC_PY06_FUNC_CTL_GPIO_Y_06            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
759 #define IOC_PY06_FUNC_CTL_GPTMR2_CAPT_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
760 #define IOC_PY06_FUNC_CTL_UART1_RXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
761 #define IOC_PY06_FUNC_CTL_I2C3_SDA             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
762 #define IOC_PY06_FUNC_CTL_SPI2_MISO            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
763 #define IOC_PY06_FUNC_CTL_PWM0_P_6             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
764 #define IOC_PY06_FUNC_CTL_TRGM0_P_06           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
765 #define IOC_PY06_FUNC_CTL_EWDG1_RST            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(24)
766 
767 /* IOC_PY07_FUNC_CTL function mux definitions */
768 #define IOC_PY07_FUNC_CTL_GPIO_Y_07            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(0)
769 #define IOC_PY07_FUNC_CTL_GPTMR2_COMP_0        IOC_PAD_FUNC_CTL_ALT_SELECT_SET(1)
770 #define IOC_PY07_FUNC_CTL_UART1_TXD            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(2)
771 #define IOC_PY07_FUNC_CTL_I2C3_SCL             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(4)
772 #define IOC_PY07_FUNC_CTL_SPI2_MOSI            IOC_PAD_FUNC_CTL_ALT_SELECT_SET(5)
773 #define IOC_PY07_FUNC_CTL_PWM0_P_7             IOC_PAD_FUNC_CTL_ALT_SELECT_SET(16)
774 #define IOC_PY07_FUNC_CTL_TRGM0_P_07           IOC_PAD_FUNC_CTL_ALT_SELECT_SET(18)
775 
776 
777 #endif /* HPM_IOMUX_H */
778