1 /*
2  * Copyright (c) 2021-2024 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_SOC_H
10 #define HPM_SOC_H
11 
12 
13 /* List of external IRQs */
14 #define IRQn_GPIO0_A                   1       /* GPIO0_A IRQ */
15 #define IRQn_GPIO0_B                   2       /* GPIO0_B IRQ */
16 #define IRQn_GPIO0_C                   3       /* GPIO0_C IRQ */
17 #define IRQn_GPIO0_D                   4       /* GPIO0_D IRQ */
18 #define IRQn_GPIO0_X                   5       /* GPIO0_X IRQ */
19 #define IRQn_GPIO0_Y                   6       /* GPIO0_Y IRQ */
20 #define IRQn_GPIO0_Z                   7       /* GPIO0_Z IRQ */
21 #define IRQn_GPIO1_A                   8       /* GPIO1_A IRQ */
22 #define IRQn_GPIO1_B                   9       /* GPIO1_B IRQ */
23 #define IRQn_GPIO1_C                   10      /* GPIO1_C IRQ */
24 #define IRQn_GPIO1_D                   11      /* GPIO1_D IRQ */
25 #define IRQn_GPIO1_X                   12      /* GPIO1_X IRQ */
26 #define IRQn_GPIO1_Y                   13      /* GPIO1_Y IRQ */
27 #define IRQn_GPIO1_Z                   14      /* GPIO1_Z IRQ */
28 #define IRQn_ADC0                      15      /* ADC0 IRQ */
29 #define IRQn_ADC1                      16      /* ADC1 IRQ */
30 #define IRQn_ADC2                      17      /* ADC2 IRQ */
31 #define IRQn_SDFM                      18      /* SDFM IRQ */
32 #define IRQn_DAC0                      19      /* DAC0 IRQ */
33 #define IRQn_DAC1                      20      /* DAC1 IRQ */
34 #define IRQn_ACMP_0                    21      /* ACMP[0] IRQ */
35 #define IRQn_ACMP_1                    22      /* ACMP[1] IRQ */
36 #define IRQn_ACMP_2                    23      /* ACMP[2] IRQ */
37 #define IRQn_ACMP_3                    24      /* ACMP[3] IRQ */
38 #define IRQn_SPI0                      25      /* SPI0 IRQ */
39 #define IRQn_SPI1                      26      /* SPI1 IRQ */
40 #define IRQn_SPI2                      27      /* SPI2 IRQ */
41 #define IRQn_SPI3                      28      /* SPI3 IRQ */
42 #define IRQn_UART0                     29      /* UART0 IRQ */
43 #define IRQn_UART1                     30      /* UART1 IRQ */
44 #define IRQn_UART2                     31      /* UART2 IRQ */
45 #define IRQn_UART3                     32      /* UART3 IRQ */
46 #define IRQn_UART4                     33      /* UART4 IRQ */
47 #define IRQn_UART5                     34      /* UART5 IRQ */
48 #define IRQn_UART6                     35      /* UART6 IRQ */
49 #define IRQn_UART7                     36      /* UART7 IRQ */
50 #define IRQn_MCAN0                     37      /* MCAN0 IRQ */
51 #define IRQn_MCAN1                     38      /* MCAN1 IRQ */
52 #define IRQn_MCAN2                     39      /* MCAN2 IRQ */
53 #define IRQn_MCAN3                     40      /* MCAN3 IRQ */
54 #define IRQn_PTPC                      41      /* PTPC IRQ */
55 #define IRQn_WDG0                      42      /* WDG0 IRQ */
56 #define IRQn_WDG1                      43      /* WDG1 IRQ */
57 #define IRQn_TSNS                      44      /* TSNS IRQ */
58 #define IRQn_MBX0A                     45      /* MBX0A IRQ */
59 #define IRQn_MBX0B                     46      /* MBX0B IRQ */
60 #define IRQn_MBX1A                     47      /* MBX1A IRQ */
61 #define IRQn_MBX1B                     48      /* MBX1B IRQ */
62 #define IRQn_GPTMR0                    49      /* GPTMR0 IRQ */
63 #define IRQn_GPTMR1                    50      /* GPTMR1 IRQ */
64 #define IRQn_GPTMR2                    51      /* GPTMR2 IRQ */
65 #define IRQn_GPTMR3                    52      /* GPTMR3 IRQ */
66 #define IRQn_I2C0                      53      /* I2C0 IRQ */
67 #define IRQn_I2C1                      54      /* I2C1 IRQ */
68 #define IRQn_I2C2                      55      /* I2C2 IRQ */
69 #define IRQn_I2C3                      56      /* I2C3 IRQ */
70 #define IRQn_PWM0                      57      /* PWM0 IRQ */
71 #define IRQn_HALL0                     58      /* HALL0 IRQ */
72 #define IRQn_QEI0                      59      /* QEI0 IRQ */
73 #define IRQn_PWM1                      60      /* PWM1 IRQ */
74 #define IRQn_HALL1                     61      /* HALL1 IRQ */
75 #define IRQn_QEI1                      62      /* QEI1 IRQ */
76 #define IRQn_PWM2                      63      /* PWM2 IRQ */
77 #define IRQn_HALL2                     64      /* HALL2 IRQ */
78 #define IRQn_QEI2                      65      /* QEI2 IRQ */
79 #define IRQn_PWM3                      66      /* PWM3 IRQ */
80 #define IRQn_HALL3                     67      /* HALL3 IRQ */
81 #define IRQn_QEI3                      68      /* QEI3 IRQ */
82 #define IRQn_SDP                       69      /* SDP IRQ */
83 #define IRQn_XPI0                      70      /* XPI0 IRQ */
84 #define IRQn_XDMA                      71      /* XDMA IRQ */
85 #define IRQn_HDMA                      72      /* HDMA IRQ */
86 #define IRQn_RNG                       73      /* RNG IRQ */
87 #define IRQn_USB0                      74      /* USB0 IRQ */
88 #define IRQn_PSEC                      75      /* PSEC IRQ */
89 #define IRQn_PGPIO                     76      /* PGPIO IRQ */
90 #define IRQn_PWDG                      77      /* PWDG IRQ */
91 #define IRQn_PTMR                      78      /* PTMR IRQ */
92 #define IRQn_PUART                     79      /* PUART IRQ */
93 #define IRQn_FUSE                      80      /* FUSE IRQ */
94 #define IRQn_SECMON                    81      /* SECMON IRQ */
95 #define IRQn_RTC                       82      /* RTC IRQ */
96 #define IRQn_BUTN                      83      /* BUTN IRQ */
97 #define IRQn_BGPIO                     84      /* BGPIO IRQ */
98 #define IRQn_BVIO                      85      /* BVIO IRQ */
99 #define IRQn_BROWNOUT                  86      /* BROWNOUT IRQ */
100 #define IRQn_SYSCTL                    87      /* SYSCTL IRQ */
101 #define IRQn_DEBUG_0                   88      /* DEBUG[0] IRQ */
102 #define IRQn_DEBUG_1                   89      /* DEBUG[1] IRQ */
103 #define IRQn_LIN0                      90      /* LIN0 IRQ */
104 #define IRQn_LIN1                      91      /* LIN1 IRQ */
105 #define IRQn_LIN2                      92      /* LIN2 IRQ */
106 #define IRQn_LIN3                      93      /* LIN3 IRQ */
107 
108 #include "hpm_common.h"
109 
110 #include "hpm_gpio_regs.h"
111 /* Address of GPIO instances */
112 /* FGPIO base address */
113 #define HPM_FGPIO_BASE (0xC0000UL)
114 /* FGPIO base pointer */
115 #define HPM_FGPIO ((GPIO_Type *) HPM_FGPIO_BASE)
116 /* GPIO0 base address */
117 #define HPM_GPIO0_BASE (0xF0000000UL)
118 /* GPIO0 base pointer */
119 #define HPM_GPIO0 ((GPIO_Type *) HPM_GPIO0_BASE)
120 /* GPIO1 base address */
121 #define HPM_GPIO1_BASE (0xF0004000UL)
122 /* GPIO1 base pointer */
123 #define HPM_GPIO1 ((GPIO_Type *) HPM_GPIO1_BASE)
124 /* PGPIO base address */
125 #define HPM_PGPIO_BASE (0xF40DC000UL)
126 /* PGPIO base pointer */
127 #define HPM_PGPIO ((GPIO_Type *) HPM_PGPIO_BASE)
128 /* BGPIO base address */
129 #define HPM_BGPIO_BASE (0xF5014000UL)
130 /* BGPIO base pointer */
131 #define HPM_BGPIO ((GPIO_Type *) HPM_BGPIO_BASE)
132 
133 /* Address of DM instances */
134 /* DM base address */
135 #define HPM_DM_BASE (0x30000000UL)
136 
137 #include "hpm_plic_regs.h"
138 /* Address of PLIC instances */
139 /* PLIC base address */
140 #define HPM_PLIC_BASE (0xE4000000UL)
141 /* PLIC base pointer */
142 #define HPM_PLIC ((PLIC_Type *) HPM_PLIC_BASE)
143 
144 #include "hpm_mchtmr_regs.h"
145 /* Address of MCHTMR instances */
146 /* MCHTMR base address */
147 #define HPM_MCHTMR_BASE (0xE6000000UL)
148 /* MCHTMR base pointer */
149 #define HPM_MCHTMR ((MCHTMR_Type *) HPM_MCHTMR_BASE)
150 
151 #include "hpm_plic_sw_regs.h"
152 /* Address of PLICSW instances */
153 /* PLICSW base address */
154 #define HPM_PLICSW_BASE (0xE6400000UL)
155 /* PLICSW base pointer */
156 #define HPM_PLICSW ((PLIC_SW_Type *) HPM_PLICSW_BASE)
157 
158 #include "hpm_gpiom_regs.h"
159 /* Address of GPIOM instances */
160 /* GPIOM base address */
161 #define HPM_GPIOM_BASE (0xF0008000UL)
162 /* GPIOM base pointer */
163 #define HPM_GPIOM ((GPIOM_Type *) HPM_GPIOM_BASE)
164 
165 #include "hpm_adc16_regs.h"
166 /* Address of ADC16 instances */
167 /* ADC0 base address */
168 #define HPM_ADC0_BASE (0xF0010000UL)
169 /* ADC0 base pointer */
170 #define HPM_ADC0 ((ADC16_Type *) HPM_ADC0_BASE)
171 /* ADC1 base address */
172 #define HPM_ADC1_BASE (0xF0014000UL)
173 /* ADC1 base pointer */
174 #define HPM_ADC1 ((ADC16_Type *) HPM_ADC1_BASE)
175 /* ADC2 base address */
176 #define HPM_ADC2_BASE (0xF0018000UL)
177 /* ADC2 base pointer */
178 #define HPM_ADC2 ((ADC16_Type *) HPM_ADC2_BASE)
179 
180 #include "hpm_sdm_regs.h"
181 /* Address of SDM instances */
182 /* SDM base address */
183 #define HPM_SDM_BASE (0xF001C000UL)
184 /* SDM base pointer */
185 #define HPM_SDM ((SDM_Type *) HPM_SDM_BASE)
186 
187 #include "hpm_acmp_regs.h"
188 /* Address of ACMP instances */
189 /* ACMP base address */
190 #define HPM_ACMP_BASE (0xF0020000UL)
191 /* ACMP base pointer */
192 #define HPM_ACMP ((ACMP_Type *) HPM_ACMP_BASE)
193 
194 #include "hpm_dac_regs.h"
195 /* Address of DAC instances */
196 /* DAC0 base address */
197 #define HPM_DAC0_BASE (0xF0024000UL)
198 /* DAC0 base pointer */
199 #define HPM_DAC0 ((DAC_Type *) HPM_DAC0_BASE)
200 /* DAC1 base address */
201 #define HPM_DAC1_BASE (0xF0028000UL)
202 /* DAC1 base pointer */
203 #define HPM_DAC1 ((DAC_Type *) HPM_DAC1_BASE)
204 
205 #include "hpm_spi_regs.h"
206 /* Address of SPI instances */
207 /* SPI0 base address */
208 #define HPM_SPI0_BASE (0xF0030000UL)
209 /* SPI0 base pointer */
210 #define HPM_SPI0 ((SPI_Type *) HPM_SPI0_BASE)
211 /* SPI1 base address */
212 #define HPM_SPI1_BASE (0xF0034000UL)
213 /* SPI1 base pointer */
214 #define HPM_SPI1 ((SPI_Type *) HPM_SPI1_BASE)
215 /* SPI2 base address */
216 #define HPM_SPI2_BASE (0xF0038000UL)
217 /* SPI2 base pointer */
218 #define HPM_SPI2 ((SPI_Type *) HPM_SPI2_BASE)
219 /* SPI3 base address */
220 #define HPM_SPI3_BASE (0xF003C000UL)
221 /* SPI3 base pointer */
222 #define HPM_SPI3 ((SPI_Type *) HPM_SPI3_BASE)
223 
224 #include "hpm_uart_regs.h"
225 /* Address of UART instances */
226 /* UART0 base address */
227 #define HPM_UART0_BASE (0xF0040000UL)
228 /* UART0 base pointer */
229 #define HPM_UART0 ((UART_Type *) HPM_UART0_BASE)
230 /* UART1 base address */
231 #define HPM_UART1_BASE (0xF0044000UL)
232 /* UART1 base pointer */
233 #define HPM_UART1 ((UART_Type *) HPM_UART1_BASE)
234 /* UART2 base address */
235 #define HPM_UART2_BASE (0xF0048000UL)
236 /* UART2 base pointer */
237 #define HPM_UART2 ((UART_Type *) HPM_UART2_BASE)
238 /* UART3 base address */
239 #define HPM_UART3_BASE (0xF004C000UL)
240 /* UART3 base pointer */
241 #define HPM_UART3 ((UART_Type *) HPM_UART3_BASE)
242 /* UART4 base address */
243 #define HPM_UART4_BASE (0xF0050000UL)
244 /* UART4 base pointer */
245 #define HPM_UART4 ((UART_Type *) HPM_UART4_BASE)
246 /* UART5 base address */
247 #define HPM_UART5_BASE (0xF0054000UL)
248 /* UART5 base pointer */
249 #define HPM_UART5 ((UART_Type *) HPM_UART5_BASE)
250 /* UART6 base address */
251 #define HPM_UART6_BASE (0xF0058000UL)
252 /* UART6 base pointer */
253 #define HPM_UART6 ((UART_Type *) HPM_UART6_BASE)
254 /* UART7 base address */
255 #define HPM_UART7_BASE (0xF005C000UL)
256 /* UART7 base pointer */
257 #define HPM_UART7 ((UART_Type *) HPM_UART7_BASE)
258 /* PUART base address */
259 #define HPM_PUART_BASE (0xF40E4000UL)
260 /* PUART base pointer */
261 #define HPM_PUART ((UART_Type *) HPM_PUART_BASE)
262 
263 #include "hpm_mcan_regs.h"
264 /* Address of MCAN instances */
265 /* MCAN0 base address */
266 #define HPM_MCAN0_BASE (0xF0080000UL)
267 /* MCAN0 base pointer */
268 #define HPM_MCAN0 ((MCAN_Type *) HPM_MCAN0_BASE)
269 /* MCAN1 base address */
270 #define HPM_MCAN1_BASE (0xF0084000UL)
271 /* MCAN1 base pointer */
272 #define HPM_MCAN1 ((MCAN_Type *) HPM_MCAN1_BASE)
273 /* MCAN2 base address */
274 #define HPM_MCAN2_BASE (0xF0088000UL)
275 /* MCAN2 base pointer */
276 #define HPM_MCAN2 ((MCAN_Type *) HPM_MCAN2_BASE)
277 /* MCAN3 base address */
278 #define HPM_MCAN3_BASE (0xF008C000UL)
279 /* MCAN3 base pointer */
280 #define HPM_MCAN3 ((MCAN_Type *) HPM_MCAN3_BASE)
281 
282 #include "hpm_wdg_regs.h"
283 /* Address of WDOG instances */
284 /* WDG0 base address */
285 #define HPM_WDG0_BASE (0xF0090000UL)
286 /* WDG0 base pointer */
287 #define HPM_WDG0 ((WDG_Type *) HPM_WDG0_BASE)
288 /* WDG1 base address */
289 #define HPM_WDG1_BASE (0xF0094000UL)
290 /* WDG1 base pointer */
291 #define HPM_WDG1 ((WDG_Type *) HPM_WDG1_BASE)
292 /* PWDG base address */
293 #define HPM_PWDG_BASE (0xF40E8000UL)
294 /* PWDG base pointer */
295 #define HPM_PWDG ((WDG_Type *) HPM_PWDG_BASE)
296 
297 #include "hpm_mbx_regs.h"
298 /* Address of MBX instances */
299 /* MBX0A base address */
300 #define HPM_MBX0A_BASE (0xF00A0000UL)
301 /* MBX0A base pointer */
302 #define HPM_MBX0A ((MBX_Type *) HPM_MBX0A_BASE)
303 /* MBX0B base address */
304 #define HPM_MBX0B_BASE (0xF00A4000UL)
305 /* MBX0B base pointer */
306 #define HPM_MBX0B ((MBX_Type *) HPM_MBX0B_BASE)
307 /* MBX1A base address */
308 #define HPM_MBX1A_BASE (0xF00A8000UL)
309 /* MBX1A base pointer */
310 #define HPM_MBX1A ((MBX_Type *) HPM_MBX1A_BASE)
311 /* MBX1B base address */
312 #define HPM_MBX1B_BASE (0xF00AC000UL)
313 /* MBX1B base pointer */
314 #define HPM_MBX1B ((MBX_Type *) HPM_MBX1B_BASE)
315 
316 #include "hpm_ptpc_regs.h"
317 /* Address of PTPC instances */
318 /* PTPC base address */
319 #define HPM_PTPC_BASE (0xF00B0000UL)
320 /* PTPC base pointer */
321 #define HPM_PTPC ((PTPC_Type *) HPM_PTPC_BASE)
322 
323 #include "hpm_crc_regs.h"
324 /* Address of CRC instances */
325 /* CRC base address */
326 #define HPM_CRC_BASE (0xF00B8000UL)
327 /* CRC base pointer */
328 #define HPM_CRC ((CRC_Type *) HPM_CRC_BASE)
329 
330 #include "hpm_dmamux_regs.h"
331 /* Address of DMAMUX instances */
332 /* DMAMUX base address */
333 #define HPM_DMAMUX_BASE (0xF00C0000UL)
334 /* DMAMUX base pointer */
335 #define HPM_DMAMUX ((DMAMUX_Type *) HPM_DMAMUX_BASE)
336 
337 #include "hpm_dma_regs.h"
338 /* Address of DMA instances */
339 /* HDMA base address */
340 #define HPM_HDMA_BASE (0xF00C4000UL)
341 /* HDMA base pointer */
342 #define HPM_HDMA ((DMA_Type *) HPM_HDMA_BASE)
343 /* XDMA base address */
344 #define HPM_XDMA_BASE (0xF3048000UL)
345 /* XDMA base pointer */
346 #define HPM_XDMA ((DMA_Type *) HPM_XDMA_BASE)
347 
348 #include "hpm_rng_regs.h"
349 /* Address of RNG instances */
350 /* RNG base address */
351 #define HPM_RNG_BASE (0xF00C8000UL)
352 /* RNG base pointer */
353 #define HPM_RNG ((RNG_Type *) HPM_RNG_BASE)
354 
355 #include "hpm_keym_regs.h"
356 /* Address of KEYM instances */
357 /* KEYM base address */
358 #define HPM_KEYM_BASE (0xF00CC000UL)
359 /* KEYM base pointer */
360 #define HPM_KEYM ((KEYM_Type *) HPM_KEYM_BASE)
361 
362 #include "hpm_pwm_regs.h"
363 /* Address of PWM instances */
364 /* PWM0 base address */
365 #define HPM_PWM0_BASE (0xF0200000UL)
366 /* PWM0 base pointer */
367 #define HPM_PWM0 ((PWM_Type *) HPM_PWM0_BASE)
368 /* PWM1 base address */
369 #define HPM_PWM1_BASE (0xF0210000UL)
370 /* PWM1 base pointer */
371 #define HPM_PWM1 ((PWM_Type *) HPM_PWM1_BASE)
372 /* PWM2 base address */
373 #define HPM_PWM2_BASE (0xF0220000UL)
374 /* PWM2 base pointer */
375 #define HPM_PWM2 ((PWM_Type *) HPM_PWM2_BASE)
376 /* PWM3 base address */
377 #define HPM_PWM3_BASE (0xF0230000UL)
378 /* PWM3 base pointer */
379 #define HPM_PWM3 ((PWM_Type *) HPM_PWM3_BASE)
380 
381 #include "hpm_hall_regs.h"
382 /* Address of HALL instances */
383 /* HALL0 base address */
384 #define HPM_HALL0_BASE (0xF0204000UL)
385 /* HALL0 base pointer */
386 #define HPM_HALL0 ((HALL_Type *) HPM_HALL0_BASE)
387 /* HALL1 base address */
388 #define HPM_HALL1_BASE (0xF0214000UL)
389 /* HALL1 base pointer */
390 #define HPM_HALL1 ((HALL_Type *) HPM_HALL1_BASE)
391 /* HALL2 base address */
392 #define HPM_HALL2_BASE (0xF0224000UL)
393 /* HALL2 base pointer */
394 #define HPM_HALL2 ((HALL_Type *) HPM_HALL2_BASE)
395 /* HALL3 base address */
396 #define HPM_HALL3_BASE (0xF0234000UL)
397 /* HALL3 base pointer */
398 #define HPM_HALL3 ((HALL_Type *) HPM_HALL3_BASE)
399 
400 #include "hpm_qei_regs.h"
401 /* Address of QEI instances */
402 /* QEI0 base address */
403 #define HPM_QEI0_BASE (0xF0208000UL)
404 /* QEI0 base pointer */
405 #define HPM_QEI0 ((QEI_Type *) HPM_QEI0_BASE)
406 /* QEI1 base address */
407 #define HPM_QEI1_BASE (0xF0218000UL)
408 /* QEI1 base pointer */
409 #define HPM_QEI1 ((QEI_Type *) HPM_QEI1_BASE)
410 /* QEI2 base address */
411 #define HPM_QEI2_BASE (0xF0228000UL)
412 /* QEI2 base pointer */
413 #define HPM_QEI2 ((QEI_Type *) HPM_QEI2_BASE)
414 /* QEI3 base address */
415 #define HPM_QEI3_BASE (0xF0238000UL)
416 /* QEI3 base pointer */
417 #define HPM_QEI3 ((QEI_Type *) HPM_QEI3_BASE)
418 
419 #include "hpm_trgm_regs.h"
420 /* Address of TRGM instances */
421 /* TRGM0 base address */
422 #define HPM_TRGM0_BASE (0xF020C000UL)
423 /* TRGM0 base pointer */
424 #define HPM_TRGM0 ((TRGM_Type *) HPM_TRGM0_BASE)
425 /* TRGM1 base address */
426 #define HPM_TRGM1_BASE (0xF021C000UL)
427 /* TRGM1 base pointer */
428 #define HPM_TRGM1 ((TRGM_Type *) HPM_TRGM1_BASE)
429 /* TRGM2 base address */
430 #define HPM_TRGM2_BASE (0xF022C000UL)
431 /* TRGM2 base pointer */
432 #define HPM_TRGM2 ((TRGM_Type *) HPM_TRGM2_BASE)
433 /* TRGM3 base address */
434 #define HPM_TRGM3_BASE (0xF023C000UL)
435 /* TRGM3 base pointer */
436 #define HPM_TRGM3 ((TRGM_Type *) HPM_TRGM3_BASE)
437 
438 #include "hpm_pla_regs.h"
439 /* Address of PLA instances */
440 /* PLA0 base address */
441 #define HPM_PLA0_BASE (0xF020E000UL)
442 /* PLA0 base pointer */
443 #define HPM_PLA0 ((PLA_Type *) HPM_PLA0_BASE)
444 /* PLA1 base address */
445 #define HPM_PLA1_BASE (0xF021E000UL)
446 /* PLA1 base pointer */
447 #define HPM_PLA1 ((PLA_Type *) HPM_PLA1_BASE)
448 
449 #include "hpm_synt_regs.h"
450 /* Address of SYNT instances */
451 /* SYNT base address */
452 #define HPM_SYNT_BASE (0xF0240000UL)
453 /* SYNT base pointer */
454 #define HPM_SYNT ((SYNT_Type *) HPM_SYNT_BASE)
455 
456 #include "hpm_usb_regs.h"
457 /* Address of USB instances */
458 /* USB0 base address */
459 #define HPM_USB0_BASE (0xF2020000UL)
460 /* USB0 base pointer */
461 #define HPM_USB0 ((USB_Type *) HPM_USB0_BASE)
462 
463 #include "hpm_gptmr_regs.h"
464 /* Address of GPTMR instances */
465 /* GPTMR0 base address */
466 #define HPM_GPTMR0_BASE (0xF3000000UL)
467 /* GPTMR0 base pointer */
468 #define HPM_GPTMR0 ((GPTMR_Type *) HPM_GPTMR0_BASE)
469 /* GPTMR1 base address */
470 #define HPM_GPTMR1_BASE (0xF3004000UL)
471 /* GPTMR1 base pointer */
472 #define HPM_GPTMR1 ((GPTMR_Type *) HPM_GPTMR1_BASE)
473 /* GPTMR2 base address */
474 #define HPM_GPTMR2_BASE (0xF3008000UL)
475 /* GPTMR2 base pointer */
476 #define HPM_GPTMR2 ((GPTMR_Type *) HPM_GPTMR2_BASE)
477 /* GPTMR3 base address */
478 #define HPM_GPTMR3_BASE (0xF300C000UL)
479 /* GPTMR3 base pointer */
480 #define HPM_GPTMR3 ((GPTMR_Type *) HPM_GPTMR3_BASE)
481 /* PTMR base address */
482 #define HPM_PTMR_BASE (0xF40E0000UL)
483 /* PTMR base pointer */
484 #define HPM_PTMR ((GPTMR_Type *) HPM_PTMR_BASE)
485 
486 #include "hpm_i2c_regs.h"
487 /* Address of I2C instances */
488 /* I2C0 base address */
489 #define HPM_I2C0_BASE (0xF3020000UL)
490 /* I2C0 base pointer */
491 #define HPM_I2C0 ((I2C_Type *) HPM_I2C0_BASE)
492 /* I2C1 base address */
493 #define HPM_I2C1_BASE (0xF3024000UL)
494 /* I2C1 base pointer */
495 #define HPM_I2C1 ((I2C_Type *) HPM_I2C1_BASE)
496 /* I2C2 base address */
497 #define HPM_I2C2_BASE (0xF3028000UL)
498 /* I2C2 base pointer */
499 #define HPM_I2C2 ((I2C_Type *) HPM_I2C2_BASE)
500 /* I2C3 base address */
501 #define HPM_I2C3_BASE (0xF302C000UL)
502 /* I2C3 base pointer */
503 #define HPM_I2C3 ((I2C_Type *) HPM_I2C3_BASE)
504 
505 #include "hpm_lin_regs.h"
506 /* Address of LIN instances */
507 /* LIN0 base address */
508 #define HPM_LIN0_BASE (0xF3030000UL)
509 /* LIN0 base pointer */
510 #define HPM_LIN0 ((LIN_Type *) HPM_LIN0_BASE)
511 /* LIN1 base address */
512 #define HPM_LIN1_BASE (0xF3034000UL)
513 /* LIN1 base pointer */
514 #define HPM_LIN1 ((LIN_Type *) HPM_LIN1_BASE)
515 /* LIN2 base address */
516 #define HPM_LIN2_BASE (0xF3038000UL)
517 /* LIN2 base pointer */
518 #define HPM_LIN2 ((LIN_Type *) HPM_LIN2_BASE)
519 /* LIN3 base address */
520 #define HPM_LIN3_BASE (0xF303C000UL)
521 /* LIN3 base pointer */
522 #define HPM_LIN3 ((LIN_Type *) HPM_LIN3_BASE)
523 
524 #include "hpm_sdp_regs.h"
525 /* Address of SDP instances */
526 /* SDP base address */
527 #define HPM_SDP_BASE (0xF304C000UL)
528 /* SDP base pointer */
529 #define HPM_SDP ((SDP_Type *) HPM_SDP_BASE)
530 
531 /* Address of ROMC instances */
532 /* ROMC base address */
533 #define HPM_ROMC_BASE (0xF3054000UL)
534 
535 #include "hpm_sysctl_regs.h"
536 /* Address of SYSCTL instances */
537 /* SYSCTL base address */
538 #define HPM_SYSCTL_BASE (0xF4000000UL)
539 /* SYSCTL base pointer */
540 #define HPM_SYSCTL ((SYSCTL_Type *) HPM_SYSCTL_BASE)
541 
542 #include "hpm_ioc_regs.h"
543 /* Address of IOC instances */
544 /* IOC base address */
545 #define HPM_IOC_BASE (0xF4040000UL)
546 /* IOC base pointer */
547 #define HPM_IOC ((IOC_Type *) HPM_IOC_BASE)
548 /* PIOC base address */
549 #define HPM_PIOC_BASE (0xF40D8000UL)
550 /* PIOC base pointer */
551 #define HPM_PIOC ((IOC_Type *) HPM_PIOC_BASE)
552 /* BIOC base address */
553 #define HPM_BIOC_BASE (0xF5010000UL)
554 /* BIOC base pointer */
555 #define HPM_BIOC ((IOC_Type *) HPM_BIOC_BASE)
556 
557 #include "hpm_otp_regs.h"
558 /* Address of OTP instances */
559 /* OTPSHW base address */
560 #define HPM_OTPSHW_BASE (0xF4080000UL)
561 /* OTPSHW base pointer */
562 #define HPM_OTPSHW ((OTP_Type *) HPM_OTPSHW_BASE)
563 /* OTP base address */
564 #define HPM_OTP_BASE (0xF40C8000UL)
565 /* OTP base pointer */
566 #define HPM_OTP ((OTP_Type *) HPM_OTP_BASE)
567 
568 #include "hpm_ppor_regs.h"
569 /* Address of PPOR instances */
570 /* PPOR base address */
571 #define HPM_PPOR_BASE (0xF40C0000UL)
572 /* PPOR base pointer */
573 #define HPM_PPOR ((PPOR_Type *) HPM_PPOR_BASE)
574 
575 #include "hpm_pcfg_regs.h"
576 /* Address of PCFG instances */
577 /* PCFG base address */
578 #define HPM_PCFG_BASE (0xF40C4000UL)
579 /* PCFG base pointer */
580 #define HPM_PCFG ((PCFG_Type *) HPM_PCFG_BASE)
581 
582 #include "hpm_psec_regs.h"
583 /* Address of PSEC instances */
584 /* PSEC base address */
585 #define HPM_PSEC_BASE (0xF40CC000UL)
586 /* PSEC base pointer */
587 #define HPM_PSEC ((PSEC_Type *) HPM_PSEC_BASE)
588 
589 #include "hpm_pmon_regs.h"
590 /* Address of PMON instances */
591 /* PMON base address */
592 #define HPM_PMON_BASE (0xF40D0000UL)
593 /* PMON base pointer */
594 #define HPM_PMON ((PMON_Type *) HPM_PMON_BASE)
595 
596 #include "hpm_pgpr_regs.h"
597 /* Address of PGPR instances */
598 /* PGPR base address */
599 #define HPM_PGPR_BASE (0xF40D4000UL)
600 /* PGPR base pointer */
601 #define HPM_PGPR ((PGPR_Type *) HPM_PGPR_BASE)
602 
603 #include "hpm_pllctlv2_regs.h"
604 /* Address of PLLCTLV2 instances */
605 /* PLLCTLV2 base address */
606 #define HPM_PLLCTLV2_BASE (0xF4100000UL)
607 /* PLLCTLV2 base pointer */
608 #define HPM_PLLCTLV2 ((PLLCTLV2_Type *) HPM_PLLCTLV2_BASE)
609 
610 #include "hpm_tsns_regs.h"
611 /* Address of TSNS instances */
612 /* TSNS base address */
613 #define HPM_TSNS_BASE (0xF4104000UL)
614 /* TSNS base pointer */
615 #define HPM_TSNS ((TSNS_Type *) HPM_TSNS_BASE)
616 
617 #include "hpm_bacc_regs.h"
618 /* Address of BACC instances */
619 /* BACC base address */
620 #define HPM_BACC_BASE (0xF5000000UL)
621 /* BACC base pointer */
622 #define HPM_BACC ((BACC_Type *) HPM_BACC_BASE)
623 
624 #include "hpm_bpor_regs.h"
625 /* Address of BPOR instances */
626 /* BPOR base address */
627 #define HPM_BPOR_BASE (0xF5004000UL)
628 /* BPOR base pointer */
629 #define HPM_BPOR ((BPOR_Type *) HPM_BPOR_BASE)
630 
631 #include "hpm_bcfg_regs.h"
632 /* Address of BCFG instances */
633 /* BCFG base address */
634 #define HPM_BCFG_BASE (0xF5008000UL)
635 /* BCFG base pointer */
636 #define HPM_BCFG ((BCFG_Type *) HPM_BCFG_BASE)
637 
638 #include "hpm_butn_regs.h"
639 /* Address of BUTN instances */
640 /* BUTN base address */
641 #define HPM_BUTN_BASE (0xF500C000UL)
642 /* BUTN base pointer */
643 #define HPM_BUTN ((BUTN_Type *) HPM_BUTN_BASE)
644 
645 #include "hpm_bgpr_regs.h"
646 /* Address of BGPR instances */
647 /* BGPR base address */
648 #define HPM_BGPR_BASE (0xF5018000UL)
649 /* BGPR base pointer */
650 #define HPM_BGPR ((BGPR_Type *) HPM_BGPR_BASE)
651 
652 #include "hpm_bsec_regs.h"
653 /* Address of BSEC instances */
654 /* BSEC base address */
655 #define HPM_BSEC_BASE (0xF5040000UL)
656 /* BSEC base pointer */
657 #define HPM_BSEC ((BSEC_Type *) HPM_BSEC_BASE)
658 
659 #include "hpm_rtc_regs.h"
660 /* Address of RTC instances */
661 /* RTC base address */
662 #define HPM_RTC_BASE (0xF5044000UL)
663 /* RTC base pointer */
664 #define HPM_RTC ((RTC_Type *) HPM_RTC_BASE)
665 
666 #include "hpm_bkey_regs.h"
667 /* Address of BKEY instances */
668 /* BKEY base address */
669 #define HPM_BKEY_BASE (0xF5048000UL)
670 /* BKEY base pointer */
671 #define HPM_BKEY ((BKEY_Type *) HPM_BKEY_BASE)
672 
673 #include "hpm_bmon_regs.h"
674 /* Address of BMON instances */
675 /* BMON base address */
676 #define HPM_BMON_BASE (0xF504C000UL)
677 /* BMON base pointer */
678 #define HPM_BMON ((BMON_Type *) HPM_BMON_BASE)
679 
680 #include "hpm_tamp_regs.h"
681 /* Address of TAMP instances */
682 /* TAMP base address */
683 #define HPM_TAMP_BASE (0xF5050000UL)
684 /* TAMP base pointer */
685 #define HPM_TAMP ((TAMP_Type *) HPM_TAMP_BASE)
686 
687 #include "hpm_mono_regs.h"
688 /* Address of MONO instances */
689 /* MONO base address */
690 #define HPM_MONO_BASE (0xF5054000UL)
691 /* MONO base pointer */
692 #define HPM_MONO ((MONO_Type *) HPM_MONO_BASE)
693 
694 
695 #include "riscv/riscv_core.h"
696 #include "hpm_csr_regs.h"
697 #include "hpm_interrupt.h"
698 #include "hpm_misc.h"
699 #include "hpm_dmamux_src.h"
700 #include "hpm_trgmmux_src.h"
701 #include "hpm_iomux.h"
702 #include "hpm_pmic_iomux.h"
703 #include "hpm_batt_iomux.h"
704 #endif /* HPM_SOC_H */
705