1 /* 2 * Copyright (c) 2021-2024 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 9 #ifndef HPM_OTP_H 10 #define HPM_OTP_H 11 12 typedef struct { 13 __RW uint32_t SHADOW[128]; /* 0x0 - 0x1FC: Fuse shadow registers */ 14 __RW uint32_t SHADOW_LOCK[8]; /* 0x200 - 0x21C: Fuse shadow lock */ 15 __R uint8_t RESERVED0[480]; /* 0x220 - 0x3FF: Reserved */ 16 __RW uint32_t FUSE[128]; /* 0x400 - 0x5FC: Fuse Array */ 17 __RW uint32_t FUSE_LOCK[8]; /* 0x600 - 0x61C: Fuse lock */ 18 __R uint8_t RESERVED1[480]; /* 0x620 - 0x7FF: Reserved */ 19 __RW uint32_t UNLOCK; /* 0x800: UNLOCK */ 20 __RW uint32_t DATA; /* 0x804: DATA */ 21 __RW uint32_t ADDR; /* 0x808: ADDR */ 22 __RW uint32_t CMD; /* 0x80C: CMD */ 23 __R uint8_t RESERVED2[496]; /* 0x810 - 0x9FF: Reserved */ 24 __RW uint32_t LOAD_REQ; /* 0xA00: LOAD Request */ 25 __RW uint32_t LOAD_COMP; /* 0xA04: LOAD complete */ 26 __R uint8_t RESERVED3[24]; /* 0xA08 - 0xA1F: Reserved */ 27 __RW uint32_t REGION[4]; /* 0xA20 - 0xA2C: LOAD region */ 28 __R uint8_t RESERVED4[464]; /* 0xA30 - 0xBFF: Reserved */ 29 __RW uint32_t INT_FLAG; /* 0xC00: interrupt flag */ 30 __RW uint32_t INT_EN; /* 0xC04: interrupt enable */ 31 } OTP_Type; 32 33 34 /* Bitfield definition for register array: SHADOW */ 35 /* 36 * SHADOW (RW) 37 * 38 * shadow register of fuse for pmic area 39 * for PMIC, index valid for 0-15, for SOC index valid for 16-128 40 */ 41 #define OTP_SHADOW_SHADOW_MASK (0xFFFFFFFFUL) 42 #define OTP_SHADOW_SHADOW_SHIFT (0U) 43 #define OTP_SHADOW_SHADOW_SET(x) (((uint32_t)(x) << OTP_SHADOW_SHADOW_SHIFT) & OTP_SHADOW_SHADOW_MASK) 44 #define OTP_SHADOW_SHADOW_GET(x) (((uint32_t)(x) & OTP_SHADOW_SHADOW_MASK) >> OTP_SHADOW_SHADOW_SHIFT) 45 46 /* Bitfield definition for register array: SHADOW_LOCK */ 47 /* 48 * LOCK (RW) 49 * 50 * lock for pmic part shadow registers, 2 bits per 32 bit word, lock behavior is different between different fuse types 51 * 00: not locked 52 * 01: soft locked 53 * 10: not locked, and cannot lock in furture 54 * 11: double locked 55 */ 56 #define OTP_SHADOW_LOCK_LOCK_MASK (0xFFFFFFFFUL) 57 #define OTP_SHADOW_LOCK_LOCK_SHIFT (0U) 58 #define OTP_SHADOW_LOCK_LOCK_SET(x) (((uint32_t)(x) << OTP_SHADOW_LOCK_LOCK_SHIFT) & OTP_SHADOW_LOCK_LOCK_MASK) 59 #define OTP_SHADOW_LOCK_LOCK_GET(x) (((uint32_t)(x) & OTP_SHADOW_LOCK_LOCK_MASK) >> OTP_SHADOW_LOCK_LOCK_SHIFT) 60 61 /* Bitfield definition for register array: FUSE */ 62 /* 63 * FUSE (RW) 64 * 65 * fuse array, valid in PMIC part only 66 * read operation will read out value in fuse array 67 * write operation will update fuse array value(please make sure fuse is unlocked and 2.5V power is ready) 68 */ 69 #define OTP_FUSE_FUSE_MASK (0xFFFFFFFFUL) 70 #define OTP_FUSE_FUSE_SHIFT (0U) 71 #define OTP_FUSE_FUSE_SET(x) (((uint32_t)(x) << OTP_FUSE_FUSE_SHIFT) & OTP_FUSE_FUSE_MASK) 72 #define OTP_FUSE_FUSE_GET(x) (((uint32_t)(x) & OTP_FUSE_FUSE_MASK) >> OTP_FUSE_FUSE_SHIFT) 73 74 /* Bitfield definition for register array: FUSE_LOCK */ 75 /* 76 * LOCK (RW) 77 * 78 * lock for fuse array, 2 bits per 32 bit word, lock behavior is different between different fuse types 79 * 00: not locked 80 * 01: soft locked 81 * 10: not locked, and cannot lock in furture 82 * 11: double locked 83 */ 84 #define OTP_FUSE_LOCK_LOCK_MASK (0xFFFFFFFFUL) 85 #define OTP_FUSE_LOCK_LOCK_SHIFT (0U) 86 #define OTP_FUSE_LOCK_LOCK_SET(x) (((uint32_t)(x) << OTP_FUSE_LOCK_LOCK_SHIFT) & OTP_FUSE_LOCK_LOCK_MASK) 87 #define OTP_FUSE_LOCK_LOCK_GET(x) (((uint32_t)(x) & OTP_FUSE_LOCK_LOCK_MASK) >> OTP_FUSE_LOCK_LOCK_SHIFT) 88 89 /* Bitfield definition for register: UNLOCK */ 90 /* 91 * UNLOCK (RW) 92 * 93 * unlock word for fuse array operation 94 * write "OPEN" to unlock fuse array, write any other value will lock write to fuse. 95 * Please make sure 24M crystal is running and 2.5V LDO working properly 96 */ 97 #define OTP_UNLOCK_UNLOCK_MASK (0xFFFFFFFFUL) 98 #define OTP_UNLOCK_UNLOCK_SHIFT (0U) 99 #define OTP_UNLOCK_UNLOCK_SET(x) (((uint32_t)(x) << OTP_UNLOCK_UNLOCK_SHIFT) & OTP_UNLOCK_UNLOCK_MASK) 100 #define OTP_UNLOCK_UNLOCK_GET(x) (((uint32_t)(x) & OTP_UNLOCK_UNLOCK_MASK) >> OTP_UNLOCK_UNLOCK_SHIFT) 101 102 /* Bitfield definition for register: DATA */ 103 /* 104 * DATA (RW) 105 * 106 * data register for non-blocking access 107 * this register hold dat read from fuse array or data to by programmed to fuse array 108 */ 109 #define OTP_DATA_DATA_MASK (0xFFFFFFFFUL) 110 #define OTP_DATA_DATA_SHIFT (0U) 111 #define OTP_DATA_DATA_SET(x) (((uint32_t)(x) << OTP_DATA_DATA_SHIFT) & OTP_DATA_DATA_MASK) 112 #define OTP_DATA_DATA_GET(x) (((uint32_t)(x) & OTP_DATA_DATA_MASK) >> OTP_DATA_DATA_SHIFT) 113 114 /* Bitfield definition for register: ADDR */ 115 /* 116 * ADDR (RW) 117 * 118 * word address to be read or write 119 */ 120 #define OTP_ADDR_ADDR_MASK (0x7FU) 121 #define OTP_ADDR_ADDR_SHIFT (0U) 122 #define OTP_ADDR_ADDR_SET(x) (((uint32_t)(x) << OTP_ADDR_ADDR_SHIFT) & OTP_ADDR_ADDR_MASK) 123 #define OTP_ADDR_ADDR_GET(x) (((uint32_t)(x) & OTP_ADDR_ADDR_MASK) >> OTP_ADDR_ADDR_SHIFT) 124 125 /* Bitfield definition for register: CMD */ 126 /* 127 * CMD (RW) 128 * 129 * command to access fure array 130 * "BLOW" will update fuse word at ADDR to value hold in DATA 131 * "READ" will fetch fuse value in at ADDR to DATA register 132 */ 133 #define OTP_CMD_CMD_MASK (0xFFFFFFFFUL) 134 #define OTP_CMD_CMD_SHIFT (0U) 135 #define OTP_CMD_CMD_SET(x) (((uint32_t)(x) << OTP_CMD_CMD_SHIFT) & OTP_CMD_CMD_MASK) 136 #define OTP_CMD_CMD_GET(x) (((uint32_t)(x) & OTP_CMD_CMD_MASK) >> OTP_CMD_CMD_SHIFT) 137 138 /* Bitfield definition for register: LOAD_REQ */ 139 /* 140 * REQUEST (RW) 141 * 142 * reload request for 4 regions 143 * bit0: region0 144 * bit1: region1 145 * bit2: region2 146 * bit3: region3 147 */ 148 #define OTP_LOAD_REQ_REQUEST_MASK (0xFU) 149 #define OTP_LOAD_REQ_REQUEST_SHIFT (0U) 150 #define OTP_LOAD_REQ_REQUEST_SET(x) (((uint32_t)(x) << OTP_LOAD_REQ_REQUEST_SHIFT) & OTP_LOAD_REQ_REQUEST_MASK) 151 #define OTP_LOAD_REQ_REQUEST_GET(x) (((uint32_t)(x) & OTP_LOAD_REQ_REQUEST_MASK) >> OTP_LOAD_REQ_REQUEST_SHIFT) 152 153 /* Bitfield definition for register: LOAD_COMP */ 154 /* 155 * COMPLETE (RW) 156 * 157 * reload complete sign for 4 regions 158 * bit0: region 0 159 * bit1: region1 160 * bit2: region2 161 * bit3: region3 162 */ 163 #define OTP_LOAD_COMP_COMPLETE_MASK (0xFU) 164 #define OTP_LOAD_COMP_COMPLETE_SHIFT (0U) 165 #define OTP_LOAD_COMP_COMPLETE_SET(x) (((uint32_t)(x) << OTP_LOAD_COMP_COMPLETE_SHIFT) & OTP_LOAD_COMP_COMPLETE_MASK) 166 #define OTP_LOAD_COMP_COMPLETE_GET(x) (((uint32_t)(x) & OTP_LOAD_COMP_COMPLETE_MASK) >> OTP_LOAD_COMP_COMPLETE_SHIFT) 167 168 /* Bitfield definition for register array: REGION */ 169 /* 170 * STOP (RW) 171 * 172 * stop address of load region, fuse word at end address will NOT be reloaded 173 * region0: fixed at 8 174 * region1: fixed at 16 175 * region2: fixed at 0, 176 * region3: usrer configurable 177 */ 178 #define OTP_REGION_STOP_MASK (0x7F00U) 179 #define OTP_REGION_STOP_SHIFT (8U) 180 #define OTP_REGION_STOP_SET(x) (((uint32_t)(x) << OTP_REGION_STOP_SHIFT) & OTP_REGION_STOP_MASK) 181 #define OTP_REGION_STOP_GET(x) (((uint32_t)(x) & OTP_REGION_STOP_MASK) >> OTP_REGION_STOP_SHIFT) 182 183 /* 184 * START (RW) 185 * 186 * start address of load region, fuse word at start address will be reloaded 187 * region0: fixed at 0 188 * region1: fixed at 8 189 * region2: fixed at 16, 190 * region3: usrer configurable 191 */ 192 #define OTP_REGION_START_MASK (0x7FU) 193 #define OTP_REGION_START_SHIFT (0U) 194 #define OTP_REGION_START_SET(x) (((uint32_t)(x) << OTP_REGION_START_SHIFT) & OTP_REGION_START_MASK) 195 #define OTP_REGION_START_GET(x) (((uint32_t)(x) & OTP_REGION_START_MASK) >> OTP_REGION_START_SHIFT) 196 197 /* Bitfield definition for register: INT_FLAG */ 198 /* 199 * WRITE (RW) 200 * 201 * fuse write flag, write 1 to clear 202 * 0: fuse is not written or writing 203 * 1: value in DATA register is programmed into fuse 204 */ 205 #define OTP_INT_FLAG_WRITE_MASK (0x4U) 206 #define OTP_INT_FLAG_WRITE_SHIFT (2U) 207 #define OTP_INT_FLAG_WRITE_SET(x) (((uint32_t)(x) << OTP_INT_FLAG_WRITE_SHIFT) & OTP_INT_FLAG_WRITE_MASK) 208 #define OTP_INT_FLAG_WRITE_GET(x) (((uint32_t)(x) & OTP_INT_FLAG_WRITE_MASK) >> OTP_INT_FLAG_WRITE_SHIFT) 209 210 /* 211 * READ (RW) 212 * 213 * fuse read flag, write 1 to clear 214 * 0: fuse is not read or reading 215 * 1: fuse value is put in DATA register 216 */ 217 #define OTP_INT_FLAG_READ_MASK (0x2U) 218 #define OTP_INT_FLAG_READ_SHIFT (1U) 219 #define OTP_INT_FLAG_READ_SET(x) (((uint32_t)(x) << OTP_INT_FLAG_READ_SHIFT) & OTP_INT_FLAG_READ_MASK) 220 #define OTP_INT_FLAG_READ_GET(x) (((uint32_t)(x) & OTP_INT_FLAG_READ_MASK) >> OTP_INT_FLAG_READ_SHIFT) 221 222 /* 223 * LOAD (RW) 224 * 225 * fuse load flag, write 1 to clear 226 * 0: fuse is not loaded or loading 227 * 1: fuse loaded 228 */ 229 #define OTP_INT_FLAG_LOAD_MASK (0x1U) 230 #define OTP_INT_FLAG_LOAD_SHIFT (0U) 231 #define OTP_INT_FLAG_LOAD_SET(x) (((uint32_t)(x) << OTP_INT_FLAG_LOAD_SHIFT) & OTP_INT_FLAG_LOAD_MASK) 232 #define OTP_INT_FLAG_LOAD_GET(x) (((uint32_t)(x) & OTP_INT_FLAG_LOAD_MASK) >> OTP_INT_FLAG_LOAD_SHIFT) 233 234 /* Bitfield definition for register: INT_EN */ 235 /* 236 * WRITE (RW) 237 * 238 * fuse write interrupt enable 239 * 0: fuse write interrupt is not enable 240 * 1: fuse write interrupt is enable 241 */ 242 #define OTP_INT_EN_WRITE_MASK (0x4U) 243 #define OTP_INT_EN_WRITE_SHIFT (2U) 244 #define OTP_INT_EN_WRITE_SET(x) (((uint32_t)(x) << OTP_INT_EN_WRITE_SHIFT) & OTP_INT_EN_WRITE_MASK) 245 #define OTP_INT_EN_WRITE_GET(x) (((uint32_t)(x) & OTP_INT_EN_WRITE_MASK) >> OTP_INT_EN_WRITE_SHIFT) 246 247 /* 248 * READ (RW) 249 * 250 * fuse read interrupt enable 251 * 0: fuse read interrupt is not enable 252 * 1: fuse read interrupt is enable 253 */ 254 #define OTP_INT_EN_READ_MASK (0x2U) 255 #define OTP_INT_EN_READ_SHIFT (1U) 256 #define OTP_INT_EN_READ_SET(x) (((uint32_t)(x) << OTP_INT_EN_READ_SHIFT) & OTP_INT_EN_READ_MASK) 257 #define OTP_INT_EN_READ_GET(x) (((uint32_t)(x) & OTP_INT_EN_READ_MASK) >> OTP_INT_EN_READ_SHIFT) 258 259 /* 260 * LOAD (RW) 261 * 262 * fuse load interrupt enable 263 * 0: fuse load interrupt is not enable 264 * 1: fuse load interrupt is enable 265 */ 266 #define OTP_INT_EN_LOAD_MASK (0x1U) 267 #define OTP_INT_EN_LOAD_SHIFT (0U) 268 #define OTP_INT_EN_LOAD_SET(x) (((uint32_t)(x) << OTP_INT_EN_LOAD_SHIFT) & OTP_INT_EN_LOAD_MASK) 269 #define OTP_INT_EN_LOAD_GET(x) (((uint32_t)(x) & OTP_INT_EN_LOAD_MASK) >> OTP_INT_EN_LOAD_SHIFT) 270 271 272 273 /* SHADOW register group index macro definition */ 274 #define OTP_SHADOW_SHADOW000 (0UL) 275 #define OTP_SHADOW_SHADOW001 (1UL) 276 #define OTP_SHADOW_SHADOW002 (2UL) 277 #define OTP_SHADOW_SHADOW003 (3UL) 278 #define OTP_SHADOW_SHADOW004 (4UL) 279 #define OTP_SHADOW_SHADOW005 (5UL) 280 #define OTP_SHADOW_SHADOW006 (6UL) 281 #define OTP_SHADOW_SHADOW007 (7UL) 282 #define OTP_SHADOW_SHADOW008 (8UL) 283 #define OTP_SHADOW_SHADOW009 (9UL) 284 #define OTP_SHADOW_SHADOW010 (10UL) 285 #define OTP_SHADOW_SHADOW011 (11UL) 286 #define OTP_SHADOW_SHADOW012 (12UL) 287 #define OTP_SHADOW_SHADOW013 (13UL) 288 #define OTP_SHADOW_SHADOW014 (14UL) 289 #define OTP_SHADOW_SHADOW015 (15UL) 290 #define OTP_SHADOW_SHADOW016 (16UL) 291 #define OTP_SHADOW_SHADOW017 (17UL) 292 #define OTP_SHADOW_SHADOW018 (18UL) 293 #define OTP_SHADOW_SHADOW019 (19UL) 294 #define OTP_SHADOW_SHADOW020 (20UL) 295 #define OTP_SHADOW_SHADOW021 (21UL) 296 #define OTP_SHADOW_SHADOW022 (22UL) 297 #define OTP_SHADOW_SHADOW023 (23UL) 298 #define OTP_SHADOW_SHADOW024 (24UL) 299 #define OTP_SHADOW_SHADOW025 (25UL) 300 #define OTP_SHADOW_SHADOW026 (26UL) 301 #define OTP_SHADOW_SHADOW027 (27UL) 302 #define OTP_SHADOW_SHADOW028 (28UL) 303 #define OTP_SHADOW_SHADOW029 (29UL) 304 #define OTP_SHADOW_SHADOW030 (30UL) 305 #define OTP_SHADOW_SHADOW031 (31UL) 306 #define OTP_SHADOW_SHADOW032 (32UL) 307 #define OTP_SHADOW_SHADOW033 (33UL) 308 #define OTP_SHADOW_SHADOW034 (34UL) 309 #define OTP_SHADOW_SHADOW035 (35UL) 310 #define OTP_SHADOW_SHADOW036 (36UL) 311 #define OTP_SHADOW_SHADOW037 (37UL) 312 #define OTP_SHADOW_SHADOW038 (38UL) 313 #define OTP_SHADOW_SHADOW039 (39UL) 314 #define OTP_SHADOW_SHADOW040 (40UL) 315 #define OTP_SHADOW_SHADOW041 (41UL) 316 #define OTP_SHADOW_SHADOW042 (42UL) 317 #define OTP_SHADOW_SHADOW043 (43UL) 318 #define OTP_SHADOW_SHADOW044 (44UL) 319 #define OTP_SHADOW_SHADOW045 (45UL) 320 #define OTP_SHADOW_SHADOW046 (46UL) 321 #define OTP_SHADOW_SHADOW047 (47UL) 322 #define OTP_SHADOW_SHADOW048 (48UL) 323 #define OTP_SHADOW_SHADOW049 (49UL) 324 #define OTP_SHADOW_SHADOW050 (50UL) 325 #define OTP_SHADOW_SHADOW051 (51UL) 326 #define OTP_SHADOW_SHADOW052 (52UL) 327 #define OTP_SHADOW_SHADOW053 (53UL) 328 #define OTP_SHADOW_SHADOW054 (54UL) 329 #define OTP_SHADOW_SHADOW055 (55UL) 330 #define OTP_SHADOW_SHADOW056 (56UL) 331 #define OTP_SHADOW_SHADOW057 (57UL) 332 #define OTP_SHADOW_SHADOW058 (58UL) 333 #define OTP_SHADOW_SHADOW059 (59UL) 334 #define OTP_SHADOW_SHADOW060 (60UL) 335 #define OTP_SHADOW_SHADOW061 (61UL) 336 #define OTP_SHADOW_SHADOW062 (62UL) 337 #define OTP_SHADOW_SHADOW063 (63UL) 338 #define OTP_SHADOW_SHADOW064 (64UL) 339 #define OTP_SHADOW_SHADOW065 (65UL) 340 #define OTP_SHADOW_SHADOW066 (66UL) 341 #define OTP_SHADOW_SHADOW067 (67UL) 342 #define OTP_SHADOW_SHADOW068 (68UL) 343 #define OTP_SHADOW_SHADOW069 (69UL) 344 #define OTP_SHADOW_SHADOW070 (70UL) 345 #define OTP_SHADOW_SHADOW071 (71UL) 346 #define OTP_SHADOW_SHADOW072 (72UL) 347 #define OTP_SHADOW_SHADOW073 (73UL) 348 #define OTP_SHADOW_SHADOW074 (74UL) 349 #define OTP_SHADOW_SHADOW075 (75UL) 350 #define OTP_SHADOW_SHADOW076 (76UL) 351 #define OTP_SHADOW_SHADOW077 (77UL) 352 #define OTP_SHADOW_SHADOW078 (78UL) 353 #define OTP_SHADOW_SHADOW079 (79UL) 354 #define OTP_SHADOW_SHADOW080 (80UL) 355 #define OTP_SHADOW_SHADOW081 (81UL) 356 #define OTP_SHADOW_SHADOW082 (82UL) 357 #define OTP_SHADOW_SHADOW083 (83UL) 358 #define OTP_SHADOW_SHADOW084 (84UL) 359 #define OTP_SHADOW_SHADOW085 (85UL) 360 #define OTP_SHADOW_SHADOW086 (86UL) 361 #define OTP_SHADOW_SHADOW087 (87UL) 362 #define OTP_SHADOW_SHADOW088 (88UL) 363 #define OTP_SHADOW_SHADOW089 (89UL) 364 #define OTP_SHADOW_SHADOW090 (90UL) 365 #define OTP_SHADOW_SHADOW091 (91UL) 366 #define OTP_SHADOW_SHADOW092 (92UL) 367 #define OTP_SHADOW_SHADOW093 (93UL) 368 #define OTP_SHADOW_SHADOW094 (94UL) 369 #define OTP_SHADOW_SHADOW095 (95UL) 370 #define OTP_SHADOW_SHADOW096 (96UL) 371 #define OTP_SHADOW_SHADOW097 (97UL) 372 #define OTP_SHADOW_SHADOW098 (98UL) 373 #define OTP_SHADOW_SHADOW099 (99UL) 374 #define OTP_SHADOW_SHADOW100 (100UL) 375 #define OTP_SHADOW_SHADOW101 (101UL) 376 #define OTP_SHADOW_SHADOW102 (102UL) 377 #define OTP_SHADOW_SHADOW103 (103UL) 378 #define OTP_SHADOW_SHADOW104 (104UL) 379 #define OTP_SHADOW_SHADOW105 (105UL) 380 #define OTP_SHADOW_SHADOW106 (106UL) 381 #define OTP_SHADOW_SHADOW107 (107UL) 382 #define OTP_SHADOW_SHADOW108 (108UL) 383 #define OTP_SHADOW_SHADOW109 (109UL) 384 #define OTP_SHADOW_SHADOW110 (110UL) 385 #define OTP_SHADOW_SHADOW111 (111UL) 386 #define OTP_SHADOW_SHADOW112 (112UL) 387 #define OTP_SHADOW_SHADOW113 (113UL) 388 #define OTP_SHADOW_SHADOW114 (114UL) 389 #define OTP_SHADOW_SHADOW115 (115UL) 390 #define OTP_SHADOW_SHADOW116 (116UL) 391 #define OTP_SHADOW_SHADOW117 (117UL) 392 #define OTP_SHADOW_SHADOW118 (118UL) 393 #define OTP_SHADOW_SHADOW119 (119UL) 394 #define OTP_SHADOW_SHADOW120 (120UL) 395 #define OTP_SHADOW_SHADOW121 (121UL) 396 #define OTP_SHADOW_SHADOW122 (122UL) 397 #define OTP_SHADOW_SHADOW123 (123UL) 398 #define OTP_SHADOW_SHADOW124 (124UL) 399 #define OTP_SHADOW_SHADOW125 (125UL) 400 #define OTP_SHADOW_SHADOW126 (126UL) 401 #define OTP_SHADOW_SHADOW127 (127UL) 402 403 /* SHADOW_LOCK register group index macro definition */ 404 #define OTP_SHADOW_LOCK_LOCK00 (0UL) 405 #define OTP_SHADOW_LOCK_LOCK01 (1UL) 406 #define OTP_SHADOW_LOCK_LOCK02 (2UL) 407 #define OTP_SHADOW_LOCK_LOCK03 (3UL) 408 #define OTP_SHADOW_LOCK_LOCK04 (4UL) 409 #define OTP_SHADOW_LOCK_LOCK05 (5UL) 410 #define OTP_SHADOW_LOCK_LOCK06 (6UL) 411 #define OTP_SHADOW_LOCK_LOCK07 (7UL) 412 413 /* FUSE register group index macro definition */ 414 #define OTP_FUSE_FUSE000 (0UL) 415 #define OTP_FUSE_FUSE001 (1UL) 416 #define OTP_FUSE_FUSE002 (2UL) 417 #define OTP_FUSE_FUSE003 (3UL) 418 #define OTP_FUSE_FUSE004 (4UL) 419 #define OTP_FUSE_FUSE005 (5UL) 420 #define OTP_FUSE_FUSE006 (6UL) 421 #define OTP_FUSE_FUSE007 (7UL) 422 #define OTP_FUSE_FUSE008 (8UL) 423 #define OTP_FUSE_FUSE009 (9UL) 424 #define OTP_FUSE_FUSE010 (10UL) 425 #define OTP_FUSE_FUSE011 (11UL) 426 #define OTP_FUSE_FUSE012 (12UL) 427 #define OTP_FUSE_FUSE013 (13UL) 428 #define OTP_FUSE_FUSE014 (14UL) 429 #define OTP_FUSE_FUSE015 (15UL) 430 #define OTP_FUSE_FUSE016 (16UL) 431 #define OTP_FUSE_FUSE017 (17UL) 432 #define OTP_FUSE_FUSE018 (18UL) 433 #define OTP_FUSE_FUSE019 (19UL) 434 #define OTP_FUSE_FUSE020 (20UL) 435 #define OTP_FUSE_FUSE021 (21UL) 436 #define OTP_FUSE_FUSE022 (22UL) 437 #define OTP_FUSE_FUSE023 (23UL) 438 #define OTP_FUSE_FUSE024 (24UL) 439 #define OTP_FUSE_FUSE025 (25UL) 440 #define OTP_FUSE_FUSE026 (26UL) 441 #define OTP_FUSE_FUSE027 (27UL) 442 #define OTP_FUSE_FUSE028 (28UL) 443 #define OTP_FUSE_FUSE029 (29UL) 444 #define OTP_FUSE_FUSE030 (30UL) 445 #define OTP_FUSE_FUSE031 (31UL) 446 #define OTP_FUSE_FUSE032 (32UL) 447 #define OTP_FUSE_FUSE033 (33UL) 448 #define OTP_FUSE_FUSE034 (34UL) 449 #define OTP_FUSE_FUSE035 (35UL) 450 #define OTP_FUSE_FUSE036 (36UL) 451 #define OTP_FUSE_FUSE037 (37UL) 452 #define OTP_FUSE_FUSE038 (38UL) 453 #define OTP_FUSE_FUSE039 (39UL) 454 #define OTP_FUSE_FUSE040 (40UL) 455 #define OTP_FUSE_FUSE041 (41UL) 456 #define OTP_FUSE_FUSE042 (42UL) 457 #define OTP_FUSE_FUSE043 (43UL) 458 #define OTP_FUSE_FUSE044 (44UL) 459 #define OTP_FUSE_FUSE045 (45UL) 460 #define OTP_FUSE_FUSE046 (46UL) 461 #define OTP_FUSE_FUSE047 (47UL) 462 #define OTP_FUSE_FUSE048 (48UL) 463 #define OTP_FUSE_FUSE049 (49UL) 464 #define OTP_FUSE_FUSE050 (50UL) 465 #define OTP_FUSE_FUSE051 (51UL) 466 #define OTP_FUSE_FUSE052 (52UL) 467 #define OTP_FUSE_FUSE053 (53UL) 468 #define OTP_FUSE_FUSE054 (54UL) 469 #define OTP_FUSE_FUSE055 (55UL) 470 #define OTP_FUSE_FUSE056 (56UL) 471 #define OTP_FUSE_FUSE057 (57UL) 472 #define OTP_FUSE_FUSE058 (58UL) 473 #define OTP_FUSE_FUSE059 (59UL) 474 #define OTP_FUSE_FUSE060 (60UL) 475 #define OTP_FUSE_FUSE061 (61UL) 476 #define OTP_FUSE_FUSE062 (62UL) 477 #define OTP_FUSE_FUSE063 (63UL) 478 #define OTP_FUSE_FUSE064 (64UL) 479 #define OTP_FUSE_FUSE065 (65UL) 480 #define OTP_FUSE_FUSE066 (66UL) 481 #define OTP_FUSE_FUSE067 (67UL) 482 #define OTP_FUSE_FUSE068 (68UL) 483 #define OTP_FUSE_FUSE069 (69UL) 484 #define OTP_FUSE_FUSE070 (70UL) 485 #define OTP_FUSE_FUSE071 (71UL) 486 #define OTP_FUSE_FUSE072 (72UL) 487 #define OTP_FUSE_FUSE073 (73UL) 488 #define OTP_FUSE_FUSE074 (74UL) 489 #define OTP_FUSE_FUSE075 (75UL) 490 #define OTP_FUSE_FUSE076 (76UL) 491 #define OTP_FUSE_FUSE077 (77UL) 492 #define OTP_FUSE_FUSE078 (78UL) 493 #define OTP_FUSE_FUSE079 (79UL) 494 #define OTP_FUSE_FUSE080 (80UL) 495 #define OTP_FUSE_FUSE081 (81UL) 496 #define OTP_FUSE_FUSE082 (82UL) 497 #define OTP_FUSE_FUSE083 (83UL) 498 #define OTP_FUSE_FUSE084 (84UL) 499 #define OTP_FUSE_FUSE085 (85UL) 500 #define OTP_FUSE_FUSE086 (86UL) 501 #define OTP_FUSE_FUSE087 (87UL) 502 #define OTP_FUSE_FUSE088 (88UL) 503 #define OTP_FUSE_FUSE089 (89UL) 504 #define OTP_FUSE_FUSE090 (90UL) 505 #define OTP_FUSE_FUSE091 (91UL) 506 #define OTP_FUSE_FUSE092 (92UL) 507 #define OTP_FUSE_FUSE093 (93UL) 508 #define OTP_FUSE_FUSE094 (94UL) 509 #define OTP_FUSE_FUSE095 (95UL) 510 #define OTP_FUSE_FUSE096 (96UL) 511 #define OTP_FUSE_FUSE097 (97UL) 512 #define OTP_FUSE_FUSE098 (98UL) 513 #define OTP_FUSE_FUSE099 (99UL) 514 #define OTP_FUSE_FUSE100 (100UL) 515 #define OTP_FUSE_FUSE101 (101UL) 516 #define OTP_FUSE_FUSE102 (102UL) 517 #define OTP_FUSE_FUSE103 (103UL) 518 #define OTP_FUSE_FUSE104 (104UL) 519 #define OTP_FUSE_FUSE105 (105UL) 520 #define OTP_FUSE_FUSE106 (106UL) 521 #define OTP_FUSE_FUSE107 (107UL) 522 #define OTP_FUSE_FUSE108 (108UL) 523 #define OTP_FUSE_FUSE109 (109UL) 524 #define OTP_FUSE_FUSE110 (110UL) 525 #define OTP_FUSE_FUSE111 (111UL) 526 #define OTP_FUSE_FUSE112 (112UL) 527 #define OTP_FUSE_FUSE113 (113UL) 528 #define OTP_FUSE_FUSE114 (114UL) 529 #define OTP_FUSE_FUSE115 (115UL) 530 #define OTP_FUSE_FUSE116 (116UL) 531 #define OTP_FUSE_FUSE117 (117UL) 532 #define OTP_FUSE_FUSE118 (118UL) 533 #define OTP_FUSE_FUSE119 (119UL) 534 #define OTP_FUSE_FUSE120 (120UL) 535 #define OTP_FUSE_FUSE121 (121UL) 536 #define OTP_FUSE_FUSE122 (122UL) 537 #define OTP_FUSE_FUSE123 (123UL) 538 #define OTP_FUSE_FUSE124 (124UL) 539 #define OTP_FUSE_FUSE125 (125UL) 540 #define OTP_FUSE_FUSE126 (126UL) 541 #define OTP_FUSE_FUSE127 (127UL) 542 543 /* FUSE_LOCK register group index macro definition */ 544 #define OTP_FUSE_LOCK_LOCK00 (0UL) 545 #define OTP_FUSE_LOCK_LOCK01 (1UL) 546 #define OTP_FUSE_LOCK_LOCK02 (2UL) 547 #define OTP_FUSE_LOCK_LOCK03 (3UL) 548 #define OTP_FUSE_LOCK_LOCK04 (4UL) 549 #define OTP_FUSE_LOCK_LOCK05 (5UL) 550 #define OTP_FUSE_LOCK_LOCK06 (6UL) 551 #define OTP_FUSE_LOCK_LOCK07 (7UL) 552 553 /* REGION register group index macro definition */ 554 #define OTP_REGION_LOAD_REGION0 (0UL) 555 #define OTP_REGION_LOAD_REGION1 (1UL) 556 #define OTP_REGION_LOAD_REGION2 (2UL) 557 #define OTP_REGION_LOAD_REGION3 (3UL) 558 559 560 #endif /* HPM_OTP_H */ 561