1 /* 2 * Copyright (c) 2021-2024 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 9 #ifndef HPM_DMAMUX_SRC_H 10 #define HPM_DMAMUX_SRC_H 11 12 /* dma mux definitions */ 13 #define HPM_DMA_SRC_SPI0_RX (0x0UL) 14 #define HPM_DMA_SRC_SPI0_TX (0x1UL) 15 #define HPM_DMA_SRC_SPI1_RX (0x2UL) 16 #define HPM_DMA_SRC_SPI1_TX (0x3UL) 17 #define HPM_DMA_SRC_SPI2_RX (0x4UL) 18 #define HPM_DMA_SRC_SPI2_TX (0x5UL) 19 #define HPM_DMA_SRC_SPI3_RX (0x6UL) 20 #define HPM_DMA_SRC_SPI3_TX (0x7UL) 21 #define HPM_DMA_SRC_UART0_RX (0x8UL) 22 #define HPM_DMA_SRC_UART0_TX (0x9UL) 23 #define HPM_DMA_SRC_UART1_RX (0xAUL) 24 #define HPM_DMA_SRC_UART1_TX (0xBUL) 25 #define HPM_DMA_SRC_UART2_RX (0xCUL) 26 #define HPM_DMA_SRC_UART2_TX (0xDUL) 27 #define HPM_DMA_SRC_UART3_RX (0xEUL) 28 #define HPM_DMA_SRC_UART3_TX (0xFUL) 29 #define HPM_DMA_SRC_UART4_RX (0x10UL) 30 #define HPM_DMA_SRC_UART4_TX (0x11UL) 31 #define HPM_DMA_SRC_UART5_RX (0x12UL) 32 #define HPM_DMA_SRC_UART5_TX (0x13UL) 33 #define HPM_DMA_SRC_UART6_RX (0x14UL) 34 #define HPM_DMA_SRC_UART6_TX (0x15UL) 35 #define HPM_DMA_SRC_UART7_RX (0x16UL) 36 #define HPM_DMA_SRC_UART7_TX (0x17UL) 37 #define HPM_DMA_SRC_I2S0_RX (0x18UL) 38 #define HPM_DMA_SRC_I2S0_TX (0x19UL) 39 #define HPM_DMA_SRC_I2S1_RX (0x1AUL) 40 #define HPM_DMA_SRC_I2S1_TX (0x1BUL) 41 #define HPM_DMA_SRC_MOT0_0 (0x1CUL) 42 #define HPM_DMA_SRC_MOT0_1 (0x1DUL) 43 #define HPM_DMA_SRC_MOT0_2 (0x1EUL) 44 #define HPM_DMA_SRC_MOT0_3 (0x1FUL) 45 #define HPM_DMA_SRC_MOT1_0 (0x20UL) 46 #define HPM_DMA_SRC_MOT1_1 (0x21UL) 47 #define HPM_DMA_SRC_MOT1_2 (0x22UL) 48 #define HPM_DMA_SRC_MOT1_3 (0x23UL) 49 #define HPM_DMA_SRC_NTMR0_0 (0x24UL) 50 #define HPM_DMA_SRC_NTMR0_1 (0x25UL) 51 #define HPM_DMA_SRC_NTMR0_2 (0x26UL) 52 #define HPM_DMA_SRC_NTMR0_3 (0x27UL) 53 #define HPM_DMA_SRC_GPTMR0_0 (0x28UL) 54 #define HPM_DMA_SRC_GPTMR0_1 (0x29UL) 55 #define HPM_DMA_SRC_GPTMR0_2 (0x2AUL) 56 #define HPM_DMA_SRC_GPTMR0_3 (0x2BUL) 57 #define HPM_DMA_SRC_GPTMR1_0 (0x2CUL) 58 #define HPM_DMA_SRC_GPTMR1_1 (0x2DUL) 59 #define HPM_DMA_SRC_GPTMR1_2 (0x2EUL) 60 #define HPM_DMA_SRC_GPTMR1_3 (0x2FUL) 61 #define HPM_DMA_SRC_GPTMR2_0 (0x30UL) 62 #define HPM_DMA_SRC_GPTMR2_1 (0x31UL) 63 #define HPM_DMA_SRC_GPTMR2_2 (0x32UL) 64 #define HPM_DMA_SRC_GPTMR2_3 (0x33UL) 65 #define HPM_DMA_SRC_GPTMR3_0 (0x34UL) 66 #define HPM_DMA_SRC_GPTMR3_1 (0x35UL) 67 #define HPM_DMA_SRC_GPTMR3_2 (0x36UL) 68 #define HPM_DMA_SRC_GPTMR3_3 (0x37UL) 69 #define HPM_DMA_SRC_I2C0 (0x38UL) 70 #define HPM_DMA_SRC_I2C1 (0x39UL) 71 #define HPM_DMA_SRC_I2C2 (0x3AUL) 72 #define HPM_DMA_SRC_I2C3 (0x3BUL) 73 #define HPM_DMA_SRC_XPI0_RX (0x3CUL) 74 #define HPM_DMA_SRC_XPI0_TX (0x3DUL) 75 #define HPM_DMA_SRC_XPI1_RX (0x3EUL) 76 #define HPM_DMA_SRC_XPI1_TX (0x3FUL) 77 #define HPM_DMA_SRC_DAC (0x40UL) 78 #define HPM_DMA_SRC_ACMP_0 (0x41UL) 79 #define HPM_DMA_SRC_ACMP_1 (0x42UL) 80 81 82 83 #endif /* HPM_DMAMUX_SRC_H */ 84