1/* 2 * Copyright (c) 2022-2023 HPMicro 3 * SPDX-License-Identifier: BSD-3-Clause 4 */ 5 6ENTRY(_start) 7 8STACK_SIZE = _stack_size; 9HEAP_SIZE = _heap_size; 10 11MEMORY 12{ 13 XPI0 (rx) : ORIGIN = 0x80003000, LENGTH = _flash_size - 0x3000 14 ILM (wx) : ORIGIN = 0x00000000, LENGTH = 128K 15 DLM (w) : ORIGIN = 0x00080000, LENGTH = 128K 16 AXI_SRAM (wx) : ORIGIN = 0x01080000, LENGTH = 256K 17 AXI_SRAM_NONCACHEABLE (wx) : ORIGIN = 0x010C0000, LENGTH = 256K 18 AHB_SRAM (w) : ORIGIN = 0xF0300000, LENGTH = 32k 19} 20 21SECTIONS 22{ 23 .start : { 24 . = ALIGN(8); 25 KEEP(*(.start)) 26 } > XPI0 27 28 __vector_load_addr__ = ADDR(.start) + SIZEOF(.start); 29 .vectors ORIGIN(ILM) : AT(__vector_load_addr__) { 30 . = ALIGN(8); 31 __vector_ram_start__ = .; 32 KEEP(*(.vector_table)) 33 KEEP(*(.isr_vector)) 34 KEEP(*(.vector_s_table)) 35 KEEP(*(.isr_s_vector)) 36 . = ALIGN(8); 37 __vector_ram_end__ = .; 38 } > ILM 39 40 .text (__vector_load_addr__ + SIZEOF(.vectors)) : { 41 . = ALIGN(8); 42 *(.text) 43 *(.text*) 44 *(.rodata) 45 *(.rodata*) 46 *(.srodata) 47 *(.srodata*) 48 49 *(.hash) 50 *(.dyn*) 51 *(.gnu*) 52 *(.pl*) 53 54 KEEP (*(.init)) 55 KEEP (*(.fini)) 56 57 /* section information for usbh class */ 58 . = ALIGN(8); 59 __usbh_class_info_start__ = .; 60 KEEP(*(.usbh_class_info)) 61 __usbh_class_info_end__ = .; 62 63 /* RT-Thread related sections - Start */ 64 /* section information for finsh shell */ 65 . = ALIGN(4); 66 __fsymtab_start = .; 67 KEEP(*(FSymTab)) 68 __fsymtab_end = .; 69 . = ALIGN(4); 70 __vsymtab_start = .; 71 KEEP(*(VSymTab)) 72 __vsymtab_end = .; 73 . = ALIGN(4); 74 75 . = ALIGN(4); 76 __rt_init_start = .; 77 KEEP(*(SORT(.rti_fn*))) 78 __rt_init_end = .; 79 . = ALIGN(4); 80 81 /* section information for modules */ 82 . = ALIGN(4); 83 __rtmsymtab_start = .; 84 KEEP(*(RTMSymTab)) 85 __rtmsymtab_end = .; 86 87 /* RT-Thread related sections - end */ 88 . = ALIGN(8); 89 } > XPI0 90 91 .eh_frame : 92 { 93 __eh_frame_start = .; 94 KEEP(*(.eh_frame)) 95 __eh_frame_end = .; 96 } > XPI0 97 98 .eh_frame_hdr : 99 { 100 KEEP(*(.eh_frame_hdr)) 101 } > XPI0 102 __eh_frame_hdr_start = SIZEOF(.eh_frame_hdr) > 0 ? ADDR(.eh_frame_hdr) : 0; 103 __eh_frame_hdr_end = SIZEOF(.eh_frame_hdr) > 0 ? . : 0; 104 105 .rel : { 106 KEEP(*(.rel*)) 107 } > XPI0 108 109 PROVIDE (__etext = .); 110 PROVIDE (_etext = .); 111 PROVIDE (etext = .); 112 113 __data_load_addr__ = etext; 114 .data : AT(__data_load_addr__) { 115 . = ALIGN(8); 116 __data_start__ = .; 117 __global_pointer$ = . + 0x800; 118 *(.data) 119 *(.data*) 120 *(.sdata) 121 *(.sdata*) 122 123 KEEP(*(.jcr)) 124 KEEP(*(.dynamic)) 125 KEEP(*(.got*)) 126 KEEP(*(.got)) 127 KEEP(*(.gcc_except_table)) 128 KEEP(*(.gcc_except_table.*)) 129 130 . = ALIGN(8); 131 PROVIDE(__preinit_array_start = .); 132 KEEP(*(.preinit_array)) 133 PROVIDE(__preinit_array_end = .); 134 135 . = ALIGN(8); 136 PROVIDE(__init_array_start = .); 137 KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*))) 138 KEEP(*(.init_array)) 139 PROVIDE(__init_array_end = .); 140 141 . = ALIGN(8); 142 PROVIDE(__finit_array_start = .); 143 KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*))) 144 KEEP(*(.finit_array)) 145 PROVIDE(__finit_array_end = .); 146 147 . = ALIGN(8); 148 KEEP(*crtbegin*.o(.ctors)) 149 KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors)) 150 KEEP(*(SORT(.ctors.*))) 151 KEEP(*(.ctors)) 152 153 . = ALIGN(8); 154 KEEP(*crtbegin*.o(.dtors)) 155 KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors)) 156 KEEP(*(SORT(.dtors.*))) 157 KEEP(*(.dtors)) 158 . = ALIGN(8); 159 __data_end__ = .; 160 PROVIDE (__edata = .); 161 PROVIDE (_edata = .); 162 PROVIDE (edata = .); 163 } > AXI_SRAM 164 165 __fast_load_addr__ = etext + SIZEOF(.data); 166 .fast : AT(__fast_load_addr__) { 167 . = ALIGN(8); 168 PROVIDE(__ramfunc_start__ = .); 169 *(.fast) 170 *(.fast.*) 171 . = ALIGN(8); 172 PROVIDE(__ramfunc_end__ = .); 173 } > ILM 174 175 __tdata_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast); 176 .tdata : AT(__tdata_load_addr__) { 177 . = ALIGN(8); 178 PROVIDE(__tdata_start__ = .); 179 *(.tdata) 180 *(.tdata.*) 181 *(.gnu.linkonce.td.*) 182 . = ALIGN(8); 183 PROVIDE(__tdata_end__ = .); 184 } > AXI_SRAM 185 186 .tbss (NOLOAD) : { 187 . = ALIGN(8); 188 PROVIDE(__tbss_start__ = .); 189 __thread_pointer$ = .; 190 *(.tbss) 191 *(.tbss.*) 192 *(.gnu.linkonce.tb.*) 193 *(.tcommon) 194 . = ALIGN(8); 195 PROVIDE(__tbss_end__ = .); 196 } > AXI_SRAM 197 198 __noncacheable_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata); 199 .noncacheable.init : AT(__noncacheable_init_load_addr__) { 200 . = ALIGN(8); 201 __noncacheable_init_start__ = .; 202 KEEP(*(.noncacheable.init)) 203 __noncacheable_init_end__ = .; 204 . = ALIGN(8); 205 } > AXI_SRAM_NONCACHEABLE 206 207 __fast_ram_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init); 208 .fast_ram.init : AT(__fast_ram_init_load_addr__) { 209 . = ALIGN(8); 210 __fast_ram_init_start__ = .; 211 KEEP(*(.fast_ram.init)) 212 __fast_ram_init_end__ = .; 213 . = ALIGN(8); 214 } > DLM 215 216 .bss (NOLOAD) : { 217 . = ALIGN(8); 218 __bss_start__ = .; 219 *(.bss) 220 *(.bss*) 221 *(.sbss*) 222 *(.scommon) 223 *(.scommon*) 224 *(.dynsbss*) 225 *(COMMON) 226 . = ALIGN(8); 227 _end = .; 228 __bss_end__ = .; 229 } > AXI_SRAM 230 231 .framebuffer (NOLOAD) : { 232 . = ALIGN(8); 233 KEEP(*(.framebuffer)) 234 . = ALIGN(8); 235 } > AXI_SRAM 236 237 .noncacheable.bss (NOLOAD) : { 238 . = ALIGN(8); 239 KEEP(*(.noncacheable)) 240 __noncacheable_bss_start__ = .; 241 KEEP(*(.noncacheable.bss)) 242 __noncacheable_bss_end__ = .; 243 . = ALIGN(8); 244 } > AXI_SRAM_NONCACHEABLE 245 246 .ahb_sram (NOLOAD) : { 247 KEEP(*(.ahb_sram)) 248 } > AHB_SRAM 249 250 .fast_ram.bss (NOLOAD) : { 251 . = ALIGN(8); 252 KEEP(*(.fast_ram)) 253 __fast_ram_bss_start__ = .; 254 KEEP(*(.fast_ram.bss)) 255 __fast_ram_bss_end__ = .; 256 . = ALIGN(8); 257 } > DLM 258 259 .heap (NOLOAD) : { 260 . = ALIGN(8); 261 __heap_start__ = .; 262 . += HEAP_SIZE; 263 __heap_end__ = .; 264 } > DLM 265 266 .stack (NOLOAD) : { 267 . = ALIGN(16); 268 __stack_base__ = .; 269 . += STACK_SIZE; 270 . = ALIGN(16); 271 PROVIDE (_stack = .); 272 PROVIDE (_stack_safe = .); 273 } > DLM 274 275 __noncacheable_start__ = ORIGIN(AXI_SRAM_NONCACHEABLE); 276 __noncacheable_end__ = ORIGIN(AXI_SRAM_NONCACHEABLE) + LENGTH(AXI_SRAM_NONCACHEABLE); 277 278 __fw_size__ = SIZEOF(.start) + SIZEOF(.vectors) + SIZEOF(.rel) + SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init) + SIZEOF(.fast_ram.init); 279 __last_addr__ = __fast_ram_init_load_addr__ + SIZEOF(.fast_ram.init); 280 ASSERT(((__fw_size__ <= LENGTH(XPI0)) && (__last_addr__ <= (ORIGIN(XPI0) + LENGTH(XPI0)))), "****** FAILED! XPI0 has not enough space! ******") 281} 282