1 /* 2 * Copyright (c) 2021-2024 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 #ifndef HPM_CLOCK_DRV_H 8 #define HPM_CLOCK_DRV_H 9 10 #include "hpm_common.h" 11 #include "hpm_sysctl_drv.h" 12 #include "hpm_csr_drv.h" 13 14 /** 15 * @brief CLOCK driver APIs 16 * @defgroup clock_interface CLOCK driver APIs 17 * @{ 18 * 19 */ 20 21 #define CLOCK_DIV_INVALID (~0UL) 22 23 /** 24 * @brief Error codes for clock driver 25 */ 26 enum { 27 status_clk_div_invalid = MAKE_STATUS(status_group_clk, 0), /**< Clock divider is invalid */ 28 status_clk_src_invalid = MAKE_STATUS(status_group_clk, 1), /**< Clock source is invalid */ 29 status_clk_invalid = MAKE_STATUS(status_group_clk, 2), /**< Clock name is invalid */ 30 status_clk_operation_unsupported = MAKE_STATUS(status_group_clk, 3), /**< Clock operation is unsupported */ 31 status_clk_shared_ahb = MAKE_STATUS(status_group_clk, 4), /**< The clock source is shared with AHB */ 32 status_clk_shared_axi0 = MAKE_STATUS(status_group_clk, 5), /**< The clock source is shared with AXI0 */ 33 status_clk_shared_axi1 = MAKE_STATUS(status_group_clk, 6), /**< THe clock source is shared with AXI1 */ 34 status_clk_shared_axi2 = MAKE_STATUS(status_group_clk, 7), /**< The clock source is shared with AXI2 */ 35 status_clk_shared_cpu0 = MAKE_STATUS(status_group_clk, 8), /**< The clock source is shared with CPU0 */ 36 status_clk_shared_cpu1 = MAKE_STATUS(status_group_clk, 9), /**< The clock source is shared with CPU1 */ 37 status_clk_fixed = MAKE_STATUS(status_group_clk, 10), /**< The clock source is a fixed clock source */ 38 39 }; 40 41 /** 42 * @brief Clock source group definitions 43 */ 44 #define CLK_SRC_GROUP_COMMON (0U) 45 #define CLK_SRC_GROUP_ADC (1U) 46 #define CLK_SRC_GROUP_I2S (2U) 47 #define CLK_SRC_GROUP_WDG (3U) 48 #define CLK_SRC_GROUP_PMIC (4U) 49 #define CLK_SRC_GROUP_AHB (5U) 50 #define CLK_SRC_GROUP_AXI0 (6U) 51 #define CLK_SRC_GROUP_AXI1 (7U) 52 #define CLK_SRC_GROUP_AXI2 (8U) 53 #define CLK_SRC_GROUP_CPU0 (9U) 54 #define CLK_SRC_GROUP_CPU1 (10U) 55 #define CLK_SRC_GROUP_SRC (11U) 56 #define CLK_SRC_GROUP_PWDG (12U) 57 #define CLK_SRC_GROUP_INVALID (15U) 58 59 #define MAKE_CLK_SRC(src_grp, index) (((uint8_t)(src_grp) << 4) | (index)) 60 #define GET_CLK_SRC_GROUP(src) (((uint8_t)(src) >> 4) & 0x0FU) 61 #define GET_CLK_SRC_INDEX(src) ((uint8_t)(src)&0x0FU) 62 63 #define GET_CLOCK_SOURCE_FROM_CLK_SRC(clk_src) (clock_source_t)((uint32_t)(clk_src) & 0xFU) 64 65 /** 66 * @brief Clock source definitions 67 */ 68 typedef enum _clock_sources { 69 clk_src_osc24m = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 0), 70 clk_src_pll0_clk0 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 1), 71 clk_src_pll1_clk0 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 2), 72 clk_src_pll1_clk1 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 3), 73 clk_src_pll2_clk0 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 4), 74 clk_src_pll2_clk1 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 5), 75 clk_src_pll3_clk0 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 6), 76 clk_src_pll4_clk0 = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 7), 77 clk_src_osc32k = MAKE_CLK_SRC(CLK_SRC_GROUP_COMMON, 8), 78 79 clk_adc_src_ahb0 = MAKE_CLK_SRC(CLK_SRC_GROUP_ADC, 0), 80 clk_adc_src_ana0 = MAKE_CLK_SRC(CLK_SRC_GROUP_ADC, 1), 81 clk_adc_src_ana1 = MAKE_CLK_SRC(CLK_SRC_GROUP_ADC, 2), 82 clk_adc_src_ana2 = MAKE_CLK_SRC(CLK_SRC_GROUP_ADC, 3), 83 84 clk_i2s_src_ahb0 = MAKE_CLK_SRC(CLK_SRC_GROUP_I2S, 0), 85 clk_i2s_src_aud0 = MAKE_CLK_SRC(CLK_SRC_GROUP_I2S, 1), 86 clk_i2s_src_aud1 = MAKE_CLK_SRC(CLK_SRC_GROUP_I2S, 2), 87 clk_i2s_src_aud2 = MAKE_CLK_SRC(CLK_SRC_GROUP_I2S, 3), 88 89 clk_wdg_src_ahb0 = MAKE_CLK_SRC(CLK_SRC_GROUP_WDG, 0), 90 clk_wdg_src_osc32k = MAKE_CLK_SRC(CLK_SRC_GROUP_WDG, 1), 91 92 clk_pwdg_src_osc24m = MAKE_CLK_SRC(CLK_SRC_GROUP_PWDG, 0), 93 clk_pwdg_src_osc32k = MAKE_CLK_SRC(CLK_SRC_GROUP_PWDG, 1), 94 95 clk_src_invalid = MAKE_CLK_SRC(CLK_SRC_GROUP_INVALID, 15), 96 } clk_src_t; 97 98 #define RESOURCE_INVALID (0xFFFFU) 99 100 /* Clock NAME related Macros */ 101 #define MAKE_CLOCK_NAME(resource, src_type, node) (((uint32_t)(resource) << 16) | ((uint32_t)(src_type) << 8) | ((uint32_t)node)) 102 #define GET_CLK_SRC_GROUP_FROM_NAME(name) (((uint32_t)(name) >> 8) & 0xFFUL) 103 #define GET_CLK_NODE_FROM_NAME(name) ((uint32_t)(name)&0xFFUL) 104 #define GET_CLK_RESOURCE_FROM_NAME(name) ((uint32_t)(name) >> 16) 105 106 /** 107 * @brief Peripheral Clock Type Description 108 */ 109 typedef enum _clock_name { 110 clock_cpu0 = MAKE_CLOCK_NAME(sysctl_resource_cpu0, CLK_SRC_GROUP_COMMON, clock_node_cpu0), 111 clock_cpu1 = MAKE_CLOCK_NAME(sysctl_resource_cpu1, CLK_SRC_GROUP_COMMON, clock_node_cpu1), 112 clock_mchtmr0 = MAKE_CLOCK_NAME(sysctl_resource_mchtmr0, CLK_SRC_GROUP_COMMON, clock_node_mchtmr0), 113 clock_mchtmr1 = MAKE_CLOCK_NAME(sysctl_resource_mchtmr1, CLK_SRC_GROUP_COMMON, clock_node_mchtmr1), 114 clock_axi0 = MAKE_CLOCK_NAME(sysctl_resource_axis, CLK_SRC_GROUP_COMMON, clock_node_axi0), 115 clock_axi1 = MAKE_CLOCK_NAME(sysctl_resource_axic, CLK_SRC_GROUP_COMMON, clock_node_axi1), 116 clock_axi2 = MAKE_CLOCK_NAME(sysctl_resource_axiv, CLK_SRC_GROUP_COMMON, clock_node_axi2), 117 clock_ahb = MAKE_CLOCK_NAME(sysctl_resource_ahbp, CLK_SRC_GROUP_COMMON, clock_node_ahb0), 118 clock_femc = MAKE_CLOCK_NAME(sysctl_resource_femc, CLK_SRC_GROUP_COMMON, clock_node_femc), 119 clock_xpi0 = MAKE_CLOCK_NAME(sysctl_resource_xpi0, CLK_SRC_GROUP_COMMON, clock_node_xpi0), 120 clock_xpi1 = MAKE_CLOCK_NAME(sysctl_resource_xpi1, CLK_SRC_GROUP_COMMON, clock_node_xpi1), 121 clock_gptmr0 = MAKE_CLOCK_NAME(sysctl_resource_gptmr0, CLK_SRC_GROUP_COMMON, clock_node_gptmr0), 122 clock_gptmr1 = MAKE_CLOCK_NAME(sysctl_resource_gptmr1, CLK_SRC_GROUP_COMMON, clock_node_gptmr1), 123 clock_gptmr2 = MAKE_CLOCK_NAME(sysctl_resource_gptmr2, CLK_SRC_GROUP_COMMON, clock_node_gptmr2), 124 clock_gptmr3 = MAKE_CLOCK_NAME(sysctl_resource_gptmr3, CLK_SRC_GROUP_COMMON, clock_node_gptmr3), 125 clock_gptmr4 = MAKE_CLOCK_NAME(sysctl_resource_gptmr4, CLK_SRC_GROUP_COMMON, clock_node_gptmr4), 126 clock_gptmr5 = MAKE_CLOCK_NAME(sysctl_resource_gptmr5, CLK_SRC_GROUP_COMMON, clock_node_gptmr5), 127 clock_gptmr6 = MAKE_CLOCK_NAME(sysctl_resource_gptmr6, CLK_SRC_GROUP_COMMON, clock_node_gptmr6), 128 clock_gptmr7 = MAKE_CLOCK_NAME(sysctl_resource_gptmr7, CLK_SRC_GROUP_COMMON, clock_node_gptmr7), 129 clock_uart0 = MAKE_CLOCK_NAME(sysctl_resource_uart0, CLK_SRC_GROUP_COMMON, clock_node_uart0), 130 clock_uart1 = MAKE_CLOCK_NAME(sysctl_resource_uart1, CLK_SRC_GROUP_COMMON, clock_node_uart1), 131 clock_uart2 = MAKE_CLOCK_NAME(sysctl_resource_uart2, CLK_SRC_GROUP_COMMON, clock_node_uart2), 132 clock_uart3 = MAKE_CLOCK_NAME(sysctl_resource_uart3, CLK_SRC_GROUP_COMMON, clock_node_uart3), 133 clock_uart4 = MAKE_CLOCK_NAME(sysctl_resource_uart4, CLK_SRC_GROUP_COMMON, clock_node_uart4), 134 clock_uart5 = MAKE_CLOCK_NAME(sysctl_resource_uart5, CLK_SRC_GROUP_COMMON, clock_node_uart5), 135 clock_uart6 = MAKE_CLOCK_NAME(sysctl_resource_uart6, CLK_SRC_GROUP_COMMON, clock_node_uart6), 136 clock_uart7 = MAKE_CLOCK_NAME(sysctl_resource_uart7, CLK_SRC_GROUP_COMMON, clock_node_uart7), 137 clock_uart8 = MAKE_CLOCK_NAME(sysctl_resource_uart8, CLK_SRC_GROUP_COMMON, clock_node_uart8), 138 clock_uart9 = MAKE_CLOCK_NAME(sysctl_resource_uart9, CLK_SRC_GROUP_COMMON, clock_node_uart9), 139 clock_uart10 = MAKE_CLOCK_NAME(sysctl_resource_uarta, CLK_SRC_GROUP_COMMON, clock_node_uarta), 140 clock_uart11 = MAKE_CLOCK_NAME(sysctl_resource_uartb, CLK_SRC_GROUP_COMMON, clock_node_uartb), 141 clock_uart12 = MAKE_CLOCK_NAME(sysctl_resource_uartc, CLK_SRC_GROUP_COMMON, clock_node_uartc), 142 clock_uart13 = MAKE_CLOCK_NAME(sysctl_resource_uartd, CLK_SRC_GROUP_COMMON, clock_node_uartd), 143 clock_uart14 = MAKE_CLOCK_NAME(sysctl_resource_uarte, CLK_SRC_GROUP_COMMON, clock_node_uarte), 144 clock_uart15 = MAKE_CLOCK_NAME(sysctl_resource_uartf, CLK_SRC_GROUP_COMMON, clock_node_uartf), 145 clock_i2c0 = MAKE_CLOCK_NAME(sysctl_resource_i2c0, CLK_SRC_GROUP_COMMON, clock_node_i2c0), 146 clock_i2c1 = MAKE_CLOCK_NAME(sysctl_resource_i2c1, CLK_SRC_GROUP_COMMON, clock_node_i2c1), 147 clock_i2c2 = MAKE_CLOCK_NAME(sysctl_resource_i2c2, CLK_SRC_GROUP_COMMON, clock_node_i2c2), 148 clock_i2c3 = MAKE_CLOCK_NAME(sysctl_resource_i2c3, CLK_SRC_GROUP_COMMON, clock_node_i2c3), 149 clock_spi0 = MAKE_CLOCK_NAME(sysctl_resource_spi0, CLK_SRC_GROUP_COMMON, clock_node_spi0), 150 clock_spi1 = MAKE_CLOCK_NAME(sysctl_resource_spi1, CLK_SRC_GROUP_COMMON, clock_node_spi1), 151 clock_spi2 = MAKE_CLOCK_NAME(sysctl_resource_spi2, CLK_SRC_GROUP_COMMON, clock_node_spi2), 152 clock_spi3 = MAKE_CLOCK_NAME(sysctl_resource_spi3, CLK_SRC_GROUP_COMMON, clock_node_spi3), 153 clock_can0 = MAKE_CLOCK_NAME(sysctl_resource_can0, CLK_SRC_GROUP_COMMON, clock_node_can0), 154 clock_can1 = MAKE_CLOCK_NAME(sysctl_resource_can1, CLK_SRC_GROUP_COMMON, clock_node_can1), 155 clock_can2 = MAKE_CLOCK_NAME(sysctl_resource_can2, CLK_SRC_GROUP_COMMON, clock_node_can2), 156 clock_can3 = MAKE_CLOCK_NAME(sysctl_resource_can3, CLK_SRC_GROUP_COMMON, clock_node_can3), 157 clock_display = MAKE_CLOCK_NAME(sysctl_resource_dis0, CLK_SRC_GROUP_COMMON, clock_node_dis0), 158 clock_sdxc0 = MAKE_CLOCK_NAME(sysctl_resource_sdxc0, CLK_SRC_GROUP_COMMON, clock_node_sdxc0), 159 clock_sdxc1 = MAKE_CLOCK_NAME(sysctl_resource_sdxc1, CLK_SRC_GROUP_COMMON, clock_node_sdxc1), 160 clock_camera0 = MAKE_CLOCK_NAME(sysctl_resource_cam0, CLK_SRC_GROUP_COMMON, clock_node_cam0), 161 clock_camera1 = MAKE_CLOCK_NAME(sysctl_resource_cam1, CLK_SRC_GROUP_COMMON, clock_node_cam1), 162 clock_ntmr0 = MAKE_CLOCK_NAME(sysctl_resource_ntmr0, CLK_SRC_GROUP_COMMON, clock_node_ntmr0), 163 clock_ntmr1 = MAKE_CLOCK_NAME(sysctl_resource_ntmr1, CLK_SRC_GROUP_COMMON, clock_node_ntmr1), 164 165 clock_ptpc = MAKE_CLOCK_NAME(sysctl_resource_ptpc, CLK_SRC_GROUP_COMMON, clock_node_ptpc), 166 clock_ref0 = MAKE_CLOCK_NAME(sysctl_resource_ref0, CLK_SRC_GROUP_COMMON, clock_node_ref0), 167 clock_ref1 = MAKE_CLOCK_NAME(sysctl_resource_ref1, CLK_SRC_GROUP_COMMON, clock_node_ref1), 168 clock_watchdog0 = MAKE_CLOCK_NAME(sysctl_resource_wdg0, CLK_SRC_GROUP_WDG, 0), 169 clock_watchdog1 = MAKE_CLOCK_NAME(sysctl_resource_wdg1, CLK_SRC_GROUP_WDG, 1), 170 clock_watchdog2 = MAKE_CLOCK_NAME(sysctl_resource_wdg2, CLK_SRC_GROUP_WDG, 2), 171 clock_watchdog3 = MAKE_CLOCK_NAME(sysctl_resource_wdg3, CLK_SRC_GROUP_WDG, 3), 172 clock_puart = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_PMIC, 0), 173 clock_ptmr = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_PMIC, 1), 174 clock_pwdg = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_PWDG, 0), 175 clock_eth0 = MAKE_CLOCK_NAME(sysctl_resource_eth0, CLK_SRC_GROUP_COMMON, clock_node_eth0), 176 clock_eth1 = MAKE_CLOCK_NAME(sysctl_resource_eth1, CLK_SRC_GROUP_COMMON, clock_node_eth1), 177 clock_ptp0 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_ptp0), 178 clock_ptp1 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_ptp1), 179 clock_sdp = MAKE_CLOCK_NAME(sysctl_resource_sdp0, CLK_SRC_GROUP_AXI0, 0), 180 clock_xdma = MAKE_CLOCK_NAME(sysctl_resource_dma1, CLK_SRC_GROUP_AXI0, 1), 181 clock_rom = MAKE_CLOCK_NAME(sysctl_resource_rom0, CLK_SRC_GROUP_AXI0, 2), 182 clock_ram0 = MAKE_CLOCK_NAME(sysctl_resource_ram0, CLK_SRC_GROUP_AXI0, 3), 183 clock_ram1 = MAKE_CLOCK_NAME(sysctl_resource_ram1, CLK_SRC_GROUP_AXI0, 4), 184 clock_usb0 = MAKE_CLOCK_NAME(sysctl_resource_usb0, CLK_SRC_GROUP_AXI1, 0), 185 clock_usb1 = MAKE_CLOCK_NAME(sysctl_resource_usb1, CLK_SRC_GROUP_AXI1, 1), 186 clock_jpeg = MAKE_CLOCK_NAME(sysctl_resource_jpeg, CLK_SRC_GROUP_AXI2, 0), 187 clock_pdma = MAKE_CLOCK_NAME(sysctl_resource_pdma, CLK_SRC_GROUP_AXI2, 1), 188 clock_kman = MAKE_CLOCK_NAME(sysctl_resource_kman, CLK_SRC_GROUP_AHB, 0), 189 clock_gpio = MAKE_CLOCK_NAME(sysctl_resource_gpio, CLK_SRC_GROUP_AHB, 1), 190 clock_mbx0 = MAKE_CLOCK_NAME(sysctl_resource_mbx0, CLK_SRC_GROUP_AHB, 2), 191 clock_mbx1 = MAKE_CLOCK_NAME(sysctl_resource_mbx1, CLK_SRC_GROUP_AHB, 3), 192 clock_hdma = MAKE_CLOCK_NAME(sysctl_resource_dma0, CLK_SRC_GROUP_AHB, 4), 193 clock_rng = MAKE_CLOCK_NAME(sysctl_resource_rng0, CLK_SRC_GROUP_AHB, 5), 194 clock_mot0 = MAKE_CLOCK_NAME(sysctl_resource_mot0, CLK_SRC_GROUP_AHB, 6), 195 clock_mot1 = MAKE_CLOCK_NAME(sysctl_resource_mot1, CLK_SRC_GROUP_AHB, 7), 196 clock_mot2 = MAKE_CLOCK_NAME(sysctl_resource_mot2, CLK_SRC_GROUP_AHB, 8), 197 clock_mot3 = MAKE_CLOCK_NAME(sysctl_resource_mot3, CLK_SRC_GROUP_AHB, 9), 198 clock_acmp = MAKE_CLOCK_NAME(sysctl_resource_acmp, CLK_SRC_GROUP_AHB, 10), 199 clock_pdm = MAKE_CLOCK_NAME(sysctl_resource_i2spdm0, CLK_SRC_GROUP_I2S, 0), 200 clock_dao = MAKE_CLOCK_NAME(sysctl_resource_i2sdao, CLK_SRC_GROUP_I2S, 1), 201 clock_synt = MAKE_CLOCK_NAME(sysctl_resource_synt, CLK_SRC_GROUP_AHB, 12), 202 clock_lmm0 = MAKE_CLOCK_NAME(sysctl_resource_lmm0, CLK_SRC_GROUP_CPU0, 0), 203 clock_lmm1 = MAKE_CLOCK_NAME(sysctl_resource_lmm1, CLK_SRC_GROUP_CPU1, 0), 204 205 /* For ADC, there are 2-stage clock source and divider configuration */ 206 clock_ana0 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_ana0), 207 clock_ana1 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_ana1), 208 clock_ana2 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_ana2), 209 clock_adc0 = MAKE_CLOCK_NAME(sysctl_resource_adc0, CLK_SRC_GROUP_ADC, 0), 210 clock_adc1 = MAKE_CLOCK_NAME(sysctl_resource_adc1, CLK_SRC_GROUP_ADC, 1), 211 clock_adc2 = MAKE_CLOCK_NAME(sysctl_resource_adc2, CLK_SRC_GROUP_ADC, 2), 212 clock_adc3 = MAKE_CLOCK_NAME(sysctl_resource_adc3, CLK_SRC_GROUP_ADC, 3), 213 214 /* For I2S, there are 2-stage clock source and divider configuration */ 215 clock_aud0 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_aud0), 216 clock_aud1 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_aud1), 217 clock_aud2 = MAKE_CLOCK_NAME(RESOURCE_INVALID, CLK_SRC_GROUP_COMMON, clock_node_aud2), 218 clock_i2s0 = MAKE_CLOCK_NAME(sysctl_resource_i2s0, CLK_SRC_GROUP_I2S, 0), 219 clock_i2s1 = MAKE_CLOCK_NAME(sysctl_resource_i2s1, CLK_SRC_GROUP_I2S, 1), 220 clock_i2s2 = MAKE_CLOCK_NAME(sysctl_resource_i2s2, CLK_SRC_GROUP_I2S, 2), 221 clock_i2s3 = MAKE_CLOCK_NAME(sysctl_resource_i2s3, CLK_SRC_GROUP_I2S, 3), 222 223 /* Clock sources */ 224 clk_osc0clk0 = MAKE_CLOCK_NAME(sysctl_resource_xtal, CLK_SRC_GROUP_SRC, 0), 225 clk_pll0clk0 = MAKE_CLOCK_NAME(sysctl_resource_clk0_pll0, CLK_SRC_GROUP_SRC, 1), 226 clk_pll1clk0 = MAKE_CLOCK_NAME(sysctl_resource_clk0_pll1, CLK_SRC_GROUP_SRC, 2), 227 clk_pll1clk1 = MAKE_CLOCK_NAME(sysctl_resource_clk1_pll1, CLK_SRC_GROUP_SRC, 3), 228 clk_pll2clk0 = MAKE_CLOCK_NAME(sysctl_resource_clk0_pll2, CLK_SRC_GROUP_SRC, 4), 229 clk_pll2clk1 = MAKE_CLOCK_NAME(sysctl_resource_clk1_pll2, CLK_SRC_GROUP_SRC, 5), 230 clk_pll3clk0 = MAKE_CLOCK_NAME(sysctl_resource_clk0_pll3, CLK_SRC_GROUP_SRC, 6), 231 clk_pll4clk0 = MAKE_CLOCK_NAME(sysctl_resource_clk0_pll4, CLK_SRC_GROUP_SRC, 7), 232 } clock_name_t; 233 234 #ifdef __cplusplus 235 extern "C" 236 { 237 #endif 238 239 /** 240 * @brief Get specified IP frequency 241 * @param[in] clock_name IP clock name 242 * 243 * @return IP clock frequency in Hz 244 */ 245 uint32_t clock_get_frequency(clock_name_t clock_name); 246 247 /** 248 * @brief Get Clock frequency for selected clock source 249 * @param [in] source clock source 250 * @return clock frequency for selected clock source 251 */ 252 uint32_t get_frequency_for_source(clock_source_t source); 253 254 /** 255 * @brief Get the IP clock source 256 * @param[in] clock_name IP clock name 257 * 258 * @return IP clock source 259 */ 260 clk_src_t clock_get_source(clock_name_t clock_name); 261 262 /** 263 * @brief Get the IP clock divider 264 * Note:This API return the direct clock divider 265 * @param [in] clock_name clock name 266 * @return IP clock divider 267 */ 268 uint32_t clock_get_divider(clock_name_t clock_name); 269 270 /** 271 * @brief Set ADC clock source 272 * @param[in] clock_name ADC clock name 273 * @param[in] src ADC clock source 274 * 275 * @retval status_success Setting ADC clock source is successful 276 * @retval status_clk_invalid Invalid ADC clock 277 * @retval status_clk_src_invalid Invalid ADC clock source 278 */ 279 hpm_stat_t clock_set_adc_source(clock_name_t clock_name, clk_src_t src); 280 281 /** 282 * @brief Set I2S clock source 283 * @param[in] clock_name I2S clock name 284 * @param[in] src I2S clock source 285 * 286 * @retval status_success Setting I2S clock source is successful 287 * @retval status_clk_invalid Invalid I2S clock 288 * @retval status_clk_src_invalid Invalid I2S clock source 289 */ 290 hpm_stat_t clock_set_i2s_source(clock_name_t clock_name, clk_src_t src); 291 292 /** 293 * @brief Set the WDG clock source 294 * @param [in] clock_name WDG clock name 295 * @param [in] src WDG clock source 296 * 297 * @retval status_success Setting WDG clock source is successful 298 * @retval status_invalid_argument Invalid WDG or invalid clock source 299 */ 300 hpm_stat_t clock_set_wdg_source(clock_name_t clock_name, clk_src_t src); 301 302 /** 303 * @brief Set the IP clock source and divider 304 * @param[in] clock_name clock name 305 * @param[in] src clock source 306 * @param[in] div clock divider, valid range (1 - 256) 307 * 308 * @retval status_success Setting Clock source and divider is successful. 309 * @retval status_clk_set_by_other_api The clock should be set by other API 310 * @retval status_clk_src_invalid clock source is invalid. 311 * @retval status_clk_fixed clock source and divider is a fixed value 312 * @retval status_clk_shared_ahb Clock is shared with the AHB clock 313 * @retval status_clk_shared_axi0 Clock is shared with the AXI0 clock 314 * @retval status_clk_shared_axi1 CLock is shared with the AXI1 clock 315 * @retval status_clk_shared_axi2 Clock is shared with the AXI2 clock 316 * @retval status_clk_shared_cpu0 Clock is shared with the CPU0 clock 317 * @retval status_clk_shared_cpu1 Clock is shared with the CPU1 clock 318 */ 319 hpm_stat_t clock_set_source_divider(clock_name_t clock_name, clk_src_t src, uint32_t div); 320 321 /** 322 * @brief Enable IP clock 323 * @param[in] clock_name IP clock name 324 */ 325 void clock_enable(clock_name_t clock_name); 326 327 /** 328 * @brief Disable IP clock 329 * @param[in] clock_name IP clock name 330 */ 331 void clock_disable(clock_name_t clock_name); 332 333 /** 334 * @brief Add IP to specified group 335 * @param[in] clock_name IP clock name 336 * @param[in] group resource group index, valid value: 0/1/2/3 337 */ 338 void clock_add_to_group(clock_name_t clock_name, uint32_t group); 339 340 /** 341 * @brief Remove IP from specified group 342 * @param[in] clock_name IP clock name 343 * @param[in] group resource group index, valid value: 0/1/2/3 344 */ 345 void clock_remove_from_group(clock_name_t clock_name, uint32_t group); 346 347 /** 348 * @brief Check IP in specified group 349 * @param[in] clock_name IP clock name 350 * @param[in] group resource group index, valid value: 0/1/2/3 351 * @return true if in group, false if not in group 352 */ 353 bool clock_check_in_group(clock_name_t clock_name, uint32_t group); 354 355 /** 356 * @brief Disconnect the clock group from specified CPU 357 * @param[in] group clock group index, value value is 0/1/2/3 358 * @param[in] cpu CPU index, valid value is 0/1 359 */ 360 void clock_connect_group_to_cpu(uint32_t group, uint32_t cpu); 361 362 /** 363 * @brief Disconnect the clock group from specified CPU 364 * @param[in] group clock group index, value value is 0/1/2/3 365 * @param[in] cpu CPU index, valid value is 0/1 366 */ 367 void clock_disconnect_group_from_cpu(uint32_t group, uint32_t cpu); 368 369 /** 370 * @brief Delay specified microseconds 371 * 372 * @param [in] us expected delay interval in microseconds 373 */ 374 void clock_cpu_delay_us(uint32_t us); 375 376 /** 377 * @brief Delay specified milliseconds 378 * 379 * @param [in] ms expected delay interval in milliseconds 380 */ 381 void clock_cpu_delay_ms(uint32_t ms); 382 383 /** 384 * @brief Update the Core clock frequency 385 */ 386 void clock_update_core_clock(void); 387 388 /** 389 * @brief HPM Core clock variable 390 */ 391 extern uint32_t hpm_core_clock; 392 393 #ifdef __cplusplus 394 } 395 #endif 396 397 /** 398 * @} 399 */ 400 401 #endif /* HPM_CLOCK_DRV_H */ 402