1/* 2 * Copyright (c) 2021-2023 HPMicro 3 * SPDX-License-Identifier: BSD-3-Clause 4 */ 5 6ENTRY(_start) 7 8STACK_SIZE = _stack_size; 9HEAP_SIZE = _heap_size; 10 11MEMORY 12{ 13 XPI0 (rx) : ORIGIN = 0x80000000, LENGTH = _flash_size 14 ILM (wx) : ORIGIN = 0x00000000, LENGTH = 256K 15 DLM (w) : ORIGIN = 0x00080000, LENGTH = 256K 16 AXI_SRAM (wx) : ORIGIN = 0x01080000, LENGTH = 512K /* AXI SRAM0 */ 17 NONCACHEABLE_RAM (wx) : ORIGIN = 0x01100000, LENGTH = 256K /* AXI SRAM1 */ 18 SHARE_RAM (w) : ORIGIN = 0x0117C000, LENGTH = 16K 19 AHB_SRAM (w) : ORIGIN = 0xF0300000, LENGTH = 32k 20 APB_SRAM (w): ORIGIN = 0xF40F0000, LENGTH = 8k 21} 22 23__nor_cfg_option_load_addr__ = ORIGIN(XPI0) + 0x400; 24__boot_header_load_addr__ = ORIGIN(XPI0) + 0x1000; 25__app_load_addr__ = ORIGIN(XPI0) + 0x3000; 26__boot_header_length__ = __boot_header_end__ - __boot_header_start__; 27__app_offset__ = __app_load_addr__ - __boot_header_load_addr__; 28 29 30SECTIONS 31{ 32 .nor_cfg_option __nor_cfg_option_load_addr__ : { 33 KEEP(*(.nor_cfg_option)) 34 } > XPI0 35 36 .boot_header __boot_header_load_addr__ : { 37 __boot_header_start__ = .; 38 KEEP(*(.boot_header)) 39 KEEP(*(.fw_info_table)) 40 KEEP(*(.dc_info)) 41 __boot_header_end__ = .; 42 } > XPI0 43 44 .start __app_load_addr__ : { 45 . = ALIGN(8); 46 KEEP(*(.start)) 47 } > XPI0 48 49 __vector_load_addr__ = ADDR(.start) + SIZEOF(.start); 50 .vectors ORIGIN(ILM) : AT(__vector_load_addr__) { 51 . = ALIGN(8); 52 __vector_ram_start__ = .; 53 KEEP(*(.vector_table)) 54 KEEP(*(.isr_vector)) 55 . = ALIGN(8); 56 __vector_ram_end__ = .; 57 } > ILM 58 59 .text (__vector_load_addr__ + SIZEOF(.vectors)) : { 60 . = ALIGN(8); 61 *(EXCLUDE_FILE (nx*.o*) .text) 62 *(EXCLUDE_FILE (nx*.o*) .text*) 63 *(EXCLUDE_FILE (nx*.o*) .rodata) 64 *(EXCLUDE_FILE (nx*.o*) .rodata*) 65 *(EXCLUDE_FILE (nx*.o*) .srodata) 66 *(EXCLUDE_FILE (nx*.o*) .srodata*) 67 68 *(.hash) 69 *(.dyn*) 70 *(.gnu*) 71 *(.pl*) 72 73 KEEP (*(.init)) 74 KEEP (*(.fini)) 75 76 /* section information for usbh class */ 77 . = ALIGN(8); 78 __usbh_class_info_start__ = .; 79 KEEP(*(.usbh_class_info)) 80 __usbh_class_info_end__ = .; 81 82 /* RT-Thread related sections - Start */ 83 /* section information for finsh shell */ 84 . = ALIGN(4); 85 __fsymtab_start = .; 86 KEEP(*(FSymTab)) 87 __fsymtab_end = .; 88 . = ALIGN(4); 89 __vsymtab_start = .; 90 KEEP(*(VSymTab)) 91 __vsymtab_end = .; 92 . = ALIGN(4); 93 94 . = ALIGN(4); 95 __rt_init_start = .; 96 KEEP(*(SORT(.rti_fn*))) 97 __rt_init_end = .; 98 . = ALIGN(4); 99 100 /* section information for modules */ 101 . = ALIGN(4); 102 __rtmsymtab_start = .; 103 KEEP(*(RTMSymTab)) 104 __rtmsymtab_end = .; 105 106 /* RT-Thread related sections - end */ 107 . = ALIGN(8); 108 } > XPI0 109 110 .eh_frame : 111 { 112 __eh_frame_start = .; 113 KEEP(*(.eh_frame)) 114 __eh_frame_end = .; 115 } > XPI0 116 117 .eh_frame_hdr : 118 { 119 KEEP(*(.eh_frame_hdr)) 120 } > XPI0 121 __eh_frame_hdr_start = SIZEOF(.eh_frame_hdr) > 0 ? ADDR(.eh_frame_hdr) : 0; 122 __eh_frame_hdr_end = SIZEOF(.eh_frame_hdr) > 0 ? . : 0; 123 124 .rel : { 125 KEEP(*(.rel*)) 126 } > XPI0 127 128 PROVIDE (__etext = .); 129 PROVIDE (_etext = .); 130 PROVIDE (etext = .); 131 132 __data_load_addr__ = etext; 133 .data : AT(__data_load_addr__) { 134 . = ALIGN(8); 135 __data_start__ = .; 136 __global_pointer$ = . + 0x800; 137 *(.data) 138 *(.data*) 139 *(.sdata) 140 *(.sdata*) 141 142 KEEP(*(.jcr)) 143 KEEP(*(.dynamic)) 144 KEEP(*(.got*)) 145 KEEP(*(.got)) 146 KEEP(*(.gcc_except_table)) 147 KEEP(*(.gcc_except_table.*)) 148 149 . = ALIGN(8); 150 PROVIDE(__preinit_array_start = .); 151 KEEP(*(.preinit_array)) 152 PROVIDE(__preinit_array_end = .); 153 154 . = ALIGN(8); 155 PROVIDE(__init_array_start = .); 156 KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*))) 157 KEEP(*(.init_array)) 158 PROVIDE(__init_array_end = .); 159 160 . = ALIGN(8); 161 PROVIDE(__finit_array_start = .); 162 KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*))) 163 KEEP(*(.finit_array)) 164 PROVIDE(__finit_array_end = .); 165 166 . = ALIGN(8); 167 KEEP(*crtbegin*.o(.ctors)) 168 KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors)) 169 KEEP(*(SORT(.ctors.*))) 170 KEEP(*(.ctors)) 171 172 . = ALIGN(8); 173 KEEP(*crtbegin*.o(.dtors)) 174 KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors)) 175 KEEP(*(SORT(.dtors.*))) 176 KEEP(*(.dtors)) 177 . = ALIGN(8); 178 __data_end__ = .; 179 PROVIDE (__edata = .); 180 PROVIDE (_edata = .); 181 PROVIDE (edata = .); 182 } > AXI_SRAM 183 184 __fast_load_addr__ = etext + SIZEOF(.data); 185 .fast : AT(__fast_load_addr__) { 186 . = ALIGN(8); 187 PROVIDE(__ramfunc_start__ = .); 188 *(.fast) 189 *(.fast.*) 190 nx*.o*(.text) 191 nx*.o*(.text*) 192 nx*.o*(.rodata) 193 nx*.o*(.rodata*) 194 nx*.o*(.srodata) 195 nx*.o*(.srodata*) 196 . = ALIGN(8); 197 PROVIDE(__ramfunc_end__ = .); 198 } > ILM 199 200 __tdata_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast); 201 .tdata : AT(__tdata_load_addr__) { 202 . = ALIGN(8); 203 PROVIDE(__tdata_start__ = .); 204 *(.tdata) 205 *(.tdata.*) 206 *(.gnu.linkonce.td.*) 207 . = ALIGN(8); 208 PROVIDE(__tdata_end__ = .); 209 } > AXI_SRAM 210 211 .tbss (NOLOAD) : { 212 . = ALIGN(8); 213 PROVIDE(__tbss_start__ = .); 214 __thread_pointer$ = .; 215 *(.tbss) 216 *(.tbss.*) 217 *(.gnu.linkonce.tb.*) 218 *(.tcommon) 219 . = ALIGN(8); 220 PROVIDE(__tbss_end__ = .); 221 } > AXI_SRAM 222 223 __noncacheable_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata); 224 .noncacheable.init : AT(__noncacheable_init_load_addr__) { 225 . = ALIGN(8); 226 __noncacheable_init_start__ = .; 227 KEEP(*(.noncacheable.init)) 228 __noncacheable_init_end__ = .; 229 . = ALIGN(8); 230 } > NONCACHEABLE_RAM 231 232 __fast_ram_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init); 233 .fast_ram.init : AT(__fast_ram_init_load_addr__) { 234 . = ALIGN(8); 235 __fast_ram_init_start__ = .; 236 KEEP(*(.fast_ram.init)) 237 __fast_ram_init_end__ = .; 238 . = ALIGN(8); 239 } > DLM 240 241 .bss (NOLOAD) : { 242 . = ALIGN(8); 243 __bss_start__ = .; 244 *(.bss) 245 *(.bss*) 246 *(.sbss*) 247 *(.scommon) 248 *(.scommon*) 249 *(.dynsbss*) 250 *(COMMON) 251 . = ALIGN(8); 252 _end = .; 253 __bss_end__ = .; 254 } > AXI_SRAM 255 256 .framebuffer (NOLOAD) : { 257 . = ALIGN(8); 258 KEEP(*(.framebuffer)) 259 . = ALIGN(8); 260 } > AXI_SRAM 261 262 .noncacheable.bss (NOLOAD) : { 263 . = ALIGN(8); 264 KEEP(*(.noncacheable)) 265 __noncacheable_bss_start__ = .; 266 KEEP(*(.noncacheable.bss)) 267 __noncacheable_bss_end__ = .; 268 . = ALIGN(8); 269 } > NONCACHEABLE_RAM 270 271 .sh_mem (NOLOAD) : { 272 KEEP(*(.sh_mem)) 273 } > SHARE_RAM 274 275 .ahb_sram (NOLOAD) : { 276 KEEP(*(.ahb_sram)) 277 } > AHB_SRAM 278 279 .apb_sram (NOLOAD) : { 280 KEEP(*(.backup_sram)) 281 } > APB_SRAM 282 283 .fast_ram.bss (NOLOAD) : { 284 . = ALIGN(8); 285 KEEP(*(.fast_ram)) 286 __fast_ram_bss_start__ = .; 287 KEEP(*(.fast_ram.bss)) 288 __fast_ram_bss_end__ = .; 289 . = ALIGN(8); 290 } > DLM 291 292 .heap (NOLOAD) : { 293 . = ALIGN(8); 294 __heap_start__ = .; 295 . += HEAP_SIZE; 296 __heap_end__ = .; 297 } > DLM 298 299 .stack (NOLOAD) : { 300 . = ALIGN(16); 301 __stack_base__ = .; 302 . += STACK_SIZE; 303 . = ALIGN(16); 304 PROVIDE (_stack = .); 305 PROVIDE (_stack_safe = .); 306 } > DLM 307 308 __noncacheable_start__ = ORIGIN(NONCACHEABLE_RAM); 309 __noncacheable_end__ = ORIGIN(NONCACHEABLE_RAM) + LENGTH(NONCACHEABLE_RAM); 310 __share_mem_start__ = ORIGIN(SHARE_RAM); 311 __share_mem_end__ = ORIGIN(SHARE_RAM) + LENGTH(SHARE_RAM); 312 313 __fw_size__ = SIZEOF(.start) + SIZEOF(.vectors) + SIZEOF(.rel) + SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init) + SIZEOF(.fast_ram.init); 314 __last_addr__ = __fast_ram_init_load_addr__ + SIZEOF(.fast_ram.init); 315 ASSERT(((__fw_size__ <= LENGTH(XPI0)) && (__last_addr__ <= (ORIGIN(XPI0) + LENGTH(XPI0)))), "****** FAILED! XPI0 has not enough space! ******") 316} 317