1/*
2 * Copyright (c) 2021-2023 HPMicro
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7#include "hpm_csr_regs.h"
8
9    .section .start, "ax"
10
11    .global _start
12    .type _start,@function
13
14_start:
15    /* Initialize global pointer */
16    .option push
17    .option norelax
18    la gp, __global_pointer$
19    la tp, __thread_pointer$
20    .option pop
21
22    /* reset mstatus to 0*/
23    csrrw x0, mstatus, x0
24
25#ifdef __riscv_flen
26    /* Enable FPU */
27    li t0, CSR_MSTATUS_FS_MASK
28    csrrs t0, mstatus, t0
29
30    /* Initialize FCSR */
31    fscsr zero
32#endif
33
34    /* Enable LMM1 clock */
35    la t0, 0xF4000800
36    lw t1, 0(t0)
37    ori t1, t1, 0x80
38    sw t1, 0(t0)
39
40#ifdef INIT_EXT_RAM_FOR_DATA
41    la t0, _stack_safe
42    mv sp, t0
43    call _init_ext_ram
44#endif
45
46    /* Initialize stack pointer */
47    la t0, _stack
48    mv sp, t0
49
50#ifdef CONFIG_NOT_ENABLE_ICACHE
51    call l1c_ic_disable
52#else
53    call l1c_ic_enable
54#endif
55#ifdef CONFIG_NOT_ENABLE_DCACHE
56    call l1c_dc_invalidate_all
57    call l1c_dc_disable
58#else
59    call l1c_dc_enable
60    call l1c_dc_invalidate_all
61#endif
62
63    /*
64     * Initialize LMA/VMA sections.
65     * Relocation for any sections that need to be copied from LMA to VMA.
66     */
67    call c_startup
68
69#if defined(__SES_RISCV)
70    /* Initialize the heap */
71    la a0, __heap_start__
72    la a1, __heap_end__
73    sub a1, a1, a0
74    la t1, __SEGGER_RTL_init_heap
75    jalr t1
76#endif
77
78    /* Do global constructors */
79    call __libc_init_array
80
81#ifndef NO_CLEANUP_AT_START
82    /* clean up */
83    call _clean_up
84#endif
85
86#ifdef __nds_execit
87    /* Initialize EXEC.IT table */
88    la t0, _ITB_BASE_
89    csrw uitb, t0
90#endif
91
92#if defined(CONFIG_FREERTOS) && CONFIG_FREERTOS
93    #define HANDLER_TRAP freertos_risc_v_trap_handler
94
95    /* Use mscratch to store isr level */
96    csrw mscratch, 0
97#elif defined(CONFIG_UCOS_III) && CONFIG_UCOS_III
98    #define HANDLER_TRAP ucos_risc_v_trap_handler
99
100    /* Use mscratch to store isr level */
101    csrw mscratch, 0
102#elif defined(CONFIG_THREADX) && CONFIG_THREADX
103    #define HANDLER_TRAP tx_risc_v_trap_handler
104    #define HANDLER_S_TRAP tx_risc_v_trap_handler
105
106    /* Use mscratch to store isr level */
107    csrw mscratch, 0
108
109#elif defined(CONFIG_RTTHREAD) && CONFIG_RTTHREAD
110    #define HANDLER_TRAP rtt_risc_v_trap_handler
111    #define HANDLER_S_TRAP rtt_risc_v_trap_handler
112
113    /* Use mscratch to store isr level */
114    csrw mscratch, 0
115
116#else
117    #define HANDLER_TRAP irq_handler_trap
118#endif
119
120#if !defined(USE_NONVECTOR_MODE) || (USE_NONVECTOR_MODE == 0)
121    /* Initial machine trap-vector Base */
122    la t0, __vector_table
123    csrw mtvec, t0
124
125    /* Enable vectored external PLIC interrupt */
126    csrsi CSR_MMISC_CTL, 2
127#else
128    /* Initial machine trap-vector Base */
129    la t0, HANDLER_TRAP
130    csrw mtvec, t0
131
132    /* Disable vectored external PLIC interrupt */
133    csrci CSR_MMISC_CTL, 2
134#endif
135
136    /* System reset handler */
137    call reset_handler
138
139    /* Infinite loop, if returned accidentally */
1401:    j 1b
141
142    .weak exit
143exit:
1441:    j 1b
145
146    .section .isr_vector, "ax"
147    .weak nmi_handler
148nmi_handler:
1491:    j 1b
150
151#include "../vectors.h"
152