1 /* 2 * Copyright (c) 2021-2024 HPMicro 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 */ 7 8 9 #ifndef HPM_IOC_H 10 #define HPM_IOC_H 11 12 typedef struct { 13 struct { 14 __RW uint32_t FUNC_CTL; /* 0x0: ALT SELECT */ 15 __RW uint32_t PAD_CTL; /* 0x4: PAD SETTINGS */ 16 } PAD[492]; 17 } IOC_Type; 18 19 20 /* Bitfield definition for register of struct array PAD: FUNC_CTL */ 21 /* 22 * LOOP_BACK (RW) 23 * 24 * force input on 25 * 0: disable 26 * 1: enable 27 */ 28 #define IOC_PAD_FUNC_CTL_LOOP_BACK_MASK (0x10000UL) 29 #define IOC_PAD_FUNC_CTL_LOOP_BACK_SHIFT (16U) 30 #define IOC_PAD_FUNC_CTL_LOOP_BACK_SET(x) (((uint32_t)(x) << IOC_PAD_FUNC_CTL_LOOP_BACK_SHIFT) & IOC_PAD_FUNC_CTL_LOOP_BACK_MASK) 31 #define IOC_PAD_FUNC_CTL_LOOP_BACK_GET(x) (((uint32_t)(x) & IOC_PAD_FUNC_CTL_LOOP_BACK_MASK) >> IOC_PAD_FUNC_CTL_LOOP_BACK_SHIFT) 32 33 /* 34 * ANALOG (RW) 35 * 36 * select analog pin in pad 37 * 0: disable 38 * 1: enable 39 */ 40 #define IOC_PAD_FUNC_CTL_ANALOG_MASK (0x100U) 41 #define IOC_PAD_FUNC_CTL_ANALOG_SHIFT (8U) 42 #define IOC_PAD_FUNC_CTL_ANALOG_SET(x) (((uint32_t)(x) << IOC_PAD_FUNC_CTL_ANALOG_SHIFT) & IOC_PAD_FUNC_CTL_ANALOG_MASK) 43 #define IOC_PAD_FUNC_CTL_ANALOG_GET(x) (((uint32_t)(x) & IOC_PAD_FUNC_CTL_ANALOG_MASK) >> IOC_PAD_FUNC_CTL_ANALOG_SHIFT) 44 45 /* 46 * ALT_SELECT (RW) 47 * 48 * alt select 49 * 0: ALT0 50 * 1: ALT1 51 * … 52 * 31:ALT31 53 */ 54 #define IOC_PAD_FUNC_CTL_ALT_SELECT_MASK (0x1FU) 55 #define IOC_PAD_FUNC_CTL_ALT_SELECT_SHIFT (0U) 56 #define IOC_PAD_FUNC_CTL_ALT_SELECT_SET(x) (((uint32_t)(x) << IOC_PAD_FUNC_CTL_ALT_SELECT_SHIFT) & IOC_PAD_FUNC_CTL_ALT_SELECT_MASK) 57 #define IOC_PAD_FUNC_CTL_ALT_SELECT_GET(x) (((uint32_t)(x) & IOC_PAD_FUNC_CTL_ALT_SELECT_MASK) >> IOC_PAD_FUNC_CTL_ALT_SELECT_SHIFT) 58 59 /* Bitfield definition for register of struct array PAD: PAD_CTL */ 60 /* 61 * MS (RW) 62 * 63 * pin voltage select, only available in high-speed IO 64 * 0: 3.3V 65 * 1: 1.8V 66 */ 67 #define IOC_PAD_PAD_CTL_MS_MASK (0x4000U) 68 #define IOC_PAD_PAD_CTL_MS_SHIFT (14U) 69 #define IOC_PAD_PAD_CTL_MS_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_MS_SHIFT) & IOC_PAD_PAD_CTL_MS_MASK) 70 #define IOC_PAD_PAD_CTL_MS_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_MS_MASK) >> IOC_PAD_PAD_CTL_MS_SHIFT) 71 72 /* 73 * OD (RW) 74 * 75 * open drain 76 * 0: open drain disable 77 * 1: open drain enable 78 */ 79 #define IOC_PAD_PAD_CTL_OD_MASK (0x2000U) 80 #define IOC_PAD_PAD_CTL_OD_SHIFT (13U) 81 #define IOC_PAD_PAD_CTL_OD_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_OD_SHIFT) & IOC_PAD_PAD_CTL_OD_MASK) 82 #define IOC_PAD_PAD_CTL_OD_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_OD_MASK) >> IOC_PAD_PAD_CTL_OD_SHIFT) 83 84 /* 85 * SMT (RW) 86 * 87 * schmitt trigger enable, only available in high-speed IO 88 * 0: disable 89 * 1: enable 90 */ 91 #define IOC_PAD_PAD_CTL_SMT_MASK (0x1000U) 92 #define IOC_PAD_PAD_CTL_SMT_SHIFT (12U) 93 #define IOC_PAD_PAD_CTL_SMT_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_SMT_SHIFT) & IOC_PAD_PAD_CTL_SMT_MASK) 94 #define IOC_PAD_PAD_CTL_SMT_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_SMT_MASK) >> IOC_PAD_PAD_CTL_SMT_SHIFT) 95 96 /* 97 * PS (RW) 98 * 99 * pull select 100 * 0: pull down 101 * 1: pull up 102 */ 103 #define IOC_PAD_PAD_CTL_PS_MASK (0x800U) 104 #define IOC_PAD_PAD_CTL_PS_SHIFT (11U) 105 #define IOC_PAD_PAD_CTL_PS_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_PS_SHIFT) & IOC_PAD_PAD_CTL_PS_MASK) 106 #define IOC_PAD_PAD_CTL_PS_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_PS_MASK) >> IOC_PAD_PAD_CTL_PS_SHIFT) 107 108 /* 109 * PE (RW) 110 * 111 * pull enable 112 * 0: pull disable 113 * 1: pull enable 114 */ 115 #define IOC_PAD_PAD_CTL_PE_MASK (0x10U) 116 #define IOC_PAD_PAD_CTL_PE_SHIFT (4U) 117 #define IOC_PAD_PAD_CTL_PE_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_PE_SHIFT) & IOC_PAD_PAD_CTL_PE_MASK) 118 #define IOC_PAD_PAD_CTL_PE_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_PE_MASK) >> IOC_PAD_PAD_CTL_PE_SHIFT) 119 120 /* 121 * DS (RW) 122 * 123 * drive strength 124 * for high-speed IO 3.3V: 125 * 000: 85.61Ohm 126 * 001: 61.2 Ohm 127 * 010: 42.88Ohm 128 * 011: 35.76Ohm 129 * 111: 30.67Ohm 130 * for high-speed IO 1.8V: 131 * 000: 84.07Ohm 132 * 001: 60.14Ohm 133 * 010: 42.15Ohm 134 * 011: 35.19Ohm 135 * 111: 30.2 Ohm 136 * for general IO: 137 * 00: 4mA 138 * 01: 8mA 139 * 11: 12mA 140 */ 141 #define IOC_PAD_PAD_CTL_DS_MASK (0x7U) 142 #define IOC_PAD_PAD_CTL_DS_SHIFT (0U) 143 #define IOC_PAD_PAD_CTL_DS_SET(x) (((uint32_t)(x) << IOC_PAD_PAD_CTL_DS_SHIFT) & IOC_PAD_PAD_CTL_DS_MASK) 144 #define IOC_PAD_PAD_CTL_DS_GET(x) (((uint32_t)(x) & IOC_PAD_PAD_CTL_DS_MASK) >> IOC_PAD_PAD_CTL_DS_SHIFT) 145 146 147 148 /* PAD register group index macro definition */ 149 #define IOC_PAD_PA00 (0UL) 150 #define IOC_PAD_PA01 (1UL) 151 #define IOC_PAD_PA02 (2UL) 152 #define IOC_PAD_PA03 (3UL) 153 #define IOC_PAD_PA04 (4UL) 154 #define IOC_PAD_PA05 (5UL) 155 #define IOC_PAD_PA06 (6UL) 156 #define IOC_PAD_PA07 (7UL) 157 #define IOC_PAD_PA08 (8UL) 158 #define IOC_PAD_PA09 (9UL) 159 #define IOC_PAD_PA10 (10UL) 160 #define IOC_PAD_PA11 (11UL) 161 #define IOC_PAD_PA12 (12UL) 162 #define IOC_PAD_PA13 (13UL) 163 #define IOC_PAD_PA14 (14UL) 164 #define IOC_PAD_PA15 (15UL) 165 #define IOC_PAD_PA16 (16UL) 166 #define IOC_PAD_PA17 (17UL) 167 #define IOC_PAD_PA18 (18UL) 168 #define IOC_PAD_PA19 (19UL) 169 #define IOC_PAD_PA20 (20UL) 170 #define IOC_PAD_PA21 (21UL) 171 #define IOC_PAD_PA22 (22UL) 172 #define IOC_PAD_PA23 (23UL) 173 #define IOC_PAD_PA24 (24UL) 174 #define IOC_PAD_PA25 (25UL) 175 #define IOC_PAD_PA26 (26UL) 176 #define IOC_PAD_PA27 (27UL) 177 #define IOC_PAD_PA28 (28UL) 178 #define IOC_PAD_PA29 (29UL) 179 #define IOC_PAD_PA30 (30UL) 180 #define IOC_PAD_PA31 (31UL) 181 #define IOC_PAD_PB00 (32UL) 182 #define IOC_PAD_PB01 (33UL) 183 #define IOC_PAD_PB02 (34UL) 184 #define IOC_PAD_PB03 (35UL) 185 #define IOC_PAD_PB04 (36UL) 186 #define IOC_PAD_PB05 (37UL) 187 #define IOC_PAD_PB06 (38UL) 188 #define IOC_PAD_PB07 (39UL) 189 #define IOC_PAD_PB08 (40UL) 190 #define IOC_PAD_PB09 (41UL) 191 #define IOC_PAD_PB10 (42UL) 192 #define IOC_PAD_PB11 (43UL) 193 #define IOC_PAD_PB12 (44UL) 194 #define IOC_PAD_PB13 (45UL) 195 #define IOC_PAD_PB14 (46UL) 196 #define IOC_PAD_PB15 (47UL) 197 #define IOC_PAD_PB16 (48UL) 198 #define IOC_PAD_PB17 (49UL) 199 #define IOC_PAD_PB18 (50UL) 200 #define IOC_PAD_PB19 (51UL) 201 #define IOC_PAD_PB20 (52UL) 202 #define IOC_PAD_PB21 (53UL) 203 #define IOC_PAD_PB22 (54UL) 204 #define IOC_PAD_PB23 (55UL) 205 #define IOC_PAD_PB24 (56UL) 206 #define IOC_PAD_PB25 (57UL) 207 #define IOC_PAD_PB26 (58UL) 208 #define IOC_PAD_PB27 (59UL) 209 #define IOC_PAD_PB28 (60UL) 210 #define IOC_PAD_PB29 (61UL) 211 #define IOC_PAD_PB30 (62UL) 212 #define IOC_PAD_PB31 (63UL) 213 #define IOC_PAD_PC00 (64UL) 214 #define IOC_PAD_PC01 (65UL) 215 #define IOC_PAD_PC02 (66UL) 216 #define IOC_PAD_PC03 (67UL) 217 #define IOC_PAD_PC04 (68UL) 218 #define IOC_PAD_PC05 (69UL) 219 #define IOC_PAD_PC06 (70UL) 220 #define IOC_PAD_PC07 (71UL) 221 #define IOC_PAD_PC08 (72UL) 222 #define IOC_PAD_PC09 (73UL) 223 #define IOC_PAD_PC10 (74UL) 224 #define IOC_PAD_PC11 (75UL) 225 #define IOC_PAD_PC12 (76UL) 226 #define IOC_PAD_PC13 (77UL) 227 #define IOC_PAD_PC14 (78UL) 228 #define IOC_PAD_PC15 (79UL) 229 #define IOC_PAD_PC16 (80UL) 230 #define IOC_PAD_PC17 (81UL) 231 #define IOC_PAD_PC18 (82UL) 232 #define IOC_PAD_PC19 (83UL) 233 #define IOC_PAD_PC20 (84UL) 234 #define IOC_PAD_PC21 (85UL) 235 #define IOC_PAD_PC22 (86UL) 236 #define IOC_PAD_PC23 (87UL) 237 #define IOC_PAD_PC24 (88UL) 238 #define IOC_PAD_PC25 (89UL) 239 #define IOC_PAD_PC26 (90UL) 240 #define IOC_PAD_PC27 (91UL) 241 #define IOC_PAD_PC28 (92UL) 242 #define IOC_PAD_PC29 (93UL) 243 #define IOC_PAD_PC30 (94UL) 244 #define IOC_PAD_PC31 (95UL) 245 #define IOC_PAD_PD00 (96UL) 246 #define IOC_PAD_PD01 (97UL) 247 #define IOC_PAD_PD02 (98UL) 248 #define IOC_PAD_PD03 (99UL) 249 #define IOC_PAD_PD04 (100UL) 250 #define IOC_PAD_PD05 (101UL) 251 #define IOC_PAD_PD06 (102UL) 252 #define IOC_PAD_PD07 (103UL) 253 #define IOC_PAD_PD08 (104UL) 254 #define IOC_PAD_PD09 (105UL) 255 #define IOC_PAD_PD10 (106UL) 256 #define IOC_PAD_PD11 (107UL) 257 #define IOC_PAD_PD12 (108UL) 258 #define IOC_PAD_PD13 (109UL) 259 #define IOC_PAD_PD14 (110UL) 260 #define IOC_PAD_PD15 (111UL) 261 #define IOC_PAD_PD16 (112UL) 262 #define IOC_PAD_PD17 (113UL) 263 #define IOC_PAD_PD18 (114UL) 264 #define IOC_PAD_PD19 (115UL) 265 #define IOC_PAD_PD20 (116UL) 266 #define IOC_PAD_PD21 (117UL) 267 #define IOC_PAD_PD22 (118UL) 268 #define IOC_PAD_PD23 (119UL) 269 #define IOC_PAD_PD24 (120UL) 270 #define IOC_PAD_PD25 (121UL) 271 #define IOC_PAD_PD26 (122UL) 272 #define IOC_PAD_PD27 (123UL) 273 #define IOC_PAD_PD28 (124UL) 274 #define IOC_PAD_PD29 (125UL) 275 #define IOC_PAD_PD30 (126UL) 276 #define IOC_PAD_PD31 (127UL) 277 #define IOC_PAD_PE00 (128UL) 278 #define IOC_PAD_PE01 (129UL) 279 #define IOC_PAD_PE02 (130UL) 280 #define IOC_PAD_PE03 (131UL) 281 #define IOC_PAD_PE04 (132UL) 282 #define IOC_PAD_PE05 (133UL) 283 #define IOC_PAD_PE06 (134UL) 284 #define IOC_PAD_PE07 (135UL) 285 #define IOC_PAD_PE08 (136UL) 286 #define IOC_PAD_PE09 (137UL) 287 #define IOC_PAD_PE10 (138UL) 288 #define IOC_PAD_PE11 (139UL) 289 #define IOC_PAD_PE12 (140UL) 290 #define IOC_PAD_PE13 (141UL) 291 #define IOC_PAD_PE14 (142UL) 292 #define IOC_PAD_PE15 (143UL) 293 #define IOC_PAD_PE16 (144UL) 294 #define IOC_PAD_PE17 (145UL) 295 #define IOC_PAD_PE18 (146UL) 296 #define IOC_PAD_PE19 (147UL) 297 #define IOC_PAD_PE20 (148UL) 298 #define IOC_PAD_PE21 (149UL) 299 #define IOC_PAD_PE22 (150UL) 300 #define IOC_PAD_PE23 (151UL) 301 #define IOC_PAD_PE24 (152UL) 302 #define IOC_PAD_PE25 (153UL) 303 #define IOC_PAD_PE26 (154UL) 304 #define IOC_PAD_PE27 (155UL) 305 #define IOC_PAD_PE28 (156UL) 306 #define IOC_PAD_PE29 (157UL) 307 #define IOC_PAD_PE30 (158UL) 308 #define IOC_PAD_PE31 (159UL) 309 #define IOC_PAD_PF00 (160UL) 310 #define IOC_PAD_PF01 (161UL) 311 #define IOC_PAD_PF02 (162UL) 312 #define IOC_PAD_PF03 (163UL) 313 #define IOC_PAD_PF04 (164UL) 314 #define IOC_PAD_PF05 (165UL) 315 #define IOC_PAD_PF06 (166UL) 316 #define IOC_PAD_PF07 (167UL) 317 #define IOC_PAD_PF08 (168UL) 318 #define IOC_PAD_PF09 (169UL) 319 #define IOC_PAD_PF10 (170UL) 320 #define IOC_PAD_PX00 (416UL) 321 #define IOC_PAD_PX01 (417UL) 322 #define IOC_PAD_PX02 (418UL) 323 #define IOC_PAD_PX03 (419UL) 324 #define IOC_PAD_PX04 (420UL) 325 #define IOC_PAD_PX05 (421UL) 326 #define IOC_PAD_PX06 (422UL) 327 #define IOC_PAD_PX07 (423UL) 328 #define IOC_PAD_PX08 (424UL) 329 #define IOC_PAD_PX09 (425UL) 330 #define IOC_PAD_PX10 (426UL) 331 #define IOC_PAD_PX11 (427UL) 332 #define IOC_PAD_PY00 (448UL) 333 #define IOC_PAD_PY01 (449UL) 334 #define IOC_PAD_PY02 (450UL) 335 #define IOC_PAD_PY03 (451UL) 336 #define IOC_PAD_PY04 (452UL) 337 #define IOC_PAD_PY05 (453UL) 338 #define IOC_PAD_PY06 (454UL) 339 #define IOC_PAD_PY07 (455UL) 340 #define IOC_PAD_PY08 (456UL) 341 #define IOC_PAD_PY09 (457UL) 342 #define IOC_PAD_PY10 (458UL) 343 #define IOC_PAD_PY11 (459UL) 344 #define IOC_PAD_PZ00 (480UL) 345 #define IOC_PAD_PZ01 (481UL) 346 #define IOC_PAD_PZ02 (482UL) 347 #define IOC_PAD_PZ03 (483UL) 348 #define IOC_PAD_PZ04 (484UL) 349 #define IOC_PAD_PZ05 (485UL) 350 #define IOC_PAD_PZ06 (486UL) 351 #define IOC_PAD_PZ07 (487UL) 352 #define IOC_PAD_PZ08 (488UL) 353 #define IOC_PAD_PZ09 (489UL) 354 #define IOC_PAD_PZ10 (490UL) 355 #define IOC_PAD_PZ11 (491UL) 356 357 358 #endif /* HPM_IOC_H */ 359