1 /*
2  * Copyright (c) 2021-2024 HPMicro
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  */
7 
8 
9 #ifndef HPM_PLIC_H
10 #define HPM_PLIC_H
11 
12 typedef struct {
13     __RW uint32_t FEATURE;                     /* 0x0: Feature enable register */
14     __RW uint32_t PRIORITY[127];               /* 0x4 - 0x1FC: Source priority */
15     __R  uint8_t  RESERVED0[3584];             /* 0x200 - 0xFFF: Reserved */
16     __RW uint32_t PENDING[4];                  /* 0x1000 - 0x100C: Pending status */
17     __R  uint8_t  RESERVED1[112];              /* 0x1010 - 0x107F: Reserved */
18     __R  uint32_t TRIGGER[4];                  /* 0x1080 - 0x108C: Trigger type */
19     __R  uint8_t  RESERVED2[112];              /* 0x1090 - 0x10FF: Reserved */
20     __R  uint32_t NUMBER;                      /* 0x1100: Number of supported interrupt sources and targets */
21     __R  uint32_t INFO;                        /* 0x1104: Version and the maximum priority */
22     __R  uint8_t  RESERVED3[3832];             /* 0x1108 - 0x1FFF: Reserved */
23     struct {
24         __RW uint32_t INTEN[4];                /* 0x2000 - 0x200C: machine interrupt enable */
25         __R  uint8_t  RESERVED0[112];          /* 0x2010 - 0x207F: Reserved */
26     } TARGETINT[2];
27     __R  uint8_t  RESERVED4[2088704];          /* 0x2100 - 0x1FFFFF: Reserved */
28     struct {
29         __RW uint32_t THRESHOLD;               /* 0x200000: Target0 priority threshold */
30         __RW uint32_t CLAIM;                   /* 0x200004: Target claim and complete */
31         __R  uint8_t  RESERVED0[1016];         /* 0x200008 - 0x2003FF: Reserved */
32         __RW uint32_t PPS;                     /* 0x200400: Preempted priority stack */
33         __R  uint8_t  RESERVED1[3068];         /* 0x200404 - 0x200FFF: Reserved */
34     } TARGETCONFIG[2];
35 } PLIC_Type;
36 
37 
38 /* Bitfield definition for register: FEATURE */
39 /*
40  * VECTORED (RW)
41  *
42  * Vector mode enable
43  * 0: Disabled
44  * 1: Enabled
45  */
46 #define PLIC_FEATURE_VECTORED_MASK (0x2U)
47 #define PLIC_FEATURE_VECTORED_SHIFT (1U)
48 #define PLIC_FEATURE_VECTORED_SET(x) (((uint32_t)(x) << PLIC_FEATURE_VECTORED_SHIFT) & PLIC_FEATURE_VECTORED_MASK)
49 #define PLIC_FEATURE_VECTORED_GET(x) (((uint32_t)(x) & PLIC_FEATURE_VECTORED_MASK) >> PLIC_FEATURE_VECTORED_SHIFT)
50 
51 /*
52  * PREEMPT (RW)
53  *
54  * Preemptive priority interrupt enable
55  * 0: Disabled
56  * 1: Enabled
57  */
58 #define PLIC_FEATURE_PREEMPT_MASK (0x1U)
59 #define PLIC_FEATURE_PREEMPT_SHIFT (0U)
60 #define PLIC_FEATURE_PREEMPT_SET(x) (((uint32_t)(x) << PLIC_FEATURE_PREEMPT_SHIFT) & PLIC_FEATURE_PREEMPT_MASK)
61 #define PLIC_FEATURE_PREEMPT_GET(x) (((uint32_t)(x) & PLIC_FEATURE_PREEMPT_MASK) >> PLIC_FEATURE_PREEMPT_SHIFT)
62 
63 /* Bitfield definition for register array: PRIORITY */
64 /*
65  * PRIORITY (RW)
66  *
67  * Interrupt source priority. The valid range of this field is 0-7.
68  * 0: Never interrupt
69  * 1-7: Interrupt source priority. The larger the value, the higher the priority.
70  */
71 #define PLIC_PRIORITY_PRIORITY_MASK (0xFFFFFFFFUL)
72 #define PLIC_PRIORITY_PRIORITY_SHIFT (0U)
73 #define PLIC_PRIORITY_PRIORITY_SET(x) (((uint32_t)(x) << PLIC_PRIORITY_PRIORITY_SHIFT) & PLIC_PRIORITY_PRIORITY_MASK)
74 #define PLIC_PRIORITY_PRIORITY_GET(x) (((uint32_t)(x) & PLIC_PRIORITY_PRIORITY_MASK) >> PLIC_PRIORITY_PRIORITY_SHIFT)
75 
76 /* Bitfield definition for register array: PENDING */
77 /*
78  * INTERRUPT (RW)
79  *
80  * The interrupt pending status of inpterrupt sources. Every interrupt source occupies 1 bit.
81  */
82 #define PLIC_PENDING_INTERRUPT_MASK (0xFFFFFFFFUL)
83 #define PLIC_PENDING_INTERRUPT_SHIFT (0U)
84 #define PLIC_PENDING_INTERRUPT_SET(x) (((uint32_t)(x) << PLIC_PENDING_INTERRUPT_SHIFT) & PLIC_PENDING_INTERRUPT_MASK)
85 #define PLIC_PENDING_INTERRUPT_GET(x) (((uint32_t)(x) & PLIC_PENDING_INTERRUPT_MASK) >> PLIC_PENDING_INTERRUPT_SHIFT)
86 
87 /* Bitfield definition for register array: TRIGGER */
88 /*
89  * INTERRUPT (RO)
90  *
91  * The interrupt trigger type of interrupt sources. Every interrupt source occupies 1 bit.
92  * 0: Level-triggered interrupt
93  * 1: Edge-triggered interrupt
94  */
95 #define PLIC_TRIGGER_INTERRUPT_MASK (0xFFFFFFFFUL)
96 #define PLIC_TRIGGER_INTERRUPT_SHIFT (0U)
97 #define PLIC_TRIGGER_INTERRUPT_GET(x) (((uint32_t)(x) & PLIC_TRIGGER_INTERRUPT_MASK) >> PLIC_TRIGGER_INTERRUPT_SHIFT)
98 
99 /* Bitfield definition for register: NUMBER */
100 /*
101  * NUM_TARGET (RO)
102  *
103  * The number of supported targets
104  */
105 #define PLIC_NUMBER_NUM_TARGET_MASK (0xFFFF0000UL)
106 #define PLIC_NUMBER_NUM_TARGET_SHIFT (16U)
107 #define PLIC_NUMBER_NUM_TARGET_GET(x) (((uint32_t)(x) & PLIC_NUMBER_NUM_TARGET_MASK) >> PLIC_NUMBER_NUM_TARGET_SHIFT)
108 
109 /*
110  * NUM_INTERRUPT (RO)
111  *
112  * The number of supported interrupt sources
113  */
114 #define PLIC_NUMBER_NUM_INTERRUPT_MASK (0xFFFFU)
115 #define PLIC_NUMBER_NUM_INTERRUPT_SHIFT (0U)
116 #define PLIC_NUMBER_NUM_INTERRUPT_GET(x) (((uint32_t)(x) & PLIC_NUMBER_NUM_INTERRUPT_MASK) >> PLIC_NUMBER_NUM_INTERRUPT_SHIFT)
117 
118 /* Bitfield definition for register: INFO */
119 /*
120  * MAX_PRIORITY (RO)
121  *
122  * The maximum priority supported
123  */
124 #define PLIC_INFO_MAX_PRIORITY_MASK (0xFFFF0000UL)
125 #define PLIC_INFO_MAX_PRIORITY_SHIFT (16U)
126 #define PLIC_INFO_MAX_PRIORITY_GET(x) (((uint32_t)(x) & PLIC_INFO_MAX_PRIORITY_MASK) >> PLIC_INFO_MAX_PRIORITY_SHIFT)
127 
128 /*
129  * VERSION (RO)
130  *
131  * The version of the PLIC design
132  */
133 #define PLIC_INFO_VERSION_MASK (0xFFFFU)
134 #define PLIC_INFO_VERSION_SHIFT (0U)
135 #define PLIC_INFO_VERSION_GET(x) (((uint32_t)(x) & PLIC_INFO_VERSION_MASK) >> PLIC_INFO_VERSION_SHIFT)
136 
137 /* Bitfield definition for register of struct array TARGETINT: INTEN0 */
138 /*
139  * INTERRUPT (RW)
140  *
141  * The interrupt enable bit for interrupt. Every interrupt source occupies 1 bit.
142  */
143 #define PLIC_TARGETINT_INTEN_INTERRUPT_MASK (0xFFFFFFFFUL)
144 #define PLIC_TARGETINT_INTEN_INTERRUPT_SHIFT (0U)
145 #define PLIC_TARGETINT_INTEN_INTERRUPT_SET(x) (((uint32_t)(x) << PLIC_TARGETINT_INTEN_INTERRUPT_SHIFT) & PLIC_TARGETINT_INTEN_INTERRUPT_MASK)
146 #define PLIC_TARGETINT_INTEN_INTERRUPT_GET(x) (((uint32_t)(x) & PLIC_TARGETINT_INTEN_INTERRUPT_MASK) >> PLIC_TARGETINT_INTEN_INTERRUPT_SHIFT)
147 
148 /* Bitfield definition for register of struct array TARGETCONFIG: THRESHOLD */
149 /*
150  * THRESHOLD (RW)
151  *
152  * Interrupt priority threshold.
153  */
154 #define PLIC_TARGETCONFIG_THRESHOLD_THRESHOLD_MASK (0xFFFFFFFFUL)
155 #define PLIC_TARGETCONFIG_THRESHOLD_THRESHOLD_SHIFT (0U)
156 #define PLIC_TARGETCONFIG_THRESHOLD_THRESHOLD_SET(x) (((uint32_t)(x) << PLIC_TARGETCONFIG_THRESHOLD_THRESHOLD_SHIFT) & PLIC_TARGETCONFIG_THRESHOLD_THRESHOLD_MASK)
157 #define PLIC_TARGETCONFIG_THRESHOLD_THRESHOLD_GET(x) (((uint32_t)(x) & PLIC_TARGETCONFIG_THRESHOLD_THRESHOLD_MASK) >> PLIC_TARGETCONFIG_THRESHOLD_THRESHOLD_SHIFT)
158 
159 /* Bitfield definition for register of struct array TARGETCONFIG: CLAIM */
160 /*
161  * INTERRUPT_ID (RW)
162  *
163  * On reads, indicating the interrupt source that has being claimed. On writes, indicating the interrupt source that has been handled (completed).
164  */
165 #define PLIC_TARGETCONFIG_CLAIM_INTERRUPT_ID_MASK (0x3FFU)
166 #define PLIC_TARGETCONFIG_CLAIM_INTERRUPT_ID_SHIFT (0U)
167 #define PLIC_TARGETCONFIG_CLAIM_INTERRUPT_ID_SET(x) (((uint32_t)(x) << PLIC_TARGETCONFIG_CLAIM_INTERRUPT_ID_SHIFT) & PLIC_TARGETCONFIG_CLAIM_INTERRUPT_ID_MASK)
168 #define PLIC_TARGETCONFIG_CLAIM_INTERRUPT_ID_GET(x) (((uint32_t)(x) & PLIC_TARGETCONFIG_CLAIM_INTERRUPT_ID_MASK) >> PLIC_TARGETCONFIG_CLAIM_INTERRUPT_ID_SHIFT)
169 
170 /* Bitfield definition for register of struct array TARGETCONFIG: PPS */
171 /*
172  * PRIORITY_PREEMPTED (RW)
173  *
174  * Each bit indicates if the corresponding priority level has been preempted by a higher-priority interrupt.
175  */
176 #define PLIC_TARGETCONFIG_PPS_PRIORITY_PREEMPTED_MASK (0xFFFFFFFFUL)
177 #define PLIC_TARGETCONFIG_PPS_PRIORITY_PREEMPTED_SHIFT (0U)
178 #define PLIC_TARGETCONFIG_PPS_PRIORITY_PREEMPTED_SET(x) (((uint32_t)(x) << PLIC_TARGETCONFIG_PPS_PRIORITY_PREEMPTED_SHIFT) & PLIC_TARGETCONFIG_PPS_PRIORITY_PREEMPTED_MASK)
179 #define PLIC_TARGETCONFIG_PPS_PRIORITY_PREEMPTED_GET(x) (((uint32_t)(x) & PLIC_TARGETCONFIG_PPS_PRIORITY_PREEMPTED_MASK) >> PLIC_TARGETCONFIG_PPS_PRIORITY_PREEMPTED_SHIFT)
180 
181 
182 
183 /* PRIORITY register group index macro definition */
184 #define PLIC_PRIORITY_PRIORITY1 (0UL)
185 #define PLIC_PRIORITY_PRIORITY2 (1UL)
186 #define PLIC_PRIORITY_PRIORITY3 (2UL)
187 #define PLIC_PRIORITY_PRIORITY4 (3UL)
188 #define PLIC_PRIORITY_PRIORITY5 (4UL)
189 #define PLIC_PRIORITY_PRIORITY6 (5UL)
190 #define PLIC_PRIORITY_PRIORITY7 (6UL)
191 #define PLIC_PRIORITY_PRIORITY8 (7UL)
192 #define PLIC_PRIORITY_PRIORITY9 (8UL)
193 #define PLIC_PRIORITY_PRIORITY10 (9UL)
194 #define PLIC_PRIORITY_PRIORITY11 (10UL)
195 #define PLIC_PRIORITY_PRIORITY12 (11UL)
196 #define PLIC_PRIORITY_PRIORITY13 (12UL)
197 #define PLIC_PRIORITY_PRIORITY14 (13UL)
198 #define PLIC_PRIORITY_PRIORITY15 (14UL)
199 #define PLIC_PRIORITY_PRIORITY16 (15UL)
200 #define PLIC_PRIORITY_PRIORITY17 (16UL)
201 #define PLIC_PRIORITY_PRIORITY18 (17UL)
202 #define PLIC_PRIORITY_PRIORITY19 (18UL)
203 #define PLIC_PRIORITY_PRIORITY20 (19UL)
204 #define PLIC_PRIORITY_PRIORITY21 (20UL)
205 #define PLIC_PRIORITY_PRIORITY22 (21UL)
206 #define PLIC_PRIORITY_PRIORITY23 (22UL)
207 #define PLIC_PRIORITY_PRIORITY24 (23UL)
208 #define PLIC_PRIORITY_PRIORITY25 (24UL)
209 #define PLIC_PRIORITY_PRIORITY26 (25UL)
210 #define PLIC_PRIORITY_PRIORITY27 (26UL)
211 #define PLIC_PRIORITY_PRIORITY28 (27UL)
212 #define PLIC_PRIORITY_PRIORITY29 (28UL)
213 #define PLIC_PRIORITY_PRIORITY30 (29UL)
214 #define PLIC_PRIORITY_PRIORITY31 (30UL)
215 #define PLIC_PRIORITY_PRIORITY32 (31UL)
216 #define PLIC_PRIORITY_PRIORITY33 (32UL)
217 #define PLIC_PRIORITY_PRIORITY34 (33UL)
218 #define PLIC_PRIORITY_PRIORITY35 (34UL)
219 #define PLIC_PRIORITY_PRIORITY36 (35UL)
220 #define PLIC_PRIORITY_PRIORITY37 (36UL)
221 #define PLIC_PRIORITY_PRIORITY38 (37UL)
222 #define PLIC_PRIORITY_PRIORITY39 (38UL)
223 #define PLIC_PRIORITY_PRIORITY40 (39UL)
224 #define PLIC_PRIORITY_PRIORITY41 (40UL)
225 #define PLIC_PRIORITY_PRIORITY42 (41UL)
226 #define PLIC_PRIORITY_PRIORITY43 (42UL)
227 #define PLIC_PRIORITY_PRIORITY44 (43UL)
228 #define PLIC_PRIORITY_PRIORITY45 (44UL)
229 #define PLIC_PRIORITY_PRIORITY46 (45UL)
230 #define PLIC_PRIORITY_PRIORITY47 (46UL)
231 #define PLIC_PRIORITY_PRIORITY48 (47UL)
232 #define PLIC_PRIORITY_PRIORITY49 (48UL)
233 #define PLIC_PRIORITY_PRIORITY50 (49UL)
234 #define PLIC_PRIORITY_PRIORITY51 (50UL)
235 #define PLIC_PRIORITY_PRIORITY52 (51UL)
236 #define PLIC_PRIORITY_PRIORITY53 (52UL)
237 #define PLIC_PRIORITY_PRIORITY54 (53UL)
238 #define PLIC_PRIORITY_PRIORITY55 (54UL)
239 #define PLIC_PRIORITY_PRIORITY56 (55UL)
240 #define PLIC_PRIORITY_PRIORITY57 (56UL)
241 #define PLIC_PRIORITY_PRIORITY58 (57UL)
242 #define PLIC_PRIORITY_PRIORITY59 (58UL)
243 #define PLIC_PRIORITY_PRIORITY60 (59UL)
244 #define PLIC_PRIORITY_PRIORITY61 (60UL)
245 #define PLIC_PRIORITY_PRIORITY62 (61UL)
246 #define PLIC_PRIORITY_PRIORITY63 (62UL)
247 #define PLIC_PRIORITY_PRIORITY64 (63UL)
248 #define PLIC_PRIORITY_PRIORITY65 (64UL)
249 #define PLIC_PRIORITY_PRIORITY66 (65UL)
250 #define PLIC_PRIORITY_PRIORITY67 (66UL)
251 #define PLIC_PRIORITY_PRIORITY68 (67UL)
252 #define PLIC_PRIORITY_PRIORITY69 (68UL)
253 #define PLIC_PRIORITY_PRIORITY70 (69UL)
254 #define PLIC_PRIORITY_PRIORITY71 (70UL)
255 #define PLIC_PRIORITY_PRIORITY72 (71UL)
256 #define PLIC_PRIORITY_PRIORITY73 (72UL)
257 #define PLIC_PRIORITY_PRIORITY74 (73UL)
258 #define PLIC_PRIORITY_PRIORITY75 (74UL)
259 #define PLIC_PRIORITY_PRIORITY76 (75UL)
260 #define PLIC_PRIORITY_PRIORITY77 (76UL)
261 #define PLIC_PRIORITY_PRIORITY78 (77UL)
262 #define PLIC_PRIORITY_PRIORITY79 (78UL)
263 #define PLIC_PRIORITY_PRIORITY80 (79UL)
264 #define PLIC_PRIORITY_PRIORITY81 (80UL)
265 #define PLIC_PRIORITY_PRIORITY82 (81UL)
266 #define PLIC_PRIORITY_PRIORITY83 (82UL)
267 #define PLIC_PRIORITY_PRIORITY84 (83UL)
268 #define PLIC_PRIORITY_PRIORITY85 (84UL)
269 #define PLIC_PRIORITY_PRIORITY86 (85UL)
270 #define PLIC_PRIORITY_PRIORITY87 (86UL)
271 #define PLIC_PRIORITY_PRIORITY88 (87UL)
272 #define PLIC_PRIORITY_PRIORITY89 (88UL)
273 #define PLIC_PRIORITY_PRIORITY90 (89UL)
274 #define PLIC_PRIORITY_PRIORITY91 (90UL)
275 #define PLIC_PRIORITY_PRIORITY92 (91UL)
276 #define PLIC_PRIORITY_PRIORITY93 (92UL)
277 #define PLIC_PRIORITY_PRIORITY94 (93UL)
278 #define PLIC_PRIORITY_PRIORITY95 (94UL)
279 #define PLIC_PRIORITY_PRIORITY96 (95UL)
280 #define PLIC_PRIORITY_PRIORITY97 (96UL)
281 #define PLIC_PRIORITY_PRIORITY98 (97UL)
282 #define PLIC_PRIORITY_PRIORITY99 (98UL)
283 #define PLIC_PRIORITY_PRIORITY100 (99UL)
284 #define PLIC_PRIORITY_PRIORITY101 (100UL)
285 #define PLIC_PRIORITY_PRIORITY102 (101UL)
286 #define PLIC_PRIORITY_PRIORITY103 (102UL)
287 #define PLIC_PRIORITY_PRIORITY104 (103UL)
288 #define PLIC_PRIORITY_PRIORITY105 (104UL)
289 #define PLIC_PRIORITY_PRIORITY106 (105UL)
290 #define PLIC_PRIORITY_PRIORITY107 (106UL)
291 #define PLIC_PRIORITY_PRIORITY108 (107UL)
292 #define PLIC_PRIORITY_PRIORITY109 (108UL)
293 #define PLIC_PRIORITY_PRIORITY110 (109UL)
294 #define PLIC_PRIORITY_PRIORITY111 (110UL)
295 #define PLIC_PRIORITY_PRIORITY112 (111UL)
296 #define PLIC_PRIORITY_PRIORITY113 (112UL)
297 #define PLIC_PRIORITY_PRIORITY114 (113UL)
298 #define PLIC_PRIORITY_PRIORITY115 (114UL)
299 #define PLIC_PRIORITY_PRIORITY116 (115UL)
300 #define PLIC_PRIORITY_PRIORITY117 (116UL)
301 #define PLIC_PRIORITY_PRIORITY118 (117UL)
302 #define PLIC_PRIORITY_PRIORITY119 (118UL)
303 #define PLIC_PRIORITY_PRIORITY120 (119UL)
304 #define PLIC_PRIORITY_PRIORITY121 (120UL)
305 #define PLIC_PRIORITY_PRIORITY122 (121UL)
306 #define PLIC_PRIORITY_PRIORITY123 (122UL)
307 #define PLIC_PRIORITY_PRIORITY124 (123UL)
308 #define PLIC_PRIORITY_PRIORITY125 (124UL)
309 #define PLIC_PRIORITY_PRIORITY126 (125UL)
310 #define PLIC_PRIORITY_PRIORITY127 (126UL)
311 
312 /* PENDING register group index macro definition */
313 #define PLIC_PENDING_PENDING0 (0UL)
314 #define PLIC_PENDING_PENDING1 (1UL)
315 #define PLIC_PENDING_PENDING2 (2UL)
316 #define PLIC_PENDING_PENDING3 (3UL)
317 
318 /* TRIGGER register group index macro definition */
319 #define PLIC_TRIGGER_TRIGGER0 (0UL)
320 #define PLIC_TRIGGER_TRIGGER1 (1UL)
321 #define PLIC_TRIGGER_TRIGGER2 (2UL)
322 #define PLIC_TRIGGER_TRIGGER3 (3UL)
323 
324 /* INTEN register group index macro definition */
325 #define PLIC_TARGETINT_INTEN_INTEN0 (0UL)
326 #define PLIC_TARGETINT_INTEN_INTEN1 (1UL)
327 #define PLIC_TARGETINT_INTEN_INTEN2 (2UL)
328 #define PLIC_TARGETINT_INTEN_INTEN3 (3UL)
329 
330 /* TARGETINT register group index macro definition */
331 #define PLIC_TARGETINT_TARGET0 (0UL)
332 #define PLIC_TARGETINT_TARGET1 (1UL)
333 
334 /* TARGETCONFIG register group index macro definition */
335 #define PLIC_TARGETCONFIG_TARGET0 (0UL)
336 #define PLIC_TARGETCONFIG_TARGET1 (1UL)
337 
338 
339 #endif /* HPM_PLIC_H */
340