1/* 2 * Copyright (c) 2023 HPMicro 3 * SPDX-License-Identifier: BSD-3-Clause 4 */ 5 6ENTRY(_start) 7 8STACK_SIZE = _stack_size; 9HEAP_SIZE = _heap_size; 10 11MEMORY 12{ 13 XPI0 (rx) : ORIGIN = 0x80003000, LENGTH = _flash_size - 0x3000 14 ILM (wx) : ORIGIN = 0x00000000, LENGTH = 256K 15 DLM (w) : ORIGIN = 0x00080000, LENGTH = 256K 16 AXI_SRAM (wx) : ORIGIN = 0x0120000, LENGTH = 256K 17 AXI_SRAM_NONCACHEABLE (wx) : ORIGIN = 0x01240000, LENGTH = 256K 18 AHB_SRAM (w) : ORIGIN = 0xF0400000, LENGTH = 32k 19 APB_SRAM (w): ORIGIN = 0xF4130000, LENGTH = 16k 20} 21 22SECTIONS 23{ 24 .start : { 25 . = ALIGN(8); 26 KEEP(*(.start)) 27 } > XPI0 28 29 __vector_load_addr__ = ADDR(.start) + SIZEOF(.start); 30 .vectors ORIGIN(ILM) : AT(__vector_load_addr__) { 31 . = ALIGN(8); 32 __vector_ram_start__ = .; 33 KEEP(*(.vector_table)) 34 KEEP(*(.isr_vector)) 35 . = ALIGN(8); 36 __vector_ram_end__ = .; 37 } > ILM 38 39 .text (__vector_load_addr__ + SIZEOF(.vectors)) : { 40 . = ALIGN(8); 41 *(.text) 42 *(.text*) 43 *(.rodata) 44 *(.rodata*) 45 *(.srodata) 46 *(.srodata*) 47 48 *(.hash) 49 *(.dyn*) 50 *(.gnu*) 51 *(.pl*) 52 53 KEEP (*(.init)) 54 KEEP (*(.fini)) 55 56 /* section information for usbh class */ 57 . = ALIGN(8); 58 __usbh_class_info_start__ = .; 59 KEEP(*(.usbh_class_info)) 60 __usbh_class_info_end__ = .; 61 62 /* RT-Thread related sections - Start */ 63 /* section information for finsh shell */ 64 . = ALIGN(4); 65 __fsymtab_start = .; 66 KEEP(*(FSymTab)) 67 __fsymtab_end = .; 68 . = ALIGN(4); 69 __vsymtab_start = .; 70 KEEP(*(VSymTab)) 71 __vsymtab_end = .; 72 . = ALIGN(4); 73 74 . = ALIGN(4); 75 __rt_init_start = .; 76 KEEP(*(SORT(.rti_fn*))) 77 __rt_init_end = .; 78 . = ALIGN(4); 79 80 /* section information for modules */ 81 . = ALIGN(4); 82 __rtmsymtab_start = .; 83 KEEP(*(RTMSymTab)) 84 __rtmsymtab_end = .; 85 86 /* RT-Thread related sections - end */ 87 . = ALIGN(8); 88 } > XPI0 89 90 .eh_frame : 91 { 92 __eh_frame_start = .; 93 KEEP(*(.eh_frame)) 94 __eh_frame_end = .; 95 } > XPI0 96 97 .eh_frame_hdr : 98 { 99 KEEP(*(.eh_frame_hdr)) 100 } > XPI0 101 __eh_frame_hdr_start = SIZEOF(.eh_frame_hdr) > 0 ? ADDR(.eh_frame_hdr) : 0; 102 __eh_frame_hdr_end = SIZEOF(.eh_frame_hdr) > 0 ? . : 0; 103 104 .rel : { 105 KEEP(*(.rel*)) 106 } > XPI0 107 108 PROVIDE (__etext = .); 109 PROVIDE (_etext = .); 110 PROVIDE (etext = .); 111 112 __data_load_addr__ = etext; 113 .data : AT(__data_load_addr__) { 114 . = ALIGN(8); 115 __data_start__ = .; 116 __global_pointer$ = . + 0x800; 117 *(.data) 118 *(.data*) 119 *(.sdata) 120 *(.sdata*) 121 122 KEEP(*(.jcr)) 123 KEEP(*(.dynamic)) 124 KEEP(*(.got*)) 125 KEEP(*(.got)) 126 KEEP(*(.gcc_except_table)) 127 KEEP(*(.gcc_except_table.*)) 128 129 . = ALIGN(8); 130 PROVIDE(__preinit_array_start = .); 131 KEEP(*(.preinit_array)) 132 PROVIDE(__preinit_array_end = .); 133 134 . = ALIGN(8); 135 PROVIDE(__init_array_start = .); 136 KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*))) 137 KEEP(*(.init_array)) 138 PROVIDE(__init_array_end = .); 139 140 . = ALIGN(8); 141 PROVIDE(__finit_array_start = .); 142 KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*))) 143 KEEP(*(.finit_array)) 144 PROVIDE(__finit_array_end = .); 145 146 . = ALIGN(8); 147 KEEP(*crtbegin*.o(.ctors)) 148 KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors)) 149 KEEP(*(SORT(.ctors.*))) 150 KEEP(*(.ctors)) 151 152 . = ALIGN(8); 153 KEEP(*crtbegin*.o(.dtors)) 154 KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors)) 155 KEEP(*(SORT(.dtors.*))) 156 KEEP(*(.dtors)) 157 . = ALIGN(8); 158 __data_end__ = .; 159 PROVIDE (__edata = .); 160 PROVIDE (_edata = .); 161 PROVIDE (edata = .); 162 } > AXI_SRAM 163 164 __fast_load_addr__ = etext + SIZEOF(.data); 165 .fast : AT(__fast_load_addr__) { 166 . = ALIGN(8); 167 PROVIDE(__ramfunc_start__ = .); 168 *(.fast) 169 *(.fast.*) 170 . = ALIGN(8); 171 PROVIDE(__ramfunc_end__ = .); 172 } > ILM 173 174 __tdata_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast); 175 .tdata : AT(__tdata_load_addr__) { 176 . = ALIGN(8); 177 PROVIDE(__tdata_start__ = .); 178 *(.tdata) 179 *(.tdata.*) 180 *(.gnu.linkonce.td.*) 181 . = ALIGN(8); 182 PROVIDE(__tdata_end__ = .); 183 } > AXI_SRAM 184 185 .tbss (NOLOAD) : { 186 . = ALIGN(8); 187 PROVIDE(__tbss_start__ = .); 188 __thread_pointer$ = .; 189 *(.tbss) 190 *(.tbss.*) 191 *(.gnu.linkonce.tb.*) 192 *(.tcommon) 193 . = ALIGN(8); 194 PROVIDE(__tbss_end__ = .); 195 } > AXI_SRAM 196 197 __noncacheable_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata); 198 .noncacheable.init : AT(__noncacheable_init_load_addr__) { 199 . = ALIGN(8); 200 __noncacheable_init_start__ = .; 201 KEEP(*(.noncacheable.init)) 202 __noncacheable_init_end__ = .; 203 . = ALIGN(8); 204 } > AXI_SRAM_NONCACHEABLE 205 206 __fast_ram_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init); 207 .fast_ram.init : AT(__fast_ram_init_load_addr__) { 208 . = ALIGN(8); 209 __fast_ram_init_start__ = .; 210 KEEP(*(.fast_ram.init)) 211 __fast_ram_init_end__ = .; 212 . = ALIGN(8); 213 } > DLM 214 215 .bss (NOLOAD) : { 216 . = ALIGN(8); 217 __bss_start__ = .; 218 *(.bss) 219 *(.bss*) 220 *(.sbss*) 221 *(.scommon) 222 *(.scommon*) 223 *(.dynsbss*) 224 *(COMMON) 225 . = ALIGN(8); 226 _end = .; 227 __bss_end__ = .; 228 } > AXI_SRAM 229 230 .framebuffer (NOLOAD) : { 231 . = ALIGN(8); 232 KEEP(*(.framebuffer)) 233 . = ALIGN(8); 234 } > AXI_SRAM 235 236 .noncacheable.bss (NOLOAD) : { 237 . = ALIGN(8); 238 KEEP(*(.noncacheable)) 239 __noncacheable_bss_start__ = .; 240 KEEP(*(.noncacheable.bss)) 241 __noncacheable_bss_end__ = .; 242 . = ALIGN(8); 243 } > AXI_SRAM_NONCACHEABLE 244 245 .ahb_sram (NOLOAD) : { 246 KEEP(*(.ahb_sram)) 247 } > AHB_SRAM 248 249 .apb_sram (NOLOAD) : { 250 KEEP(*(.backup_sram)) 251 } > APB_SRAM 252 253 .fast_ram.bss (NOLOAD) : { 254 . = ALIGN(8); 255 KEEP(*(.fast_ram)) 256 __fast_ram_bss_start__ = .; 257 KEEP(*(.fast_ram.bss)) 258 __fast_ram_bss_end__ = .; 259 . = ALIGN(8); 260 } > DLM 261 262 .heap (NOLOAD) : { 263 . = ALIGN(8); 264 __heap_start__ = .; 265 . += HEAP_SIZE; 266 __heap_end__ = .; 267 } > DLM 268 269 .stack (NOLOAD) : { 270 . = ALIGN(16); 271 __stack_base__ = .; 272 . += STACK_SIZE; 273 . = ALIGN(16); 274 PROVIDE (_stack = .); 275 PROVIDE (_stack_safe = .); 276 } > DLM 277 278 __noncacheable_start__ = ORIGIN(AXI_SRAM_NONCACHEABLE); 279 __noncacheable_end__ = ORIGIN(AXI_SRAM_NONCACHEABLE) + LENGTH(AXI_SRAM_NONCACHEABLE); 280 281 __fw_size__ = SIZEOF(.start) + SIZEOF(.vectors) + SIZEOF(.rel) + SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init) + SIZEOF(.fast_ram.init); 282 __last_addr__ = __fast_ram_init_load_addr__ + SIZEOF(.fast_ram.init); 283 ASSERT(((__fw_size__ <= LENGTH(XPI0)) && (__last_addr__ <= (ORIGIN(XPI0) + LENGTH(XPI0)))), "****** FAILED! XPI0 has not enough space! ******") 284} 285