1/*
2 * Copyright (c) 2021-2023 HPMicro
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 *
6 */
7#include "hpm_csr_regs.h"
8
9    .section .start, "ax"
10
11    .global _start
12    .type _start,@function
13
14_start:
15    /* Initialize global pointer */
16    .option push
17    .option norelax
18    la gp, __global_pointer$
19    .option pop
20
21    /* reset mstatus to 0*/
22    csrrw x0, mstatus, x0
23
24#ifdef __riscv_flen
25    /* Enable FPU */
26    li t0, CSR_MSTATUS_FS_MASK
27    csrrs t0, mstatus, t0
28
29    /* Initialize FCSR */
30    fscsr zero
31#endif
32
33#ifdef INIT_EXT_RAM_FOR_DATA
34    la t0, _stack_safe
35    mv sp, t0
36    call _init_ext_ram
37#endif
38
39    /* Initialize stack pointer */
40    la t0, _stack
41    mv sp, t0
42
43#ifdef CONFIG_NOT_ENABLE_ICACHE
44    call l1c_ic_disable
45#else
46    call l1c_ic_enable
47#endif
48#ifdef CONFIG_NOT_ENABLE_DCACHE
49    call l1c_dc_invalidate_all
50    call l1c_dc_disable
51#else
52    call l1c_dc_enable
53    call l1c_dc_invalidate_all
54#endif
55
56    /*
57     * Initialize LMA/VMA sections.
58     * Relocation for any sections that need to be copied from LMA to VMA.
59     */
60    call c_startup
61
62#if defined(__SES_RISCV)
63    /* Initialize the heap */
64    la a0, __heap_start__
65    la a1, __heap_end__
66    sub a1, a1, a0
67    la t1, __SEGGER_RTL_init_heap
68    jalr t1
69#endif
70
71    /* Do global constructors */
72    call __libc_init_array
73
74#ifndef NO_CLEANUP_AT_START
75    /* clean up */
76    call _clean_up
77#endif
78
79#ifdef __nds_execit
80    /* Initialize EXEC.IT table */
81    la t0, _ITB_BASE_
82    csrw uitb, t0
83#endif
84
85#if defined(CONFIG_FREERTOS) && CONFIG_FREERTOS
86    #define HANDLER_TRAP freertos_risc_v_trap_handler
87    #define HANDLER_S_TRAP freertos_risc_v_trap_handler
88
89    /* Use mscratch to store isr level */
90    csrw mscratch, 0
91#elif defined(CONFIG_UCOS_III) && CONFIG_UCOS_III
92    #define HANDLER_TRAP ucos_risc_v_trap_handler
93    #define HANDLER_S_TRAP ucos_risc_v_trap_handler
94
95    /* Use mscratch to store isr level */
96    csrw mscratch, 0
97#elif defined(CONFIG_THREADX) && CONFIG_THREADX
98    #define HANDLER_TRAP tx_risc_v_trap_handler
99    #define HANDLER_S_TRAP tx_risc_v_trap_handler
100
101    /* Use mscratch to store isr level */
102    csrw mscratch, 0
103
104#elif defined(CONFIG_RTTHREAD) && CONFIG_RTTHREAD
105    #define HANDLER_TRAP rtt_risc_v_trap_handler
106    #define HANDLER_S_TRAP rtt_risc_v_trap_handler
107
108    /* Use mscratch to store isr level */
109    csrw mscratch, 0
110
111#else
112    #define HANDLER_TRAP irq_handler_trap
113    #define HANDLER_S_TRAP irq_handler_s_trap
114#endif
115
116#if !defined(USE_NONVECTOR_MODE) || (USE_NONVECTOR_MODE == 0)
117    /* Initial machine trap-vector Base */
118    la t0, __vector_table
119    csrw mtvec, t0
120
121#if defined (USE_S_MODE_IRQ)
122    la t0, __vector_s_table
123    csrw stvec, t0
124#endif
125    /* Enable vectored external PLIC interrupt */
126    csrsi CSR_MMISC_CTL, 2
127#else
128    /* Initial machine trap-vector Base */
129    la t0, HANDLER_TRAP
130    csrw mtvec, t0
131#if defined (USE_S_MODE_IRQ)
132    la t0, HANDLER_S_TRAP
133    csrw stvec, t0
134#endif
135
136    /* Disable vectored external PLIC interrupt */
137    csrci CSR_MMISC_CTL, 2
138#endif
139
140    /* System reset handler */
141    call reset_handler
142
143    /* Infinite loop, if returned accidentally */
1441:    j 1b
145
146    .weak exit
147exit:
1481:    j 1b
149
150    .section .isr_vector, "ax"
151    .weak nmi_handler
152nmi_handler:
1531:    j 1b
154
155#include "../vectors.h"
156