1/*
2 * Copyright (c) 2022-2023 HPMicro
3 * SPDX-License-Identifier: BSD-3-Clause
4 */
5
6ENTRY(_start)
7
8STACK_SIZE = _stack_size;
9HEAP_SIZE = _heap_size;
10
11MEMORY
12{
13    XPI0 (rx) : ORIGIN = 0x80000000, LENGTH = _flash_size
14    ILM (wx) : ORIGIN = 0x00000000, LENGTH = 256K
15    DLM (w) : ORIGIN = 0x00200000, LENGTH = 256K
16    AXI_SRAM (wx) : ORIGIN = 0x01200000, LENGTH = 512K
17    AXI_SRAM_NONCACHEABLE (wx) : ORIGIN = 0x01280000, LENGTH = 256K
18    SHARE_RAM (w) : ORIGIN = 0x012FC000, LENGTH = 16K
19    AHB_SRAM (w) : ORIGIN = 0xF0200000, LENGTH = 32k
20}
21
22__nor_cfg_option_load_addr__ = ORIGIN(XPI0) + 0x400;
23__boot_header_load_addr__ = ORIGIN(XPI0) + 0x1000;
24__app_load_addr__ = ORIGIN(XPI0) + 0x3000;
25__boot_header_length__ = __boot_header_end__ - __boot_header_start__;
26__app_offset__ = __app_load_addr__ - __boot_header_load_addr__;
27
28
29SECTIONS
30{
31    .nor_cfg_option __nor_cfg_option_load_addr__ : {
32        KEEP(*(.nor_cfg_option))
33    } > XPI0
34
35    .boot_header __boot_header_load_addr__ : {
36        __boot_header_start__ = .;
37        KEEP(*(.boot_header))
38        KEEP(*(.fw_info_table))
39        KEEP(*(.dc_info))
40        __boot_header_end__ = .;
41    } > XPI0
42
43    .start __app_load_addr__ : {
44        . = ALIGN(8);
45        KEEP(*(.start))
46    } > XPI0
47
48    __vector_load_addr__ = ADDR(.start) + SIZEOF(.start);
49    .vectors ORIGIN(ILM) : AT(__vector_load_addr__) {
50        . = ALIGN(8);
51        __vector_ram_start__ = .;
52        KEEP(*(.vector_table))
53        KEEP(*(.isr_vector))
54        KEEP(*(.vector_s_table))
55        KEEP(*(.isr_s_vector))
56        . = ALIGN(8);
57        __vector_ram_end__ = .;
58    } > ILM
59
60    .text (__vector_load_addr__ + SIZEOF(.vectors)) : {
61        . = ALIGN(8);
62        *(.text)
63        *(.text*)
64        *(.rodata)
65        *(.rodata*)
66        *(.srodata)
67        *(.srodata*)
68
69        *(.hash)
70        *(.dyn*)
71        *(.gnu*)
72        *(.pl*)
73
74        KEEP (*(.init))
75        KEEP (*(.fini))
76
77        /* section information for usbh class */
78        . = ALIGN(8);
79        __usbh_class_info_start__ = .;
80        KEEP(*(.usbh_class_info))
81        __usbh_class_info_end__ = .;
82
83        /* RT-Thread related sections - Start */
84        /* section information for finsh shell */
85        . = ALIGN(4);
86        __fsymtab_start = .;
87        KEEP(*(FSymTab))
88        __fsymtab_end = .;
89        . = ALIGN(4);
90        __vsymtab_start = .;
91        KEEP(*(VSymTab))
92        __vsymtab_end = .;
93        . = ALIGN(4);
94
95        . = ALIGN(4);
96        __rt_init_start = .;
97        KEEP(*(SORT(.rti_fn*)))
98        __rt_init_end = .;
99        . = ALIGN(4);
100
101        /* section information for modules */
102        . = ALIGN(4);
103        __rtmsymtab_start = .;
104        KEEP(*(RTMSymTab))
105        __rtmsymtab_end = .;
106
107        /* RT-Thread related sections - end */
108        . = ALIGN(8);
109    } > XPI0
110
111    .eh_frame :
112    {
113        __eh_frame_start = .;
114        KEEP(*(.eh_frame))
115        __eh_frame_end = .;
116    }  > XPI0
117
118    .eh_frame_hdr :
119    {
120        KEEP(*(.eh_frame_hdr))
121    }  > XPI0
122    __eh_frame_hdr_start = SIZEOF(.eh_frame_hdr) > 0 ? ADDR(.eh_frame_hdr) : 0;
123    __eh_frame_hdr_end = SIZEOF(.eh_frame_hdr) > 0 ? . : 0;
124
125    .rel : {
126        KEEP(*(.rel*))
127    } > XPI0
128
129    PROVIDE (__etext = .);
130    PROVIDE (_etext = .);
131    PROVIDE (etext = .);
132
133    __data_load_addr__ = etext;
134    .data : AT(__data_load_addr__) {
135        . = ALIGN(8);
136        __data_start__ = .;
137        __global_pointer$ = . + 0x800;
138        *(.data)
139        *(.data*)
140        *(.sdata)
141        *(.sdata*)
142
143        KEEP(*(.jcr))
144        KEEP(*(.dynamic))
145        KEEP(*(.got*))
146        KEEP(*(.got))
147        KEEP(*(.gcc_except_table))
148        KEEP(*(.gcc_except_table.*))
149
150        . = ALIGN(8);
151        PROVIDE(__preinit_array_start = .);
152        KEEP(*(.preinit_array))
153        PROVIDE(__preinit_array_end = .);
154
155        . = ALIGN(8);
156        PROVIDE(__init_array_start = .);
157        KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*)))
158        KEEP(*(.init_array))
159        PROVIDE(__init_array_end = .);
160
161        . = ALIGN(8);
162        PROVIDE(__finit_array_start = .);
163        KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*)))
164        KEEP(*(.finit_array))
165        PROVIDE(__finit_array_end = .);
166
167        . = ALIGN(8);
168        KEEP(*crtbegin*.o(.ctors))
169        KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors))
170        KEEP(*(SORT(.ctors.*)))
171        KEEP(*(.ctors))
172
173        . = ALIGN(8);
174        KEEP(*crtbegin*.o(.dtors))
175        KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors))
176        KEEP(*(SORT(.dtors.*)))
177        KEEP(*(.dtors))
178        . = ALIGN(8);
179        __data_end__ = .;
180        PROVIDE (__edata = .);
181        PROVIDE (_edata = .);
182        PROVIDE (edata = .);
183    } > AXI_SRAM
184
185    __fast_load_addr__ = etext + SIZEOF(.data);
186    .fast : AT(__fast_load_addr__) {
187        . = ALIGN(8);
188        PROVIDE(__ramfunc_start__ = .);
189        *(.fast)
190        *(.fast.*)
191        . = ALIGN(8);
192        PROVIDE(__ramfunc_end__ = .);
193    } > ILM
194
195    __tdata_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast);
196    .tdata : AT(__tdata_load_addr__) {
197        . = ALIGN(8);
198        PROVIDE(__tdata_start__ = .);
199        *(.tdata)
200        *(.tdata.*)
201        *(.gnu.linkonce.td.*)
202        . = ALIGN(8);
203        PROVIDE(__tdata_end__ = .);
204    } > AXI_SRAM
205
206    .tbss (NOLOAD) : {
207        . = ALIGN(8);
208        PROVIDE(__tbss_start__ = .);
209        __thread_pointer$ = .;
210        *(.tbss)
211        *(.tbss.*)
212        *(.gnu.linkonce.tb.*)
213        *(.tcommon)
214        . = ALIGN(8);
215        PROVIDE(__tbss_end__ = .);
216    } > AXI_SRAM
217
218    __noncacheable_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata);
219    .noncacheable.init : AT(__noncacheable_init_load_addr__) {
220        . = ALIGN(8);
221        __noncacheable_init_start__ = .;
222        KEEP(*(.noncacheable.init))
223        __noncacheable_init_end__ = .;
224        . = ALIGN(8);
225    } > AXI_SRAM_NONCACHEABLE
226
227    __fast_ram_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init);
228    .fast_ram.init : AT(__fast_ram_init_load_addr__) {
229        . = ALIGN(8);
230        __fast_ram_init_start__ = .;
231        KEEP(*(.fast_ram.init))
232        __fast_ram_init_end__ = .;
233        . = ALIGN(8);
234    } > DLM
235
236    .bss (NOLOAD) : {
237        . = ALIGN(8);
238        __bss_start__ = .;
239        *(.bss)
240        *(.bss*)
241        *(.sbss*)
242        *(.scommon)
243        *(.scommon*)
244        *(.dynsbss*)
245        *(COMMON)
246        . = ALIGN(8);
247        _end = .;
248        __bss_end__ = .;
249    } > AXI_SRAM
250
251    .framebuffer (NOLOAD) : {
252        . = ALIGN(8);
253        KEEP(*(.framebuffer))
254        . = ALIGN(8);
255    } > AXI_SRAM
256
257    .noncacheable.bss (NOLOAD) : {
258        . = ALIGN(8);
259        KEEP(*(.noncacheable))
260        __noncacheable_bss_start__ = .;
261        KEEP(*(.noncacheable.bss))
262        __noncacheable_bss_end__ = .;
263        . = ALIGN(8);
264    } > AXI_SRAM_NONCACHEABLE
265
266    .sh_mem (NOLOAD) : {
267        KEEP(*(.sh_mem))
268    } > SHARE_RAM
269
270    .ahb_sram (NOLOAD) : {
271        KEEP(*(.ahb_sram))
272    } > AHB_SRAM
273
274    .fast_ram.bss (NOLOAD) : {
275        . = ALIGN(8);
276        KEEP(*(.fast_ram))
277        __fast_ram_bss_start__ = .;
278        KEEP(*(.fast_ram.bss))
279        __fast_ram_bss_end__ = .;
280        . = ALIGN(8);
281    } > DLM
282
283    .heap (NOLOAD) : {
284        . = ALIGN(8);
285        __heap_start__ = .;
286        . += HEAP_SIZE;
287        __heap_end__ = .;
288    } > DLM
289
290    .stack (NOLOAD) : {
291        . = ALIGN(16);
292        __stack_base__ = .;
293        . += STACK_SIZE;
294        . = ALIGN(16);
295        PROVIDE (_stack = .);
296        PROVIDE (_stack_safe = .);
297    } > DLM
298
299    __noncacheable_start__ = ORIGIN(AXI_SRAM_NONCACHEABLE);
300    __noncacheable_end__ = ORIGIN(AXI_SRAM_NONCACHEABLE) + LENGTH(AXI_SRAM_NONCACHEABLE);
301    __share_mem_start__ = ORIGIN(SHARE_RAM);
302    __share_mem_end__ = ORIGIN(SHARE_RAM) + LENGTH(SHARE_RAM);
303
304    __fw_size__ = SIZEOF(.start) + SIZEOF(.vectors) + SIZEOF(.rel) + SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init) + SIZEOF(.fast_ram.init);
305    __last_addr__ = __fast_ram_init_load_addr__ + SIZEOF(.fast_ram.init);
306    ASSERT(((__fw_size__ <= LENGTH(XPI0)) && (__last_addr__ <= (ORIGIN(XPI0) + LENGTH(XPI0)))), "******  FAILED! XPI0 has not enough space!  ******")
307}
308