1/* 2 * Copyright (c) 2024 HPMicro 3 * SPDX-License-Identifier: BSD-3-Clause 4 */ 5 6ENTRY(_start) 7 8STACK_SIZE = _stack_size; 9HEAP_SIZE = _heap_size; 10 11MEMORY 12{ 13 ILM (wx) : ORIGIN = 0x00000000, LENGTH = 256K 14 DLM (w) : ORIGIN = 0x00200000, LENGTH = 256K 15 AXI_SRAM (wx) : ORIGIN = 0x01200000, LENGTH = 512K 16 AXI_SRAM_NONCACHEABLE (wx) : ORIGIN = 0x01280000, LENGTH = 256K 17 SHARE_RAM (w) : ORIGIN = 0x012FC000, LENGTH = 16K 18 AHB_SRAM (w) : ORIGIN = 0xF0200000, LENGTH = 32k 19} 20 21SECTIONS 22{ 23 .start : { 24 . = ALIGN(8); 25 KEEP(*(.start)) 26 } > ILM 27 28 .vectors : { 29 . = ALIGN(8); 30 KEEP(*(.isr_vector)) 31 KEEP(*(.vector_table)) 32 KEEP(*(.isr_s_vector)) 33 KEEP(*(.vector_s_table)) 34 . = ALIGN(8); 35 } > ILM 36 37 .rel : { 38 KEEP(*(.rel*)) 39 } > ILM 40 41 .text : { 42 . = ALIGN(8); 43 *(.text) 44 *(.text*) 45 *(.rodata) 46 *(.rodata*) 47 *(.srodata) 48 *(.srodata*) 49 50 *(.hash) 51 *(.dyn*) 52 *(.gnu*) 53 *(.pl*) 54 55 KEEP (*(.init)) 56 KEEP (*(.fini)) 57 58 /* section information for usbh class */ 59 . = ALIGN(8); 60 __usbh_class_info_start__ = .; 61 KEEP(*(.usbh_class_info)) 62 __usbh_class_info_end__ = .; 63 64 /* RT-Thread related sections - Start */ 65 /* section information for finsh shell */ 66 . = ALIGN(4); 67 __fsymtab_start = .; 68 KEEP(*(FSymTab)) 69 __fsymtab_end = .; 70 . = ALIGN(4); 71 __vsymtab_start = .; 72 KEEP(*(VSymTab)) 73 __vsymtab_end = .; 74 . = ALIGN(4); 75 76 . = ALIGN(4); 77 __rt_init_start = .; 78 KEEP(*(SORT(.rti_fn*))) 79 __rt_init_end = .; 80 . = ALIGN(4); 81 82 /* section information for modules */ 83 . = ALIGN(4); 84 __rtmsymtab_start = .; 85 KEEP(*(RTMSymTab)) 86 __rtmsymtab_end = .; 87 88 /* RT-Thread related sections - end */ 89 90 . = ALIGN(8); 91 } > ILM 92 93 .eh_frame : 94 { 95 __eh_frame_start = .; 96 KEEP(*(.eh_frame)) 97 __eh_frame_end = .; 98 } > ILM 99 100 .eh_frame_hdr : 101 { 102 KEEP(*(.eh_frame_hdr)) 103 } > ILM 104 __eh_frame_hdr_start = SIZEOF(.eh_frame_hdr) > 0 ? ADDR(.eh_frame_hdr) : 0; 105 __eh_frame_hdr_end = SIZEOF(.eh_frame_hdr) > 0 ? . : 0; 106 107 PROVIDE (__etext = .); 108 PROVIDE (_etext = .); 109 PROVIDE (etext = .); 110 111 __data_load_addr__ = etext; 112 .data : AT(__data_load_addr__) { 113 . = ALIGN(8); 114 __data_start__ = .; 115 __global_pointer$ = . + 0x800; 116 *(.data) 117 *(.data*) 118 *(.sdata) 119 *(.sdata*) 120 121 KEEP(*(.jcr)) 122 KEEP(*(.dynamic)) 123 KEEP(*(.got*)) 124 KEEP(*(.got)) 125 KEEP(*(.gcc_except_table)) 126 KEEP(*(.gcc_except_table.*)) 127 128 . = ALIGN(8); 129 PROVIDE(__preinit_array_start = .); 130 KEEP(*(.preinit_array)) 131 PROVIDE(__preinit_array_end = .); 132 133 . = ALIGN(8); 134 PROVIDE(__init_array_start = .); 135 KEEP(*(SORT_BY_INIT_PRIORITY(.init_array.*))) 136 KEEP(*(.init_array)) 137 PROVIDE(__init_array_end = .); 138 139 . = ALIGN(8); 140 PROVIDE(__finit_array_start = .); 141 KEEP(*(SORT_BY_INIT_PRIORITY(.finit_array.*))) 142 KEEP(*(.finit_array)) 143 PROVIDE(__finit_array_end = .); 144 145 . = ALIGN(8); 146 KEEP(*crtbegin*.o(.ctors)) 147 KEEP(*(EXCLUDE_FILE (*crtend*.o) .ctors)) 148 KEEP(*(SORT(.ctors.*))) 149 KEEP(*(.ctors)) 150 151 . = ALIGN(8); 152 KEEP(*crtbegin*.o(.dtors)) 153 KEEP(*(EXCLUDE_FILE (*crtend*.o) .dtors)) 154 KEEP(*(SORT(.dtors.*))) 155 KEEP(*(.dtors)) 156 157 . = ALIGN(8); 158 __data_end__ = .; 159 PROVIDE (__edata = .); 160 PROVIDE (_edata = .); 161 PROVIDE (edata = .); 162 } > AXI_SRAM 163 164 __fast_load_addr__ = etext + SIZEOF(.data); 165 .fast : AT(__fast_load_addr__) { 166 . = ALIGN(8); 167 PROVIDE(__ramfunc_start__ = .); 168 *(.fast) 169 *(.fast.*) 170 . = ALIGN(8); 171 PROVIDE(__ramfunc_end__ = .); 172 } > ILM 173 174 __tdata_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast); 175 .tdata : AT(__tdata_load_addr__) { 176 . = ALIGN(8); 177 PROVIDE(__tdata_start__ = .); 178 *(.tdata) 179 *(.tdata.*) 180 *(.gnu.linkonce.td.*) 181 . = ALIGN(8); 182 PROVIDE(__tdata_end__ = .); 183 } > AXI_SRAM 184 185 .tbss (NOLOAD) : { 186 . = ALIGN(8); 187 PROVIDE(__tbss_start__ = .); 188 __thread_pointer$ = .; 189 *(.tbss) 190 *(.tbss.*) 191 *(.gnu.linkonce.tb.*) 192 *(.tcommon) 193 . = ALIGN(8); 194 PROVIDE(__tbss_end__ = .); 195 } > AXI_SRAM 196 197 __noncacheable_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata); 198 .noncacheable.init : AT(__noncacheable_init_load_addr__) { 199 . = ALIGN(8); 200 __noncacheable_init_start__ = .; 201 KEEP(*(.noncacheable.init)) 202 __noncacheable_init_end__ = .; 203 . = ALIGN(8); 204 } > AXI_SRAM_NONCACHEABLE 205 206 __fast_ram_init_load_addr__ = etext + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init); 207 .fast_ram.init : AT(__fast_ram_init_load_addr__) { 208 . = ALIGN(8); 209 __fast_ram_init_start__ = .; 210 KEEP(*(.fast_ram.init)) 211 __fast_ram_init_end__ = .; 212 . = ALIGN(8); 213 } > DLM 214 215 .bss (NOLOAD) : { 216 . = ALIGN(8); 217 __bss_start__ = .; 218 *(.bss) 219 *(.bss*) 220 *(.sbss*) 221 *(.scommon) 222 *(.scommon*) 223 *(.dynsbss*) 224 *(COMMON) 225 . = ALIGN(8); 226 _end = .; 227 __bss_end__ = .; 228 } > AXI_SRAM 229 230 .framebuffer (NOLOAD) : { 231 . = ALIGN(8); 232 KEEP(*(.framebuffer)) 233 . = ALIGN(8); 234 } > AXI_SRAM 235 236 .noncacheable.bss (NOLOAD) : { 237 . = ALIGN(8); 238 KEEP(*(.noncacheable)) 239 __noncacheable_bss_start__ = .; 240 KEEP(*(.noncacheable.bss)) 241 __noncacheable_bss_end__ = .; 242 . = ALIGN(8); 243 } > AXI_SRAM_NONCACHEABLE 244 245 .sh_mem (NOLOAD) : { 246 KEEP(*(.sh_mem)) 247 } > SHARE_RAM 248 249 .ahb_sram (NOLOAD) : { 250 KEEP(*(.ahb_sram)) 251 } > AHB_SRAM 252 253 .fast_ram.bss (NOLOAD) : { 254 . = ALIGN(8); 255 KEEP(*(.fast_ram)) 256 __fast_ram_bss_start__ = .; 257 KEEP(*(.fast_ram.bss)) 258 __fast_ram_bss_end__ = .; 259 . = ALIGN(8); 260 } > DLM 261 262 .heap (NOLOAD) : { 263 . = ALIGN(8); 264 __heap_start__ = .; 265 . += HEAP_SIZE; 266 __heap_end__ = .; 267 } > DLM 268 269 .stack (NOLOAD) : { 270 . = ALIGN(16); 271 __stack_base__ = .; 272 . += STACK_SIZE; 273 . = ALIGN(16); 274 PROVIDE (_stack = .); 275 PROVIDE (_stack_safe = .); 276 } > DLM 277 278 __noncacheable_start__ = ORIGIN(AXI_SRAM_NONCACHEABLE); 279 __noncacheable_end__ = ORIGIN(AXI_SRAM_NONCACHEABLE) + LENGTH(AXI_SRAM_NONCACHEABLE); 280 __share_mem_start__ = ORIGIN(SHARE_RAM); 281 __share_mem_end__ = ORIGIN(SHARE_RAM) + LENGTH(SHARE_RAM); 282 283 __fw_size__ = SIZEOF(.start) + SIZEOF(.vectors) + SIZEOF(.rel) + SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.fast) + SIZEOF(.tdata) + SIZEOF(.noncacheable.init) + SIZEOF(.fast_ram.init); 284 __last_addr__ = __fast_ram_init_load_addr__ + SIZEOF(.fast_ram.init); 285 ASSERT(((__fw_size__ <= LENGTH(ILM)) && (__last_addr__ <= (ORIGIN(ILM) + LENGTH(ILM)))), "****** FAILED! ILM has not enough space! ******") 286} 287