1 /*********************************************************************************************************//** 2 * @file IP/Example/ht32f1xxxx_01_usbdconf.h 3 * @version $Rev:: 1090 $ 4 * @date $Date:: 2018-01-29 #$ 5 * @brief The configuration file of USB Device Driver. 6 ************************************************************************************************************* 7 * @attention 8 * 9 * Firmware Disclaimer Information 10 * 11 * 1. The customer hereby acknowledges and agrees that the program technical documentation, including the 12 * code, which is supplied by Holtek Semiconductor Inc., (hereinafter referred to as "HOLTEK") is the 13 * proprietary and confidential intellectual property of HOLTEK, and is protected by copyright law and 14 * other intellectual property laws. 15 * 16 * 2. The customer hereby acknowledges and agrees that the program technical documentation, including the 17 * code, is confidential information belonging to HOLTEK, and must not be disclosed to any third parties 18 * other than HOLTEK and the customer. 19 * 20 * 3. The program technical documentation, including the code, is provided "as is" and for customer reference 21 * only. After delivery by HOLTEK, the customer shall use the program technical documentation, including 22 * the code, at their own risk. HOLTEK disclaims any expressed, implied or statutory warranties, including 23 * the warranties of merchantability, satisfactory quality and fitness for a particular purpose. 24 * 25 * <h2><center>Copyright (C) Holtek Semiconductor Inc. All rights reserved</center></h2> 26 ************************************************************************************************************/ 27 // <<< Use Configuration Wizard in Context Menu >>> 28 29 /* Define to prevent recursive inclusion -------------------------------------------------------------------*/ 30 #ifndef __HT32F1XXXX_01_USBDCONF_H 31 #define __HT32F1XXXX_01_USBDCONF_H 32 33 // <e0> Enter Low Power mode when Suspended 34 #define USBDCORE_ENABLE_LOW_POWER (0) 35 // </e> 36 37 #if (USBDCORE_ENABLE_LOW_POWER == 1) 38 #define USBDCore_LowPower() PWRCU_DeepSleep1(PWRCU_SLEEP_ENTRY_WFE) 39 #else 40 #define USBDCore_LowPower(...) 41 #endif 42 43 /*----------------------------------------------------------------------------------------------------------*/ 44 /* USB Interrupt Enable */ 45 /*----------------------------------------------------------------------------------------------------------*/ 46 // <h> USB Interrupt Setting (UIER) 47 // <o0.0> USB Global Interrupt Enable (UGIE) (Default) 48 // <o0.1> Start Of Frame Interrupt Enable (SOFIE) 49 // <o0.2> USB Reset Interrupt Enable (URSTIE) (Default) 50 // <o0.3> Resume Interrupt Enable (RSMIE) (Default) 51 // <o0.4> Suspend Interrupt Enable (SUSPIE) (Default) 52 // <o0.5> Expected Start of Frame Interrupt Enable (ESOFE) 53 // <o0.8> Control Endpoint Interrupt Enable (EP0IE) (Default) 54 // <o0.9> Endpoint1 Interrupt Enable (EP1IE) 55 // <o0.10> Endpoint2 Interrupt Enable (EP2IE) 56 // <o0.11> Endpoint3 Interrupt Enable (EP3IE) 57 // <o0.12> Endpoint4 Interrupt Enable (EP4IE) 58 // <o0.13> Endpoint5 Interrupt Enable (EP5IE) 59 // <o0.14> Endpoint6 Interrupt Enable (EP6IE) 60 // <o0.15> Endpoint7 Interrupt Enable (EP7IE) 61 #define _UIER (0xFF1D) 62 // </h> 63 64 65 /*----------------------------------------------------------------------------------------------------------*/ 66 /* Endpoint0 Configuration Setting */ 67 /*----------------------------------------------------------------------------------------------------------*/ 68 // <h> Control Endpoint0 Configuration 69 // <o0> Endpoint Buffer Length (EPLEN) 70 // <8=> 8 bytes 71 // <16=> 16 bytes 72 // <32=> 32 bytes 73 // <64=> 64 bytes 74 /* Maximum: 64 Bytes */ 75 #define _EP0LEN (64) 76 77 78 // <h> Control Endpoint0 Interrupt Enable Settings (EP0IER) 79 // <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE) 80 // <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE) (Default) 81 // <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE) 82 // <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE) 83 // <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE) (Default) 84 // <o0.5> NAK Transmitted Interrupt Enable (NAKIE) 85 // <o0.6> STALL Transmitted Interrupt Enable (STLIE) 86 // <o0.7> USB Error Interrupt Enable (UERIE) 87 // <o0.8> SETUP Token Packet Received Interrupt Enable (STRXIE) 88 // <o0.9> SETUP Data Packet Received Interrupt Enable (SDRXIE) (Default) 89 // <o0.10> SETUP Data Error Interrupt Enable (SDERIE) 90 // <o0.11> Zero Length Data Packet Received Interrupt Enable (ZLRXIE) 91 #define _EP0_IER (0x212) 92 // </h> 93 // </h> 94 95 /*----------------------------------------------------------------------------------------------------------*/ 96 /* Endpoint1 Configuration Setting */ 97 /*----------------------------------------------------------------------------------------------------------*/ 98 // <e0> Endpoint1 Configuration 99 #define _EP1_ENABLE (1) 100 101 // <o0> Endpoint Address (EPADR) 102 // <1=> 1 103 // <2=> 2 104 // <3=> 3 105 // <4=> 4 106 // <5=> 5 107 // <6=> 6 108 // <7=> 7 109 #define _EP1_CFG_EPADR (1) 110 111 // <o0.0> Endpoint Enable (EPEN) 112 #define _EP1_CFG_EPEN_TMP (1) 113 114 // <o0> Endpoint Transfer Type 115 // <2=> Bulk 116 // <3=> Interrupt 117 #define _EP1_TYPR (2) 118 119 // <o0> Endpoint Direction (EPDIR) 120 // <1=> IN 121 // <0=> OUT 122 #define _EP1_CFG_EPDIR (1) 123 124 // <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-64:4> 125 /* Maximum: 64 Bytes */ 126 #define _EP1LEN_TMP (64) 127 128 // <h> Endpoint Interrupt Enable Settings (EPIER) 129 // <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1> 130 // <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE) 131 // <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE) 132 // <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE) 133 // <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE) 134 // <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE) 135 // <o0.5> NAK Transmitted Interrupt Enable (NAKIE) 136 // <o0.6> STALL Transmitted Interrupt Enable (STLIE) 137 // <o0.7> USB Error Interrupt Enable (UERIE) 138 #define _EP1_IER (0x12) 139 // </h> 140 // </e> 141 142 143 /*----------------------------------------------------------------------------------------------------------*/ 144 /* Endpoint2 Configuration Setting */ 145 /*----------------------------------------------------------------------------------------------------------*/ 146 // <e0> Endpoint2 Configuration 147 #define _EP2_ENABLE (1) 148 149 // <o0> Endpoint Address (EPADR) 150 // <1=> 1 151 // <2=> 2 152 // <3=> 3 153 // <4=> 4 154 // <5=> 5 155 // <6=> 6 156 // <7=> 7 157 #define _EP2_CFG_EPADR (2) 158 159 // <o0.0> Endpoint Enable (EPEN) 160 #define _EP2_CFG_EPEN_TMP (1) 161 162 // <o0> Endpoint Transfer Type 163 // <2=> Bulk 164 // <3=> Interrupt 165 #define _EP2_TYPR (2) 166 167 // <o0> Endpoint Direction (EPDIR) 168 // <1=> IN 169 // <0=> OUT 170 #define _EP2_CFG_EPDIR (0) 171 172 // <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-64:4> 173 /* Maximum: 64 Bytes */ 174 #define _EP2LEN_TMP (64) 175 176 // <h> Endpoint Interrupt Enable Settings (EPIER) 177 // <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1> 178 // <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE) 179 // <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE) 180 // <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE) 181 // <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE) 182 // <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE) 183 // <o0.5> NAK Transmitted Interrupt Enable (NAKIE) 184 // <o0.6> STALL Transmitted Interrupt Enable (STLIE) 185 // <o0.7> USB Error Interrupt Enable (UERIE) 186 #define _EP2_IER (0x012) 187 // </h> 188 // </e> 189 190 /*----------------------------------------------------------------------------------------------------------*/ 191 /* Endpoint3 Configuration Setting */ 192 /*----------------------------------------------------------------------------------------------------------*/ 193 // <e0> Endpoint3 Configuration 194 #define _EP3_ENABLE (1) 195 196 // <o0> Endpoint Address (EPADR) 197 // <1=> 1 198 // <2=> 2 199 // <3=> 3 200 // <4=> 4 201 // <5=> 5 202 // <6=> 6 203 // <7=> 7 204 #define _EP3_CFG_EPADR (3) 205 206 // <o0.0> Endpoint Enable (EPEN) 207 #define _EP3_CFG_EPEN_TMP (1) 208 209 // <o0> Endpoint Transfer Type 210 // <2=> Bulk 211 // <3=> Interrupt 212 #define _EP3_TYPR (3) 213 214 // <o0> Endpoint Direction (EPDIR) 215 // <1=> IN 216 // <0=> OUT 217 #define _EP3_CFG_EPDIR (1) 218 219 // <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-64:4> 220 /* Maximum: 64 Bytes */ 221 #define _EP3LEN_TMP (64) 222 223 // <h> Endpoint Interrupt Enable Settings (EPIER) 224 // <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1> 225 // <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE) 226 // <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE) 227 // <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE) 228 // <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE) 229 // <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE) 230 // <o0.5> NAK Transmitted Interrupt Enable (NAKIE) 231 // <o0.6> STALL Transmitted Interrupt Enable (STLIE) 232 // <o0.7> USB Error Interrupt Enable (UERIE) 233 #define _EP3_IER (0x12) 234 // </h> 235 // </e> 236 237 /*----------------------------------------------------------------------------------------------------------*/ 238 /* Endpoint4 Configuration Setting */ 239 /*----------------------------------------------------------------------------------------------------------*/ 240 // <e0> Endpoint4 Configuration 241 #define _EP4_ENABLE (1) 242 243 // <o0> Endpoint Address (EPADR) 244 // <1=> 1 245 // <2=> 2 246 // <3=> 3 247 // <4=> 4 248 // <5=> 5 249 // <6=> 6 250 // <7=> 7 251 #define _EP4_CFG_EPADR (4) 252 253 // <o0.0> Endpoint Enable (EPEN) 254 #define _EP4_CFG_EPEN_TMP (1) 255 256 // <o0> Endpoint Transfer Type 257 // <1=> Isochronous 258 // <2=> Bulk 259 // <3=> Interrupt 260 #define _EP4_TYPR (3) 261 262 // <o0> Endpoint Direction (EPDIR) 263 // <1=> IN 264 // <0=> OUT 265 #define _EP4_CFG_EPDIR (0) 266 267 // <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-1000:4> 268 /* Maximum: 1000 Bytes */ 269 #define _EP4LEN_TMP (64) 270 271 // <o0> Single/Double Buffer Selection (SDBS) 272 // <0=> Single Buffer 273 // <1=> Double Buffer 274 #define _EP4_CFG_SDBS (0) 275 276 // <h> Endpoint Interrupt Enable Settings (EPIER) 277 // <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1> 278 // <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE) 279 // <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE) 280 // <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE) 281 // <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE) 282 // <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE) 283 // <o0.5> NAK Transmitted Interrupt Enable (NAKIE) 284 // <o0.6> STALL Transmitted Interrupt Enable (STLIE) 285 // <o0.7> USB Error Interrupt Enable (UERIE) 286 #define _EP4_IER (0x12) 287 // </h> 288 // </e> 289 290 291 /*----------------------------------------------------------------------------------------------------------*/ 292 /* Endpoint5 Configuration Setting */ 293 /*----------------------------------------------------------------------------------------------------------*/ 294 // <e0> Endpoint5 Configuration 295 #define _EP5_ENABLE (1) 296 297 // <o0> Endpoint Address (EPADR) 298 // <1=> 1 299 // <2=> 2 300 // <3=> 3 301 // <4=> 4 302 // <5=> 5 303 // <6=> 6 304 // <7=> 7 305 #define _EP5_CFG_EPADR (5) 306 307 // <o0.0> Endpoint Enable (EPEN) 308 #define _EP5_CFG_EPEN_TMP (1) 309 310 // <o0> Endpoint Transfer Type 311 // <1=> Isochronous 312 // <2=> Bulk 313 // <3=> Interrupt 314 #define _EP5_TYPR (1) 315 316 // <o0> Endpoint Direction (EPDIR) 317 // <1=> IN 318 // <0=> OUT 319 #define _EP5_CFG_EPDIR (1) 320 321 // <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-1000:4> 322 /* Maximum: 1000 Bytes */ 323 #define _EP5LEN_TMP (64) 324 325 326 // <o0> Single/Double Buffer Selection (SDBS) 327 // <0=> Single Buffer 328 // <1=> Double Buffer 329 #define _EP5_CFG_SDBS (0) 330 331 // <h> Endpoint Interrupt Enable Settings (EPIER) 332 // <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1> 333 // <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE) 334 // <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE) 335 // <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE) 336 // <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE) 337 // <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE) 338 // <o0.5> NAK Transmitted Interrupt Enable (NAKIE) 339 // <o0.6> STALL Transmitted Interrupt Enable (STLIE) 340 // <o0.7> USB Error Interrupt Enable (UERIE) 341 #define _EP5_IER (0x12) 342 // </h> 343 // </e> 344 345 346 /*----------------------------------------------------------------------------------------------------------*/ 347 /* Endpoint6 Configuration Setting */ 348 /*----------------------------------------------------------------------------------------------------------*/ 349 // <e0> Endpoint6 Configuration 350 #define _EP6_ENABLE (1) 351 352 // <o0> Endpoint Address (EPADR) 353 // <1=> 1 354 // <2=> 2 355 // <3=> 3 356 // <4=> 4 357 // <5=> 5 358 // <6=> 6 359 // <7=> 7 360 #define _EP6_CFG_EPADR (6) 361 362 // <o0.0> Endpoint Enable (EPEN) 363 #define _EP6_CFG_EPEN_TMP (1) 364 365 // <o0> Endpoint Transfer Type 366 // <1=> Isochronous 367 // <2=> Bulk 368 // <3=> Interrupt 369 #define _EP6_TYPR (1) 370 371 // <o0> Endpoint Direction (EPDIR) 372 // <1=> IN 373 // <0=> OUT 374 #define _EP6_CFG_EPDIR (0) 375 376 // <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-1000:4> 377 /* Maximum: 1000 Bytes */ 378 #define _EP6LEN_TMP (64) 379 380 // <o0> Single/Double Buffer Selection (SDBS) 381 // <0=> Single Buffer 382 // <1=> Double Buffer 383 #define _EP6_CFG_SDBS (0) 384 385 // <h> Endpoint Interrupt Enable Settings (EPIER) 386 // <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1> 387 // <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE) 388 // <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE) 389 // <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE) 390 // <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE) 391 // <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE) 392 // <o0.5> NAK Transmitted Interrupt Enable (NAKIE) 393 // <o0.6> STALL Transmitted Interrupt Enable (STLIE) 394 // <o0.7> USB Error Interrupt Enable (UERIE) 395 #define _EP6_IER (0x12) 396 // </h> 397 // </e> 398 399 400 /*----------------------------------------------------------------------------------------------------------*/ 401 /* Endpoint7 Configuration Setting */ 402 /*----------------------------------------------------------------------------------------------------------*/ 403 // <e0> Endpoint7 Configuration 404 #define _EP7_ENABLE (1) 405 406 // <o0> Endpoint Address (EPADR) 407 // <1=> 1 408 // <2=> 2 409 // <3=> 3 410 // <4=> 4 411 // <5=> 5 412 // <6=> 6 413 // <7=> 7 414 #define _EP7_CFG_EPADR (7) 415 416 // <o0.0> Endpoint Enable (EPEN) 417 #define _EP7_CFG_EPEN_TMP (1) 418 419 // <o0> Endpoint Transfer Type 420 // <1=> Isochronous 421 // <2=> Bulk 422 // <3=> Interrupt 423 #define _EP7_TYPR (3) 424 425 // <o0> Endpoint Direction (EPDIR) 426 // <1=> IN 427 // <0=> OUT 428 #define _EP7_CFG_EPDIR (1) 429 430 // <o0> Endpoint Buffer Length (EPLEN) (in byte) <4-1000:4> 431 /* Maximum: 1000 Bytes */ 432 #define _EP7LEN_TMP (64) 433 434 // <o0> Single/Double Buffer Selection (SDBS) 435 // <0=> Single Buffer 436 // <1=> Double Buffer 437 #define _EP7_CFG_SDBS (0) 438 439 // <h> Endpoint Interrupt Enable Settings (EPIER) 440 // <o0> Endpoint Interrupt Enable Settings (EPIER) <0x0-0xFF:1> 441 // <o0.0> OUT Token Packet Received Interrupt Enable (OTRXIE) 442 // <o0.1> OUT Data Packet Received Interrupt Enable (ODRXIE) 443 // <o0.2> OUT Data Buffer Overrun Interrupt Enable (ODOVIE) 444 // <o0.3> IN Token Packet Received Interrupt Enable (ITRXIE) 445 // <o0.4> IN Data Packet Transmitted Interrupt Enable (IDTXIE) 446 // <o0.5> NAK Transmitted Interrupt Enable (NAKIE) 447 // <o0.6> STALL Transmitted Interrupt Enable (STLIE) 448 // <o0.7> USB Error Interrupt Enable (UERIE) 449 #define _EP7_IER (0x12) 450 // </h> 451 // </e> 452 453 #endif 454