1 /* Copyright (c) 2023, Canaan Bright Sight Co., Ltd
2  *
3  * Redistribution and use in source and binary forms, with or without
4  * modification, are permitted provided that the following conditions are met:
5  * 1. Redistributions of source code must retain the above copyright
6  * notice, this list of conditions and the following disclaimer.
7  * 2. Redistributions in binary form must reproduce the above copyright
8  * notice, this list of conditions and the following disclaimer in the
9  * documentation and/or other materials provided with the distribution.
10  *
11  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
12  * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
13  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
14  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
15  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
16  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
17  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
18  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
19  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
20  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
21  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
22  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
23  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24  */
25 
26 /*
27  * Copyright (c) 2006-2025 RT-Thread Development Team
28  *
29  * SPDX-License-Identifier: Apache-2.0
30  */
31 
32 #ifndef __DRV_ADC__
33 #define __DRV_ADC__
34 #include "board.h"
35 
36 #define K230_ADC_NAME       "adc"
37 
38 #define ADC_MAX_CHANNEL     6
39 #define ADC_MAX_DMA_CHN     3
40 
41 struct k230_adc_regs
42 {
43     rt_uint32_t trim_reg;                       /**< 0x00 */
44     rt_uint32_t cfg_reg;                        /**< 0x04 */
45     rt_uint32_t mode_reg;                       /**< 0x08 */
46     rt_uint32_t thsd_reg;                       /**< 0x0c */
47     rt_uint32_t dma_intr_reg;                   /**< 0x10 */
48     rt_uint32_t data_reg[ADC_MAX_CHANNEL];      /**< 0x14~0x28 */
49     rt_uint32_t data_dma[ADC_MAX_DMA_CHN];      /**< 0x2c~0x34 */
50 };
51 
52 struct k230_adc_chan
53 {
54     rt_uint32_t chn_num;
55     rt_int8_t enabled;
56 };
57 
58 struct k230_adc
59 {
60     struct rt_adc_device dev;
61     struct k230_adc_regs *adc_regs;
62     struct k230_adc_chan chn[ADC_MAX_CHANNEL];
63 };
64 
65 #endif /*__DRV_ADC__*/