1 //*****************************************************************************
2 //
3 // hw_sysexc.h - Macros used when accessing the system exception module.
4 //
5 // Copyright (c) 2011 Texas Instruments Incorporated.  All rights reserved.
6 // Software License Agreement
7 //
8 // Texas Instruments (TI) is supplying this software for use solely and
9 // exclusively on TI's microcontroller products. The software is owned by
10 // TI and/or its suppliers, and is protected under applicable copyright
11 // laws. You may not combine this software with "viral" open-source
12 // software in order to form a larger program.
13 //
14 // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
15 // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
16 // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
17 // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
18 // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
19 // DAMAGES, FOR ANY REASON WHATSOEVER.
20 //
21 // This is part of revision 8264 of the Stellaris Firmware Development Package.
22 //
23 //*****************************************************************************
24 
25 #ifndef __HW_SYSEXC_H__
26 #define __HW_SYSEXC_H__
27 
28 //*****************************************************************************
29 //
30 // The following are defines for the System Exception Module register
31 // addresses.
32 //
33 //*****************************************************************************
34 #define SYSEXC_RIS              0x400F9000  // System Exception Raw Interrupt
35                                             // Status
36 #define SYSEXC_IM               0x400F9004  // System Exception Interrupt Mask
37 #define SYSEXC_MIS              0x400F9008  // System Exception Raw Interrupt
38                                             // Status
39 #define SYSEXC_IC               0x400F900C  // System Exception Interrupt Clear
40 
41 //*****************************************************************************
42 //
43 // The following are defines for the bit fields in the SYSEXC_RIS register.
44 //
45 //*****************************************************************************
46 #define SYSEXC_RIS_IXCRIS       0x00000020  // Inexact Exception Flag
47 #define SYSEXC_RIS_OFCRIS       0x00000010  // Overflow Exception Flag
48 #define SYSEXC_RIS_UFCRIS       0x00000008  // Underflow Exception Flag
49 #define SYSEXC_RIS_IOCRIS       0x00000004  // Invalid Operation Flag
50 #define SYSEXC_RIS_DZCRIS       0x00000002  // Divide By 0 Exception Flag
51 #define SYSEXC_RIS_IDCRIS       0x00000001  // Input Denormal Exception Flag
52 
53 //*****************************************************************************
54 //
55 // The following are defines for the bit fields in the SYSEXC_IM register.
56 //
57 //*****************************************************************************
58 #define SYSEXC_IM_IXCIM         0x00000020  // Inexact Exception Flag
59 #define SYSEXC_IM_OFCIM         0x00000010  // Overflow Exception Flag
60 #define SYSEXC_IM_UFCIM         0x00000008  // Underflow Exception Flag
61 #define SYSEXC_IM_IOCIM         0x00000004  // Invalid Operation Flag
62 #define SYSEXC_IM_DZCIM         0x00000002  // Divide By 0 Exception Flag
63 #define SYSEXC_IM_IDCIM         0x00000001  // Input Denormal Exception Flag
64 
65 //*****************************************************************************
66 //
67 // The following are defines for the bit fields in the SYSEXC_MIS register.
68 //
69 //*****************************************************************************
70 #define SYSEXC_MIS_IXCMIS       0x00000020  // Inexact Exception Flag
71 #define SYSEXC_MIS_OFCMIS       0x00000010  // Overflow Exception Flag
72 #define SYSEXC_MIS_UFCMIS       0x00000008  // Underflow Exception Flag
73 #define SYSEXC_MIS_IOCMIS       0x00000004  // Invalid Operation Flag
74 #define SYSEXC_MIS_DZCMIS       0x00000002  // Divide By 0 Exception Flag
75 #define SYSEXC_MIS_IDCMIS       0x00000001  // Input Denormal Exception Flag
76 
77 //*****************************************************************************
78 //
79 // The following are defines for the bit fields in the SYSEXC_IC register.
80 //
81 //*****************************************************************************
82 #define SYSEXC_IC_IXCIC         0x00000020  // Inexact Exception Flag
83 #define SYSEXC_IC_OFCIC         0x00000010  // Overflow Exception Flag
84 #define SYSEXC_IC_UFCIC         0x00000008  // Underflow Exception Flag
85 #define SYSEXC_IC_IOCIC         0x00000004  // Invalid Operation Flag
86 #define SYSEXC_IC_DZCIC         0x00000002  // Divide By 0 Exception Flag
87 #define SYSEXC_IC_IDCIC         0x00000001  // Input Denormal Exception Flag
88 
89 #endif // __HW_SYSEXC_H__
90