1 //*****************************************************************************
2 //
3 // startup_ewarm.c - Startup code for use with IAR's Embedded Workbench,
4 // version 5.
5 //
6 // Copyright (c) 2011 Texas Instruments Incorporated. All rights reserved.
7 // Software License Agreement
8 //
9 // Texas Instruments (TI) is supplying this software for use solely and
10 // exclusively on TI's microcontroller products. The software is owned by
11 // TI and/or its suppliers, and is protected under applicable copyright
12 // laws. You may not combine this software with "viral" open-source
13 // software in order to form a larger program.
14 //
15 // THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
16 // NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
17 // NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18 // A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
19 // CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
20 // DAMAGES, FOR ANY REASON WHATSOEVER.
21 //
22 // This is part of revision 8049 of the EK-LM4F232 Firmware Package.
23 //
24 //*****************************************************************************
25
26 //*****************************************************************************
27 //
28 // Enable the IAR extensions for this source file.
29 //
30 //*****************************************************************************
31 #pragma language=extended
32
33 //*****************************************************************************
34 //
35 // Forward declaration of the default fault handlers.
36 //
37 //*****************************************************************************
38 static void NmiSR(void);
39 static void FaultISR(void);
40 static void IntDefaultHandler(void);
41
42 //*****************************************************************************
43 //
44 // The entry point for the application startup code.
45 //
46 //*****************************************************************************
47 extern void __iar_program_start(void);
48
49 //*****************************************************************************
50 //
51 // Reserve space for the system stack.
52 //
53 //*****************************************************************************
54 static unsigned long pulStack[256] @ ".noinit";
55
56 //*****************************************************************************
57 //
58 // A union that describes the entries of the vector table. The union is needed
59 // since the first entry is the stack pointer and the remainder are function
60 // pointers.
61 //
62 //*****************************************************************************
63 typedef union
64 {
65 void (*pfnHandler)(void);
66 unsigned long ulPtr;
67 }
68 uVectorEntry;
69
70 //*****************************************************************************
71 //
72 // The vector table. Note that the proper constructs must be placed on this to
73 // ensure that it ends up at physical address 0x0000.0000.
74 //
75 //*****************************************************************************
76 __root const uVectorEntry __vector_table[] @ ".intvec" =
77 {
78 { .ulPtr = (unsigned long)pulStack + sizeof(pulStack) },
79 // The initial stack pointer
80 __iar_program_start, // The reset handler
81 NmiSR, // The NMI handler
82 FaultISR, // The hard fault handler
83 IntDefaultHandler, // The MPU fault handler
84 IntDefaultHandler, // The bus fault handler
85 IntDefaultHandler, // The usage fault handler
86 0, // Reserved
87 0, // Reserved
88 0, // Reserved
89 0, // Reserved
90 IntDefaultHandler, // SVCall handler
91 IntDefaultHandler, // Debug monitor handler
92 0, // Reserved
93 IntDefaultHandler, // The PendSV handler
94 IntDefaultHandler, // The SysTick handler
95 IntDefaultHandler, // GPIO Port A
96 IntDefaultHandler, // GPIO Port B
97 IntDefaultHandler, // GPIO Port C
98 IntDefaultHandler, // GPIO Port D
99 IntDefaultHandler, // GPIO Port E
100 IntDefaultHandler, // UART0 Rx and Tx
101 IntDefaultHandler, // UART1 Rx and Tx
102 IntDefaultHandler, // SSI0 Rx and Tx
103 IntDefaultHandler, // I2C0 Master and Slave
104 IntDefaultHandler, // PWM Fault
105 IntDefaultHandler, // PWM Generator 0
106 IntDefaultHandler, // PWM Generator 1
107 IntDefaultHandler, // PWM Generator 2
108 IntDefaultHandler, // Quadrature Encoder 0
109 IntDefaultHandler, // ADC Sequence 0
110 IntDefaultHandler, // ADC Sequence 1
111 IntDefaultHandler, // ADC Sequence 2
112 IntDefaultHandler, // ADC Sequence 3
113 IntDefaultHandler, // Watchdog timer
114 IntDefaultHandler, // Timer 0 subtimer A
115 IntDefaultHandler, // Timer 0 subtimer B
116 IntDefaultHandler, // Timer 1 subtimer A
117 IntDefaultHandler, // Timer 1 subtimer B
118 IntDefaultHandler, // Timer 2 subtimer A
119 IntDefaultHandler, // Timer 2 subtimer B
120 IntDefaultHandler, // Analog Comparator 0
121 IntDefaultHandler, // Analog Comparator 1
122 IntDefaultHandler, // Analog Comparator 2
123 IntDefaultHandler, // System Control (PLL, OSC, BO)
124 IntDefaultHandler, // FLASH Control
125 IntDefaultHandler, // GPIO Port F
126 IntDefaultHandler, // GPIO Port G
127 IntDefaultHandler, // GPIO Port H
128 IntDefaultHandler, // UART2 Rx and Tx
129 IntDefaultHandler, // SSI1 Rx and Tx
130 IntDefaultHandler, // Timer 3 subtimer A
131 IntDefaultHandler, // Timer 3 subtimer B
132 IntDefaultHandler, // I2C1 Master and Slave
133 IntDefaultHandler, // Quadrature Encoder 1
134 IntDefaultHandler, // CAN0
135 IntDefaultHandler, // CAN1
136 IntDefaultHandler, // CAN2
137 IntDefaultHandler, // Ethernet
138 IntDefaultHandler, // Hibernate
139 IntDefaultHandler, // USB0
140 IntDefaultHandler, // PWM Generator 3
141 IntDefaultHandler, // uDMA Software Transfer
142 IntDefaultHandler, // uDMA Error
143 IntDefaultHandler, // ADC1 Sequence 0
144 IntDefaultHandler, // ADC1 Sequence 1
145 IntDefaultHandler, // ADC1 Sequence 2
146 IntDefaultHandler, // ADC1 Sequence 3
147 IntDefaultHandler, // I2S0
148 IntDefaultHandler, // External Bus Interface 0
149 IntDefaultHandler, // GPIO Port J
150 IntDefaultHandler, // GPIO Port K
151 IntDefaultHandler, // GPIO Port L
152 IntDefaultHandler, // SSI2 Rx and Tx
153 IntDefaultHandler, // SSI3 Rx and Tx
154 IntDefaultHandler, // UART3 Rx and Tx
155 IntDefaultHandler, // UART4 Rx and Tx
156 IntDefaultHandler, // UART5 Rx and Tx
157 IntDefaultHandler, // UART6 Rx and Tx
158 IntDefaultHandler, // UART7 Rx and Tx
159 0, // Reserved
160 0, // Reserved
161 0, // Reserved
162 0, // Reserved
163 IntDefaultHandler, // I2C2 Master and Slave
164 IntDefaultHandler, // I2C3 Master and Slave
165 IntDefaultHandler, // Timer 4 subtimer A
166 IntDefaultHandler, // Timer 4 subtimer B
167 0, // Reserved
168 0, // Reserved
169 0, // Reserved
170 0, // Reserved
171 0, // Reserved
172 0, // Reserved
173 0, // Reserved
174 0, // Reserved
175 0, // Reserved
176 0, // Reserved
177 0, // Reserved
178 0, // Reserved
179 0, // Reserved
180 0, // Reserved
181 0, // Reserved
182 0, // Reserved
183 0, // Reserved
184 0, // Reserved
185 0, // Reserved
186 0, // Reserved
187 IntDefaultHandler, // Timer 5 subtimer A
188 IntDefaultHandler, // Timer 5 subtimer B
189 IntDefaultHandler, // Wide Timer 0 subtimer A
190 IntDefaultHandler, // Wide Timer 0 subtimer B
191 IntDefaultHandler, // Wide Timer 1 subtimer A
192 IntDefaultHandler, // Wide Timer 1 subtimer B
193 IntDefaultHandler, // Wide Timer 2 subtimer A
194 IntDefaultHandler, // Wide Timer 2 subtimer B
195 IntDefaultHandler, // Wide Timer 3 subtimer A
196 IntDefaultHandler, // Wide Timer 3 subtimer B
197 IntDefaultHandler, // Wide Timer 4 subtimer A
198 IntDefaultHandler, // Wide Timer 4 subtimer B
199 IntDefaultHandler, // Wide Timer 5 subtimer A
200 IntDefaultHandler, // Wide Timer 5 subtimer B
201 IntDefaultHandler, // FPU
202 IntDefaultHandler, // PECI 0
203 IntDefaultHandler, // LPC 0
204 IntDefaultHandler, // I2C4 Master and Slave
205 IntDefaultHandler, // I2C5 Master and Slave
206 IntDefaultHandler, // GPIO Port M
207 IntDefaultHandler, // GPIO Port N
208 IntDefaultHandler, // Quadrature Encoder 2
209 IntDefaultHandler, // Fan 0
210 0, // Reserved
211 IntDefaultHandler, // GPIO Port P (Summary or P0)
212 IntDefaultHandler, // GPIO Port P1
213 IntDefaultHandler, // GPIO Port P2
214 IntDefaultHandler, // GPIO Port P3
215 IntDefaultHandler, // GPIO Port P4
216 IntDefaultHandler, // GPIO Port P5
217 IntDefaultHandler, // GPIO Port P6
218 IntDefaultHandler, // GPIO Port P7
219 IntDefaultHandler, // GPIO Port Q (Summary or Q0)
220 IntDefaultHandler, // GPIO Port Q1
221 IntDefaultHandler, // GPIO Port Q2
222 IntDefaultHandler, // GPIO Port Q3
223 IntDefaultHandler, // GPIO Port Q4
224 IntDefaultHandler, // GPIO Port Q5
225 IntDefaultHandler, // GPIO Port Q6
226 IntDefaultHandler, // GPIO Port Q7
227 IntDefaultHandler, // GPIO Port R
228 IntDefaultHandler, // GPIO Port S
229 IntDefaultHandler, // PWM 1 Generator 0
230 IntDefaultHandler, // PWM 1 Generator 1
231 IntDefaultHandler, // PWM 1 Generator 2
232 IntDefaultHandler, // PWM 1 Generator 3
233 IntDefaultHandler // PWM 1 Fault
234 };
235
236 //*****************************************************************************
237 //
238 // This is the code that gets called when the processor receives a NMI. This
239 // simply enters an infinite loop, preserving the system state for examination
240 // by a debugger.
241 //
242 //*****************************************************************************
243 static void
NmiSR(void)244 NmiSR(void)
245 {
246 //
247 // Enter an infinite loop.
248 //
249 while(1)
250 {
251 }
252 }
253
254 //*****************************************************************************
255 //
256 // This is the code that gets called when the processor receives a fault
257 // interrupt. This simply enters an infinite loop, preserving the system state
258 // for examination by a debugger.
259 //
260 //*****************************************************************************
261 static void
FaultISR(void)262 FaultISR(void)
263 {
264 //
265 // Enter an infinite loop.
266 //
267 while(1)
268 {
269 }
270 }
271
272 //*****************************************************************************
273 //
274 // This is the code that gets called when the processor receives an unexpected
275 // interrupt. This simply enters an infinite loop, preserving the system state
276 // for examination by a debugger.
277 //
278 //*****************************************************************************
279 static void
IntDefaultHandler(void)280 IntDefaultHandler(void)
281 {
282 //
283 // Go into an infinite loop.
284 //
285 while(1)
286 {
287 }
288 }
289