1 /*
2  * Copyright (c) 2006-2018, RT-Thread Development Team
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  *
6  * Change Logs:
7  * Date           Author       Notes
8  * 2017-09-06     勤为本       first version
9  * 2021-02-02     michael5hzg@gmail.com       adapt to ls1b
10  */
11 
12 // 龙芯1b外设寄存器
13 
14 
15 #ifndef __LOONGSON_LS1B_REGS_H
16 #define __LOONGSON_LS1B_REGS_H
17 
18 
19 
20 
21 // 时钟相关寄存器地址
22 #define LS1B_START_FREQ                     (0xbfe78030)
23 #define LS1B_CLK_DIV_PARAM                  (0xbfe78034)
24 
25 
26 // gpio相关寄存器地址
27 #define LS1B_GPIO_CFG0                      (0xbfd010c0)
28 #define LS1B_GPIO_EN0                       (0xbfd010d0)
29 #define LS1B_GPIO_IN0                       (0xbfd010e0)
30 #define LS1B_GPIO_OUT0                      (0xbfd010f0)
31 
32 #define LS1B_GPIO_CFG1                      (0xbfd010c4)
33 #define LS1B_GPIO_EN1                       (0xbfd010d4)
34 #define LS1B_GPIO_IN1                       (0xbfd010e4)
35 #define LS1B_GPIO_OUT1                      (0xbfd010f4)
36 
37 
38 
39 // 复用相关寄存器
40 #define LS1B_CBUS_FIRST0                    (0xbfd011c0)
41 #define LS1B_CBUS_SECOND0                   (0xbfd011d0)
42 #define LS1B_CBUS_THIRD0                    (0xbfd011e0)
43 #define LS1B_CBUS_FOURTH0                   (0xbfd011f0)
44 #define LS1B_CBUS_FIFTH0                    (0xbfd01200)
45 
46 #define LS1B_CBUS_FIRST1                    (0xbfd011c4)
47 #define LS1B_CBUS_SECOND1                   (0xbfd011d4)
48 #define LS1B_CBUS_THIRD1                    (0xbfd011e4)
49 #define LS1B_CBUS_FOURTH1                   (0xbfd011f4)
50 #define LS1B_CBUS_FIFTH1                    (0xbfd01204)
51 
52 #define LS1B_CBUS_FIRST2                    (0xbfd011c8)
53 #define LS1B_CBUS_SECOND2                   (0xbfd011d8)
54 #define LS1B_CBUS_THIRD2                    (0xbfd011e8)
55 #define LS1B_CBUS_FOURTH2                   (0xbfd011f8)
56 #define LS1B_CBUS_FIFTH2                    (0xbfd01208)
57 
58 #define LS1B_CBUS_FIRST3                    (0xbfd011cc)
59 #define LS1B_CBUS_SECOND3                   (0xbfd011dc)
60 #define LS1B_CBUS_THIRD3                    (0xbfd011ec)
61 #define LS1B_CBUS_FOURTH3                   (0xbfd011fc)
62 #define LS1B_CBUS_FIFTH3                    (0xbfd0120c)
63 
64 
65 // PWM寄存器偏移
66 #define LS1B_PWM_CNTR                       (0x0)
67 #define LS1B_PWM_HRC                        (0x4)
68 #define LS1B_PWM_LRC                        (0x8)
69 #define LS1B_PWM_CTRL                       (0xC)
70 // PWM基地址
71 #define LS1B_REG_BASE_PWM0                  (0xbfe5c000)
72 #define LS1B_REG_BASE_PWM1                  (0xbfe5c010)
73 #define LS1B_REG_BASE_PWM2                  (0xbfe5c020)
74 #define LS1B_REG_BASE_PWM3                  (0xbfe5c030)
75 
76 //CAN基地址
77 #define  LS1B_REG_BASE_CAN0				    (0xbfe50000)
78 #define  LS1B_REG_BASE_CAN1					(0xbfe54000)
79 
80 // 中断配置寄存器
81 #define LS1B_INT0_SR                        (0xbfd01040)
82 #define LS1B_INT0_EN                        (0xbfd01044)
83 #define LS1B_INT0_SET                       (0xbfd01048)
84 #define LS1B_INT0_CLR                       (0xbfd0104c)
85 #define LS1B_INT0_POL                       (0xbfd01050)
86 #define LS1B_INT0_EDGE                      (0xbfd01054)
87 
88 #define LS1B_INT1_SR                        (0xbfd01058)
89 #define LS1B_INT1_EN                        (0xbfd0105c)
90 #define LS1B_INT1_SET                       (0xbfd01060)
91 #define LS1B_INT1_CLR                       (0xbfd01064)
92 #define LS1B_INT1_POL                       (0xbfd01068)
93 #define LS1B_INT1_EDGE                      (0xbfd0106c)
94 
95 #define LS1B_INT2_SR                        (0xbfd01070)
96 #define LS1B_INT2_EN                        (0xbfd01074)
97 #define LS1B_INT2_SET                       (0xbfd01078)
98 #define LS1B_INT2_CLR                       (0xbfd0107c)
99 #define LS1B_INT2_POL                       (0xbfd01080)
100 #define LS1B_INT2_EDGE                      (0xbfd01084)
101 
102 #define LS1B_INT3_SR                        (0xbfd01088)
103 #define LS1B_INT3_EN                        (0xbfd0108c)
104 #define LS1B_INT3_SET                       (0xbfd01090)
105 #define LS1B_INT3_CLR                       (0xbfd01094)
106 #define LS1B_INT3_POL                       (0xbfd01098)
107 #define LS1B_INT3_EDGE                      (0xbfd0109c)
108 
109 #define LS1B_INT4_SR                        (0xbfd010a0)
110 #define LS1B_INT4_EN                        (0xbfd010a4)
111 #define LS1B_INT4_SET                       (0xbfd010a8)
112 #define LS1B_INT4_CLR                       (0xbfd010ac)
113 #define LS1B_INT4_POL                       (0xbfd010b0)
114 #define LS1B_INT4_EDGE                      (0xbfd010b4)
115 
116 
117 // I2C寄存器
118 #define LS1B_I2C0_BASE                      (0xbfe58000)
119 #define LS1B_I2C1_BASE                      (0xbfe68000)
120 #define LS1B_I2C2_BASE                      (0xbfe70000)
121 
122 
123 // SPI寄存器
124 #define LS1B_SPI0_BASE                      (0xbfe80000)
125 #define LS1B_SPI1_BASE                      (0xbfec0000)
126 
127 
128 // 串口寄存器
129 #define LS1B_UART00_BASE                    (0xbfe40000)
130 #define LS1B_UART01_BASE                    (0xbfe41000)
131 #define LS1B_UART1_BASE                     (0xbfe44000)
132 #define LS1B_UART2_BASE                     (0xbfe48000)
133 #define LS1B_UART3_BASE                     (0xbfe4c000)
134 #define LS1B_UART4_BASE                     (0xbfe6c000)
135 #define LS1B_UART5_BASE                     (0xbfe7c000)
136 #define LS1B_UART6_BASE                     (0xbfe41000)
137 #define LS1B_UART7_BASE                     (0xbfe42000)
138 #define LS1B_UART8_BASE                     (0xbfe43000)
139 #define LS1B_UART9_BASE                     (0xbfe45000)
140 #define LS1B_UART10_BASE                    (0xbfe46000)
141 #define LS1B_UART11_BASE                    (0xbfe47000)
142 
143 //RTC寄存器
144 #define LS1B_RTC_BASE                       (0xbfe64024)
145 
146 
147 #endif
148 
149