1 /* 2 * Copyright (c) 2006-2022, RT-Thread Development Team 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 * 6 * Change Logs: 7 * Date Author Notes 8 * 2017-08-24 chinesebear first version 9 */ 10 11 12 #ifndef __MII_H__ 13 #define __MII_H__ 14 /* Generic MII registers. */ 15 16 #include "synopGMAC_types.h" 17 18 #define MII_BMCR 0x00 /* Basic mode control register */ 19 #define MII_BMSR 0x01 /* Basic mode status register */ 20 #define MII_PHYSID1 0x02 /* PHYS ID 1 */ 21 #define MII_PHYSID2 0x03 /* PHYS ID 2 */ 22 #define MII_ADVERTISE 0x04 /* Advertisement control reg */ 23 #define MII_LPA 0x05 /* Link partner ability reg */ 24 #define MII_EXPANSION 0x06 /* Expansion register */ 25 #define MII_CTRL1000 0x09 /* 1000BASE-T control */ 26 #define MII_STAT1000 0x0a /* 1000BASE-T status */ 27 #define MII_ESTATUS 0x0f /* Extended Status */ 28 #define MII_DCOUNTER 0x12 /* Disconnect counter */ 29 #define MII_FCSCOUNTER 0x13 /* False carrier counter */ 30 #define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */ 31 #define MII_RERRCOUNTER 0x15 /* Receive error counter */ 32 #define MII_SREVISION 0x16 /* Silicon revision */ 33 #define MII_RESV1 0x17 /* Reserved... */ 34 #define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */ 35 #define MII_PHYADDR 0x19 /* PHY address */ 36 #define MII_RESV2 0x1a /* Reserved... */ 37 #define MII_TPISTATUS 0x1b /* TPI status for 10mbps */ 38 #define MII_NCONFIG 0x1c /* Network interface config */ 39 40 /* Basic mode control register. */ 41 #define BMCR_RESV 0x003f /* Unused... */ 42 #define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */ 43 #define BMCR_CTST 0x0080 /* Collision test */ 44 #define BMCR_FULLDPLX 0x0100 /* Full duplex */ 45 #define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */ 46 #define BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */ 47 #define BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */ 48 #define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */ 49 #define BMCR_SPEED100 0x2000 /* Select 100Mbps */ 50 #define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */ 51 #define BMCR_RESET 0x8000 /* Reset the DP83840 */ 52 53 /* Basic mode status register. */ 54 #define BMSR_ERCAP 0x0001 /* Ext-reg capability */ 55 #define BMSR_JCD 0x0002 /* Jabber detected */ 56 #define BMSR_LSTATUS 0x0004 /* Link status */ 57 #define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */ 58 #define BMSR_RFAULT 0x0010 /* Remote fault detected */ 59 #define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */ 60 #define BMSR_RESV 0x00c0 /* Unused... */ 61 #define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */ 62 #define BMSR_100FULL2 0x0200 /* Can do 100BASE-T2 HDX */ 63 #define BMSR_100HALF2 0x0400 /* Can do 100BASE-T2 FDX */ 64 #define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */ 65 #define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */ 66 #define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */ 67 #define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */ 68 #define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */ 69 70 /* Advertisement control register. */ 71 #define ADVERTISE_SLCT 0x001f /* Selector bits */ 72 #define ADVERTISE_CSMA 0x0001 /* Only selector supported */ 73 #define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */ 74 #define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */ 75 #define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */ 76 #define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */ 77 #define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ 78 #define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */ 79 #define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ 80 #define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */ 81 #define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */ 82 #define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */ 83 #define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */ 84 #define ADVERTISE_RESV 0x1000 /* Unused... */ 85 #define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */ 86 #define ADVERTISE_LPACK 0x4000 /* Ack link partners response */ 87 #define ADVERTISE_NPAGE 0x8000 /* Next page bit */ 88 89 #define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \ 90 ADVERTISE_CSMA) 91 #define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \ 92 ADVERTISE_100HALF | ADVERTISE_100FULL) 93 94 /* Indicates what features are advertised by the interface. */ 95 #define ADVERTISED_10baseT_Half (1 << 0) 96 #define ADVERTISED_10baseT_Full (1 << 1) 97 #define ADVERTISED_100baseT_Half (1 << 2) 98 #define ADVERTISED_100baseT_Full (1 << 3) 99 #define ADVERTISED_1000baseT_Half (1 << 4) 100 #define ADVERTISED_1000baseT_Full (1 << 5) 101 #define ADVERTISED_Autoneg (1 << 6) 102 #define ADVERTISED_TP (1 << 7) 103 #define ADVERTISED_AUI (1 << 8) 104 #define ADVERTISED_MII (1 << 9) 105 #define ADVERTISED_FIBRE (1 << 10) 106 #define ADVERTISED_BNC (1 << 11) 107 #define ADVERTISED_10000baseT_Full (1 << 12) 108 #define ADVERTISED_Pause (1 << 13) 109 #define ADVERTISED_Asym_Pause (1 << 14) 110 111 /* Link partner ability register. */ 112 #define LPA_SLCT 0x001f /* Same as advertise selector */ 113 #define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */ 114 #define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */ 115 #define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */ 116 #define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */ 117 #define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */ 118 #define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */ 119 #define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */ 120 #define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/ 121 #define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */ 122 #define LPA_PAUSE_CAP 0x0400 /* Can pause */ 123 #define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */ 124 #define LPA_RESV 0x1000 /* Unused... */ 125 #define LPA_RFAULT 0x2000 /* Link partner faulted */ 126 #define LPA_LPACK 0x4000 /* Link partner acked us */ 127 #define LPA_NPAGE 0x8000 /* Next page bit */ 128 129 #define LPA_DUPLEX (LPA_10FULL | LPA_100FULL) 130 #define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4) 131 132 /* Expansion register for auto-negotiation. */ 133 #define EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */ 134 #define EXPANSION_LCWP 0x0002 /* Got new RX page code word */ 135 #define EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */ 136 #define EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */ 137 #define EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */ 138 #define EXPANSION_RESV 0xffe0 /* Unused... */ 139 140 #define ESTATUS_1000_TFULL 0x2000 /* Can do 1000BT Full */ 141 #define ESTATUS_1000_THALF 0x1000 /* Can do 1000BT Half */ 142 143 /* N-way test register. */ 144 #define NWAYTEST_RESV1 0x00ff /* Unused... */ 145 #define NWAYTEST_LOOPBACK 0x0100 /* Enable loopback for N-way */ 146 #define NWAYTEST_RESV2 0xfe00 /* Unused... */ 147 148 /* 1000BASE-T Control register */ 149 #define ADVERTISE_1000FULL 0x0200 /* Advertise 1000BASE-T full duplex */ 150 #define ADVERTISE_1000HALF 0x0100 /* Advertise 1000BASE-T half duplex */ 151 152 /* 1000BASE-T Status register */ 153 #define LPA_1000LOCALRXOK 0x2000 /* Link partner local receiver status */ 154 #define LPA_1000REMRXOK 0x1000 /* Link partner remote receiver status */ 155 #define LPA_1000FULL 0x0800 /* Link partner 1000BASE-T full duplex */ 156 157 #define SUPPORTED_10baseT_Half (1 << 0) 158 #define SUPPORTED_10baseT_Full (1 << 1) 159 #define SUPPORTED_100baseT_Half (1 << 2) 160 #define SUPPORTED_100baseT_Full (1 << 3) 161 #define SUPPORTED_1000baseT_Half (1 << 4) 162 #define SUPPORTED_1000baseT_Full (1 << 5) 163 #define SUPPORTED_Autoneg (1 << 6) 164 #define SUPPORTED_TP (1 << 7) 165 #define SUPPORTED_AUI (1 << 8) 166 #define SUPPORTED_MII (1 << 9) 167 #define SUPPORTED_FIBRE (1 << 10) 168 #define SUPPORTED_BNC (1 << 11) 169 #define SUPPORTED_10000baseT_Full (1 << 12) 170 #define SUPPORTED_Pause (1 << 13) 171 #define SUPPORTED_Asym_Pause (1 << 14) 172 173 174 /* Which connector port. */ 175 #define PORT_TP 0x00 176 #define PORT_AUI 0x01 177 #define PORT_MII 0x02 178 #define PORT_FIBRE 0x03 179 #define PORT_BNC 0x04 180 181 /* Which transceiver to use. */ 182 #define XCVR_INTERNAL 0x00 183 #define XCVR_EXTERNAL 0x01 184 #define XCVR_DUMMY1 0x02 185 #define XCVR_DUMMY2 0x03 186 #define XCVR_DUMMY3 0x04 187 188 #define AUTONEG_DISABLE 0x00 189 #define AUTONEG_ENABLE 0x01 190 191 192 #define SPEED_10 10 193 #define SPEED_100 100 194 #define SPEED_1000 1000 195 #define SPEED_2500 2500 196 #define SPEED_10000 10000 197 198 #define DUPLEX_HALF 0x00 199 #define DUPLEX_FULL 0x01 200 201 struct ethtool_cmd { 202 u32 cmd; 203 u32 supported; /* Features this interface supports */ 204 u32 advertising; /* Features this interface advertises */ 205 u16 speed; /* The forced speed, 10Mb, 100Mb, gigabit */ 206 u8 duplex; /* Duplex, half or full */ 207 u8 port; /* Which connector port */ 208 u8 phy_address; 209 u8 transceiver; /* Which transceiver to use */ 210 u8 autoneg; /* Enable or disable autonegotiation */ 211 u32 maxtxpkt; /* Tx pkts before generating tx int */ 212 u32 maxrxpkt; /* Rx pkts before generating rx int */ 213 u32 reserved[4]; 214 }; 215 216 struct mii_if_info { 217 int phy_id; 218 int advertising; 219 int phy_id_mask; 220 int reg_num_mask; 221 222 unsigned int full_duplex : 1; /* is full duplex? */ 223 unsigned int force_media : 1; /* is autoneg. disabled? */ 224 unsigned int supports_gmii : 1; /* are GMII registers supported? */ 225 226 struct synopGMACNetworkAdapter *dev; 227 int (*mdio_read) (struct synopGMACNetworkAdapter *dev, int phy_id, int location); 228 void (*mdio_write) (struct synopGMACNetworkAdapter *dev, int phy_id, int location, int val); 229 }; 230 231 #endif 232